1/* $NetBSD: cpufunc_asm_arm7tdmi.S,v 1.1 2001/11/10 23:14:09 thorpej Exp $ */ 2 3/* 4 * Copyright (c) 2001 John Fremlin 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Causality Limited. 18 * 4. The name of Causality Limited may not be used to endorse or promote 19 * products derived from this software without specific prior written 20 * permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY CAUSALITY LIMITED ``AS IS'' AND ANY EXPRESS 23 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 * DISCLAIMED. IN NO EVENT SHALL CAUSALITY LIMITED BE LIABLE FOR ANY DIRECT, 26 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 27 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * ARM7TDMI assembly functions for CPU / MMU / TLB specific operations 35 */ 36 37#include <machine/cpu.h> 38#include <machine/asm.h> 39 40/* 41 * Functions to set the MMU Translation Table Base register 42 * 43 * We need to clean and flush the cache as it uses virtual 44 * addresses that are about to change. 45 */ 46ENTRY(arm7tdmi_setttb) 47 mov r1, r0 /* store the TTB in a safe place */ 48 mov r2, lr /* ditto with lr */ 49 50 bl _C_LABEL(arm7tdmi_cache_flushID) 51 52 /* Write the TTB */ 53 mcr p15, 0, r1, c2, c0, 0 54 55 /* If we have updated the TTB we must flush the TLB */ 56 bl _C_LABEL(arm7tdmi_tlb_flushID) 57 58 /* For good measure we will flush the IDC as well */ 59 bl _C_LABEL(arm7tdmi_cache_flushID) 60 61 mov pc, r2 62 63/* 64 * TLB functions 65 */ 66ENTRY(arm7tdmi_tlb_flushID) 67 mov r0, #0 68 mcr p15, 0, r0, c8, c7, 0 69 mov pc, lr 70 71ENTRY(arm7tdmi_tlb_flushID_SE) 72 mcr p15, 0, r0, c8, c7, 1 73 mov pc, lr 74 75/* 76 * Cache functions 77 */ 78ENTRY(arm7tdmi_cache_flushID) 79 mov r0, #0 80 81 mcr p15, 0, r0, c7, c7, 0 82 83 /* Make sure that the pipeline is emptied */ 84 mov r0, r0 85 mov r0, r0 86 87 mov pc, lr 88 89/* 90 * Context switch. 91 * 92 * These is the CPU-specific parts of the context switcher cpu_switch() 93 * These functions actually perform the TTB reload. 94 * 95 * NOTE: Special calling convention 96 * r1, r4-r13 must be preserved 97 */ 98ENTRY(arm7tdmi_context_switch) 99 b _C_LABEL(arm7tdmi_setttb) 100