1/* $NetBSD: cpufunc_asm_ixp12x0.S,v 1.2 2002/08/17 16:36:31 thorpej Exp $ */ 2 3/* 4 * Copyright (c) 2002 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38#include <machine/cpu.h> 39#include <machine/asm.h> 40 41/* 42 * This function is the same as sa110_context_switch for now, the plan 43 * is to make use of the process id register to avoid cache flushes. 44 */ 45ENTRY(ixp12x0_context_switch) 46 /* 47 * CF_CACHE_PURGE_ID will *ALWAYS* be called prior to this. 48 * Thus the data cache will contain only kernel data and the 49 * instruction cache will contain only kernel code, and all 50 * kernel mappings are shared by all processes. 51 */ 52 53 /* Write the TTB */ 54 mcr p15, 0, r0, c2, c0, 0 55 56 /* If we have updated the TTB we must flush the TLB */ 57 mcr p15, 0, r0, c8, c7, 0 /* flush the I+D tlb */ 58 59 /* Make sure that pipeline is emptied */ 60 mov r0, r0 61 mov r0, r0 62 mov pc, lr 63 64ENTRY(ixp12x0_drain_readbuf) 65 mcr p15, 0, r0, c9, c0, 0 /* drain read buffer */ 66 mov pc, lr 67 68/* 69 * Information for the IXP12X0 cache clean/purge functions: 70 * 71 * * Virtual address of the memory region to use 72 * * Size of memory region 73 */ 74 .data 75 76 .global _C_LABEL(ixp12x0_cache_clean_addr) 77_C_LABEL(ixp12x0_cache_clean_addr): 78 .word 0xf0000000 79 80 .global _C_LABEL(ixp12x0_cache_clean_size) 81_C_LABEL(ixp12x0_cache_clean_size): 82 .word 0x00008000 83 84 .text 85 86.Lixp12x0_cache_clean_addr: 87 .word _C_LABEL(ixp12x0_cache_clean_addr) 88.Lixp12x0_cache_clean_size: 89 .word _C_LABEL(ixp12x0_cache_clean_size) 90