1/* $NetBSD: cpufunc_asm_sa11x0.S,v 1.3 2002/08/17 16:36:32 thorpej Exp $ */ 2 3/* 4 * Copyright (c) 2002 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38#include <machine/cpu.h> 39#include <machine/asm.h> 40 41 .data 42 .global _C_LABEL(sa11x0_idle_mem) 43_C_LABEL(sa11x0_idle_mem): 44 .word 0 45 46 .text 47 48 .align 5 49 50 /* We're now 32-byte aligned */ 51 52.Lsa11x0_idle_mem: 53 .word _C_LABEL(sa11x0_idle_mem) /* 1 */ 54 55/* 56 * sa11x0_cpusleep 57 * 58 * This is called when there is nothing on any of the run queues. 59 * We go into IDLE mode so that any IRQ or FIQ will awaken us. 60 */ 61ENTRY(sa11x0_cpu_sleep) 62 ldr r1, .Lsa11x0_idle_mem /* get address of... */ /* 2 */ 63 nop /* 3 */ 64 ldr r1, [r1] /* ...non-cacheable page */ /* 4 */ 65 nop /* 5 */ 66 67 /* 68 * SA-1110 manual, 9.5.2.1 (Entering Idle Mode) says that 69 * to enter idle mode: 70 * 71 * * Disable clock switching 72 * * Issue load from non-cacheable address 73 * * Issue "wait for interrupt" 74 * 75 * The 3-insn sequence must reside in the first 3 words 76 * of a cache line. 77 * 78 * We must disable interrupts in the CPSR so that we can 79 * re-enable clock switching before servicing interrupts. 80 */ 81 82 mrs r3, cpsr_all /* 6 */ 83 orr r2, r3, #(I32_bit|F32_bit) /* 7 */ 84 msr cpsr_all, r2 /* 8 */ 85 86 /* We're now 32-byte aligned */ 87 88 mcr p15, 0, r0, c15, c2, 2 /* disable clock switching */ 89 ldr r0, [r1] /* load from non-cacheable address */ 90 mcr p15, 0, r0, c15, c8, 2 /* wait for interrupt 91 92 mcr p15, 0, r0, c15, c1, 2 /* re-enable clock switching */ 93 94 /* Restore interrupts (which will cause them to be serviced). */ 95 msr cpsr_all, r3 96 mov pc, lr 97 98 99/* 100 * This function is the same as sa110_context_switch for now, the plan 101 * is to make use of the process id register to avoid cache flushes. 102 */ 103ENTRY(sa11x0_context_switch) 104 /* 105 * CF_CACHE_PURGE_ID will *ALWAYS* be called prior to this. 106 * Thus the data cache will contain only kernel data and the 107 * instruction cache will contain only kernel code, and all 108 * kernel mappings are shared by all processes. 109 */ 110 111 /* Write the TTB */ 112 mcr p15, 0, r0, c2, c0, 0 113 114 /* If we have updated the TTB we must flush the TLB */ 115 mcr p15, 0, r0, c8, c7, 0 /* flush the I+D tlb */ 116 117 /* Make sure that pipeline is emptied */ 118 mov r0, r0 119 mov r0, r0 120 mov pc, lr 121 122ENTRY(sa11x0_drain_readbuf) 123 mcr p15, 0, r0, c9, c0, 0 /* drain read buffer */ 124 mov pc, lr 125