1 /* $NetBSD: undefined.c,v 1.40 2010/12/20 00:25:26 matt Exp $ */ 2 3 /* 4 * Copyright (c) 2001 Ben Harris. 5 * Copyright (c) 1995 Mark Brinicombe. 6 * Copyright (c) 1995 Brini. 7 * All rights reserved. 8 * 9 * This code is derived from software written for Brini by Mark Brinicombe 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Brini. 22 * 4. The name of the company nor the name of the author may be used to 23 * endorse or promote products derived from this software without specific 24 * prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 27 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 28 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 29 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 30 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 31 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 32 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * RiscBSD kernel project 39 * 40 * undefined.c 41 * 42 * Fault handler 43 * 44 * Created : 06/01/95 45 */ 46 47 #define FAST_FPE 48 49 #include "opt_ddb.h" 50 #include "opt_kgdb.h" 51 52 #include <sys/param.h> 53 #ifdef KGDB 54 #include <sys/kgdb.h> 55 #endif 56 57 __KERNEL_RCSID(0, "$NetBSD: undefined.c,v 1.40 2010/12/20 00:25:26 matt Exp $"); 58 59 #include <sys/malloc.h> 60 #include <sys/queue.h> 61 #include <sys/signal.h> 62 #include <sys/systm.h> 63 #include <sys/proc.h> 64 #include <sys/syslog.h> 65 #include <sys/vmmeter.h> 66 #ifdef FAST_FPE 67 #include <sys/acct.h> 68 #endif 69 #include <sys/userret.h> 70 71 #include <uvm/uvm_extern.h> 72 73 #include <machine/cpu.h> 74 #include <machine/frame.h> 75 #include <arm/undefined.h> 76 #include <machine/trap.h> 77 78 #include <arch/arm/arm/disassem.h> 79 80 #ifdef DDB 81 #include <ddb/db_output.h> 82 #include <machine/db_machdep.h> 83 #endif 84 85 #ifdef acorn26 86 #include <machine/machdep.h> 87 #endif 88 89 static int gdb_trapper(u_int, u_int, struct trapframe *, int); 90 91 LIST_HEAD(, undefined_handler) undefined_handlers[NUM_UNKNOWN_HANDLERS]; 92 93 94 void * 95 install_coproc_handler(int coproc, undef_handler_t handler) 96 { 97 struct undefined_handler *uh; 98 99 KASSERT(coproc >= 0 && coproc < NUM_UNKNOWN_HANDLERS); 100 KASSERT(handler != NULL); /* Used to be legal. */ 101 102 /* XXX: M_TEMP??? */ 103 uh = malloc(sizeof(*uh), M_TEMP, M_WAITOK); 104 uh->uh_handler = handler; 105 install_coproc_handler_static(coproc, uh); 106 return uh; 107 } 108 109 void 110 install_coproc_handler_static(int coproc, struct undefined_handler *uh) 111 { 112 113 LIST_INSERT_HEAD(&undefined_handlers[coproc], uh, uh_link); 114 } 115 116 void 117 remove_coproc_handler(void *cookie) 118 { 119 struct undefined_handler *uh = cookie; 120 121 LIST_REMOVE(uh, uh_link); 122 free(uh, M_TEMP); 123 } 124 125 126 static int 127 gdb_trapper(u_int addr, u_int insn, struct trapframe *frame, int code) 128 { 129 struct lwp *l; 130 l = curlwp; 131 132 #ifdef THUMB_CODE 133 if (frame->tf_spsr & PSR_T_bit) { 134 if (insn == GDB_THUMB_BREAKPOINT) 135 goto bkpt; 136 } 137 else 138 #endif 139 { 140 if (insn == GDB_BREAKPOINT || insn == GDB5_BREAKPOINT) { 141 #ifdef THUMB_CODE 142 bkpt: 143 #endif 144 if (code == FAULT_USER) { 145 ksiginfo_t ksi; 146 147 KSI_INIT_TRAP(&ksi); 148 ksi.ksi_signo = SIGTRAP; 149 ksi.ksi_code = TRAP_BRKPT; 150 ksi.ksi_addr = (u_int32_t *)addr; 151 ksi.ksi_trap = 0; 152 trapsignal(l, &ksi); 153 return 0; 154 } 155 #ifdef KGDB 156 return !kgdb_trap(T_BREAKPOINT, frame); 157 #endif 158 } 159 } 160 return 1; 161 } 162 163 static struct undefined_handler gdb_uh; 164 #ifdef THUMB_CODE 165 static struct undefined_handler gdb_uh_thumb; 166 #endif 167 168 void 169 undefined_init(void) 170 { 171 int loop; 172 173 /* Not actually necessary -- the initialiser is just NULL */ 174 for (loop = 0; loop < NUM_UNKNOWN_HANDLERS; ++loop) 175 LIST_INIT(&undefined_handlers[loop]); 176 177 /* Install handler for GDB breakpoints */ 178 gdb_uh.uh_handler = gdb_trapper; 179 install_coproc_handler_static(CORE_UNKNOWN_HANDLER, &gdb_uh); 180 #ifdef THUMB_CODE 181 gdb_uh_thumb.uh_handler = gdb_trapper; 182 install_coproc_handler_static(THUMB_UNKNOWN_HANDLER, &gdb_uh_thumb); 183 #endif 184 } 185 186 void 187 undefinedinstruction(trapframe_t *frame) 188 { 189 struct lwp *l; 190 u_int fault_pc; 191 int fault_instruction; 192 int fault_code; 193 int coprocessor; 194 int user; 195 struct undefined_handler *uh; 196 #ifdef VERBOSE_ARM32 197 int s; 198 #endif 199 200 /* Enable interrupts if they were enabled before the exception. */ 201 #ifdef acorn26 202 if ((frame->tf_r15 & R15_IRQ_DISABLE) == 0) 203 int_on(); 204 #else 205 restore_interrupts(frame->tf_spsr & IF32_bits); 206 #endif 207 208 #ifndef acorn26 209 #ifdef THUMB_CODE 210 if (frame->tf_spsr & PSR_T_bit) 211 frame->tf_pc -= THUMB_INSN_SIZE; 212 else 213 #endif 214 { 215 frame->tf_pc -= INSN_SIZE; 216 } 217 #endif 218 219 #ifdef __PROG26 220 fault_pc = frame->tf_r15 & R15_PC; 221 #else 222 fault_pc = frame->tf_pc; 223 #endif 224 225 /* Get the current lwp/proc structure or lwp0/proc0 if there is none. */ 226 l = curlwp; 227 228 #ifdef __PROG26 229 if ((frame->tf_r15 & R15_MODE) == R15_MODE_USR) { 230 #else 231 if ((frame->tf_spsr & PSR_MODE) == PSR_USR32_MODE) { 232 #endif 233 user = 1; 234 LWP_CACHE_CREDS(l, l->l_proc); 235 } else 236 user = 0; 237 238 239 #ifdef THUMB_CODE 240 if (frame->tf_spsr & PSR_T_bit) { 241 fault_instruction = fusword((void *)(fault_pc & ~1)); 242 } 243 else 244 #endif 245 { 246 /* 247 * Make sure the program counter is correctly aligned so we 248 * don't take an alignment fault trying to read the opcode. 249 */ 250 if (__predict_false((fault_pc & 3) != 0)) { 251 ksiginfo_t ksi; 252 /* Give the user an illegal instruction signal. */ 253 KSI_INIT_TRAP(&ksi); 254 ksi.ksi_signo = SIGILL; 255 ksi.ksi_code = ILL_ILLOPC; 256 ksi.ksi_addr = (u_int32_t *)(intptr_t) fault_pc; 257 trapsignal(l, &ksi); 258 userret(l); 259 return; 260 } 261 /* 262 * Should use fuword() here .. but in the interests of 263 * squeezing every bit of speed we will just use 264 * ReadWord(). We know the instruction can be read 265 * as was just executed so this will never fail unless 266 * the kernel is screwed up in which case it does 267 * not really matter does it ? 268 */ 269 270 fault_instruction = *(u_int32_t *)fault_pc; 271 } 272 273 /* Update vmmeter statistics */ 274 curcpu()->ci_data.cpu_ntrap++; 275 276 #ifdef THUMB_CODE 277 if (frame->tf_spsr & PSR_T_bit) { 278 coprocessor = THUMB_UNKNOWN_HANDLER; 279 } 280 else 281 #endif 282 { 283 /* Check for coprocessor instruction */ 284 285 /* 286 * According to the datasheets you only need to look at 287 * bit 27 of the instruction to tell the difference 288 * between and undefined instruction and a coprocessor 289 * instruction following an undefined instruction trap. 290 * 291 * ARMv5 adds undefined instructions in the NV space, 292 * even when bit 27 is set. 293 */ 294 295 if ((fault_instruction & (1 << 27)) != 0 296 && (fault_instruction & 0xf0000000) != 0xf0000000) 297 coprocessor = (fault_instruction >> 8) & 0x0f; 298 else 299 coprocessor = CORE_UNKNOWN_HANDLER; 300 } 301 302 if (user) { 303 struct pcb *pcb = lwp_getpcb(l); 304 /* 305 * Modify the fault_code to reflect the USR/SVC state at 306 * time of fault. 307 */ 308 fault_code = FAULT_USER; 309 pcb->pcb_tf = frame; 310 } else 311 fault_code = 0; 312 313 /* OK this is were we do something about the instruction. */ 314 LIST_FOREACH(uh, &undefined_handlers[coprocessor], uh_link) 315 if (uh->uh_handler(fault_pc, fault_instruction, frame, 316 fault_code) == 0) 317 break; 318 319 if (uh == NULL) { 320 /* Fault has not been handled */ 321 ksiginfo_t ksi; 322 323 #ifdef VERBOSE_ARM32 324 s = spltty(); 325 326 if ((fault_instruction & 0x0f000010) == 0x0e000000) { 327 printf("CDP\n"); 328 disassemble(fault_pc); 329 } else if ((fault_instruction & 0x0e000000) == 0x0c000000) { 330 printf("LDC/STC\n"); 331 disassemble(fault_pc); 332 } else if ((fault_instruction & 0x0f000010) == 0x0e000010) { 333 printf("MRC/MCR\n"); 334 disassemble(fault_pc); 335 } else if ((fault_instruction & ~INSN_COND_MASK) 336 != (KERNEL_BREAKPOINT & ~INSN_COND_MASK)) { 337 printf("Undefined instruction\n"); 338 disassemble(fault_pc); 339 } 340 341 splx(s); 342 #endif 343 344 if ((fault_code & FAULT_USER) == 0) { 345 #ifdef DDB 346 db_printf("Undefined instruction in kernel\n"); 347 kdb_trap(T_FAULT, frame); 348 #else 349 panic("undefined instruction in kernel"); 350 #endif 351 } 352 KSI_INIT_TRAP(&ksi); 353 ksi.ksi_signo = SIGILL; 354 ksi.ksi_code = ILL_ILLOPC; 355 ksi.ksi_addr = (u_int32_t *)fault_pc; 356 ksi.ksi_trap = fault_instruction; 357 trapsignal(l, &ksi); 358 } 359 360 if ((fault_code & FAULT_USER) == 0) 361 return; 362 363 #ifdef FAST_FPE 364 /* Optimised exit code */ 365 { 366 /* 367 * Check for reschedule request, at the moment there is only 368 * 1 ast so this code should always be run 369 */ 370 if (curcpu()->ci_want_resched) { 371 /* 372 * We are being preempted. 373 */ 374 preempt(); 375 } 376 377 /* Invoke MI userret code */ 378 mi_userret(l); 379 } 380 #else 381 userret(l); 382 #endif 383 } 384