xref: /netbsd/sys/arch/arm/arm32/spl.S (revision bf9ec67e)
1/*	$NetBSD: spl.S,v 1.3 2001/11/26 20:51:57 thorpej Exp $	*/
2
3/*
4 * Copyright (c) 1996-1998 Mark Brinicombe.
5 * Copyright (c) Brini.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 *    must display the following acknowledgement:
18 *	This product includes software developed by Mark Brinicombe
19 *	for the NetBSD Project.
20 * 4. The name of the company nor the name of the author may be used to
21 *    endorse or promote products derived from this software without specific
22 *    prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
25 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
26 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
28 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 * spl routines
37 *
38 * Created      : 01/03/96
39 */
40
41#include "assym.h"
42#include <arm/arm32/psl.h>
43#include <machine/asm.h>
44
45	.text
46	.align	0
47
48Lcurrent_spl_level:
49	.word	_C_LABEL(current_spl_level)
50
51Lspl_masks:
52	.word	_C_LABEL(spl_masks)
53
54Lspl_mask:
55	.word	_C_LABEL(spl_mask)
56
57ENTRY(raisespl)
58	mov	r3, r0			/* Save the new value */
59	ldr	r1, Lcurrent_spl_level	/* Get the current spl level */
60	ldr	r0, [r1]
61	cmp	r3, r0
62	movle	pc, lr
63
64	str	r3, [r1]		/* Store the new spl level */
65
66	ldr	r2, Lspl_masks		/* Get the spl mask */
67	ldr	r2, [r2, r3, lsl #2]
68
69	ldr	r1, Lspl_mask		/* Store in the current spl mask */
70	str	r2, [r1]
71
72					/* stack alignment is 8 bytes */
73	stmfd	sp!, {r0, lr}		/* Preserve registers */
74	bl	_C_LABEL(irq_setmasks)	/* Update the actual masks */
75	ldmfd	sp!, {r0, pc}		/* Exit */
76
77ENTRY(lowerspl)
78	mov	r3, r0			/* Save the new value */
79	ldr	r1, Lcurrent_spl_level	/* Get the current spl level */
80	ldr	r0, [r1]
81	cmp	r3, r0
82	movge	pc, lr
83
84	str	r3, [r1]		/* Store the new spl level */
85
86	ldr	r2, Lspl_masks		/* Get the spl mask */
87	ldr	r2, [r2, r3, lsl #2]
88
89	ldr	r1, Lspl_mask		/* Store in the current spl mask */
90	str	r2, [r1]
91
92					/* stack alignment is 8 bytes */
93	stmfd	sp!, {r0, lr}		/* Preserve registers */
94	bl	_C_LABEL(irq_setmasks)	/* Update the actual masks */
95	bl	_C_LABEL(dosoftints)	/* Process any pending soft ints */
96	ldmfd	sp!, {r0, pc}		/* Exit */
97
98ENTRY(splx)
99	ldr	r1, Lcurrent_spl_level	/* Get the current spl level */
100	mov	r3, r0			/* Save the new value */
101	ldr	r0, [r1]
102	cmp	r3, r0
103	moveq	pc, lr
104
105	str	r3, [r1]		/* Store the new spl level */
106
107	ldr	r2, Lspl_masks		/* Get the spl mask */
108
109	ldr	r1, Lspl_mask		/* Store in the current spl mask */
110
111	ldr	r2, [r2, r3, lsl #2]	/* Use r4 so available later */
112
113					/* stack alignment is 8 bytes */
114	stmfd	sp!, {r0, lr}		/* Preserve registers */
115	str	r2, [r1]
116
117	bl	_C_LABEL(irq_setmasks)	/* Update the actual masks */
118	bl	_C_LABEL(dosoftints)	/* Process any pending soft ints */
119	ldmfd	sp!, {r0, pc}		/* Exit */
120