1 /*$NetBSD: at91st.c,v 1.3 2009/10/27 03:42:31 snj Exp $*/ 2 3 /* 4 * AT91RM9200 clock functions 5 * Copyright (c) 2007, Embedtronics Oy 6 * All rights reserved. 7 * 8 * Based on vx115_clk.c, 9 * Copyright (c) 2006, Jon Sevy <jsevy@cs.drexel.edu> 10 * 11 * Based on epclk.c 12 * Copyright (c) 2004 Jesse Off 13 * All rights reserved. 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 /* 38 * Driver for the AT91RM9200 clock tick. 39 * We use Timer 1 for the system clock 40 */ 41 42 #include <sys/cdefs.h> 43 __KERNEL_RCSID(0, "$NetBSD: at91st.c,v 1.3 2009/10/27 03:42:31 snj Exp $"); 44 45 #include <sys/types.h> 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/kernel.h> 49 #include <sys/time.h> 50 #include <sys/device.h> 51 52 #include <dev/clock_subr.h> 53 54 #include <machine/bus.h> 55 #include <machine/intr.h> 56 57 #include <arm/cpufunc.h> 58 #include <arm/at91/at91reg.h> 59 #include <arm/at91/at91var.h> 60 #include <arm/at91/at91streg.h> 61 62 #include <opt_hz.h> /* for HZ */ 63 64 65 //#define DEBUG_CLK 66 #ifdef DEBUG_CLK 67 #define DPRINTF(fmt...) printf(fmt) 68 #else 69 #define DPRINTF(fmt...) 70 #endif 71 72 73 static int at91st_match(device_t, cfdata_t, void *); 74 static void at91st_attach(device_t, device_t, void *); 75 76 void rtcinit(void); 77 78 /* callback functions for intr_functions */ 79 static int at91st_intr(void* arg); 80 81 struct at91st_softc { 82 struct device sc_dev; 83 bus_space_tag_t sc_iot; 84 bus_space_handle_t sc_ioh; 85 int sc_pid; 86 int sc_initialized; 87 }; 88 89 static struct at91st_softc *at91st_sc = NULL; 90 static struct timeval lasttv; 91 92 93 94 /* Match value for clock timer; running at 32.768kHz, want HZ ticks per second */ 95 /* BTW, we use HZ == 64 or HZ == 128 so have a nice divisor */ 96 /* NOTE: don't change there without visiting the functions below which */ 97 /* convert between timer counts and microseconds */ 98 #define AT91ST_DIVIDER (AT91_SCLK / HZ) 99 #define USEC_PER_TICK (1000000 / (AT91_SCLK / AT91ST_DIVIDER)) 100 101 #if 0 102 static uint32_t at91st_count_to_usec(uint32_t count) 103 { 104 uint32_t result; 105 106 /* convert specified number of ticks to usec, and round up */ 107 /* note that with 16 kHz tick rate, maximum count will be */ 108 /* 256 (for HZ = 64), so we won't have overflow issues */ 109 result = (1000000 * count) / AT91_SCLK; 110 111 if ((result * AT91_SCLK) != (count * 1000000)) 112 { 113 /* round up */ 114 result += 1; 115 } 116 117 return result; 118 } 119 120 /* This may only be called when overflow is avoided; typically, */ 121 /* it will be used when usec < USEC_PER_TICK */ 122 static uint32_t usec_to_timer_count(uint32_t usec) 123 { 124 uint32_t result; 125 126 /* convert specified number of usec to timer ticks, and round up */ 127 result = (AT91_SCLK * usec) / 1000000; 128 129 if ((result * 1000000) != (usec * AT91_SCLK)) 130 { 131 /* round up */ 132 result += 1; 133 } 134 135 return result; 136 137 } 138 #endif 139 140 /* macros to simplify writing to the timer controller */ 141 #define READ_ST(offset) STREG(offset) 142 //bus_space_read_4(sc->sc_iot, sc->sc_ioh, offset) 143 #define WRITE_ST(offset, value) do { \ 144 STREG(offset) = (value); \ 145 } while (/*CONSTCOND*/0) 146 //bus_space_write_4(sc->sc_iot, sc->sc_ioh, offset, value) 147 148 149 150 CFATTACH_DECL(at91st, sizeof(struct at91st_softc), at91st_match, at91st_attach, NULL, NULL); 151 152 153 154 static int 155 at91st_match(device_t parent, cfdata_t match, void *aux) 156 { 157 if (strcmp(match->cf_name, "at91st") == 0) 158 return 2; 159 return 0; 160 } 161 162 static void 163 at91st_attach(device_t parent, device_t self, void *aux) 164 { 165 struct at91st_softc *sc = (struct at91st_softc*) self; 166 struct at91bus_attach_args *sa = (struct at91bus_attach_args*) aux; 167 168 printf("\n"); 169 170 sc->sc_iot = sa->sa_iot; 171 sc->sc_pid = sa->sa_pid; 172 173 #if 0 174 DPRINTF("-> bus_space_map()\n"); 175 176 /* map bus space and get handle */ 177 if (bus_space_map(sc->sc_iot, sa->sa_addr, sa->sa_size, 0, &sc->sc_ioh) != 0) 178 panic("%s: Cannot map registers", self->dv_xname); 179 #endif 180 181 if (at91st_sc == NULL) 182 at91st_sc = sc; 183 184 at91_peripheral_clock(sc->sc_pid, 1); 185 186 WRITE_ST(ST_IDR, -1); /* make sure interrupts are disabled */ 187 188 /* set up and enable interval timer 1 as kernel timer, */ 189 /* using 32kHz clock source */ 190 WRITE_ST(ST_PIMR, AT91ST_DIVIDER); 191 WRITE_ST(ST_RTMR, 1); 192 193 sc->sc_initialized = 1; 194 195 DPRINTF("%s: done\n", __FUNCTION__); 196 197 } 198 199 /* 200 * at91st_intr: 201 * 202 *Handle the hardclock interrupt. 203 */ 204 static int 205 at91st_intr(void *arg) 206 { 207 // struct at91st_softc *sc = at91st_sc; 208 209 /* make sure it's the kernel timer that generated the interrupt */ 210 /* need to do this since the interrupt line is shared by the */ 211 /* other interval and PWM timers */ 212 if (READ_ST(ST_SR) & ST_SR_PITS) 213 { 214 /* call the kernel timer handler */ 215 hardclock((struct clockframe*) arg); 216 #if 0 217 if (hardclock_ticks % (HZ * 10) == 0) 218 printf("time %i sec\n", hardclock_ticks/HZ); 219 #endif 220 return 1; 221 } 222 else 223 { 224 /* it's one of the other timers; just pass it on */ 225 return 0; 226 } 227 228 } 229 230 /* 231 * setstatclockrate: 232 * 233 *Set the rate of the statistics clock. 234 * 235 *We assume that hz is either stathz or profhz, and that neither 236 *will change after being set by cpu_initclocks(). We could 237 *recalculate the intervals here, but that would be a pain. 238 */ 239 void 240 setstatclockrate(int hzz) 241 { 242 /* use hardclock */ 243 (void)hzz; 244 } 245 246 /* 247 * cpu_initclocks: 248 * 249 *Initialize the clock and get it going. 250 */ 251 static void udelay(unsigned int usec); 252 253 void 254 cpu_initclocks(void) 255 { 256 struct at91st_softc *sc = at91st_sc; 257 258 if (!sc || !sc->sc_initialized) 259 panic("%s: driver has not been initialized! (sc=%p)", __FUNCTION__, sc); 260 261 stathz = profhz = 0; 262 263 /* set up and enable interval timer 1 as kernel timer, */ 264 /* using 32kHz clock source */ 265 WRITE_ST(ST_PIMR, AT91ST_DIVIDER); 266 267 /* register interrupt handler */ 268 at91_intr_establish(sc->sc_pid, IPL_CLOCK, INTR_HIGH_LEVEL, at91st_intr, NULL); 269 270 /* enable interrupts from timer */ 271 WRITE_ST(ST_IER, ST_SR_PITS); 272 } 273 274 275 276 277 /* 278 * microtime: 279 * 280 *Fill in the specified timeval struct with the current time 281 *accurate to the microsecond. 282 */ 283 void 284 microtime(register struct timeval *tvp) 285 { 286 // struct at91st_softc *sc = at91st_sc; 287 u_int oldirqstate; 288 u_int current_count; 289 290 #ifdef DEBUG 291 if (at91st_sc == NULL) { 292 printf("microtime: called before initialize at91st\n"); 293 tvp->tv_sec = 0; 294 tvp->tv_usec = 0; 295 return; 296 } 297 #endif 298 299 oldirqstate = disable_interrupts(I32_bit); 300 301 /* get current timer count */ 302 current_count = READ_ST(ST_CRTR); 303 304 /* Fill in the timeval struct. */ 305 *tvp = time; 306 307 #if 0 308 /* Refine the usec field using current timer count */ 309 tvp->tv_usec += at91st_count_to_usec(AT91ST_DIVIDER - current_count); 310 311 /* Make sure microseconds doesn't overflow. */ 312 while (__predict_false(tvp->tv_usec >= 1000000)) 313 { 314 tvp->tv_usec -= 1000000; 315 tvp->tv_sec++; 316 } 317 #endif 318 319 /* Make sure the time has advanced. */ 320 if (__predict_false(tvp->tv_sec == lasttv.tv_sec && tvp->tv_usec <= lasttv.tv_usec)) 321 { 322 tvp->tv_usec = lasttv.tv_usec + 1; 323 if (tvp->tv_usec >= 1000000) 324 { 325 tvp->tv_usec -= 1000000; 326 tvp->tv_sec++; 327 } 328 } 329 330 lasttv = *tvp; 331 332 restore_interrupts(oldirqstate); 333 } 334 335 336 #if 0 337 extern int hardclock_ticks; 338 static void tdelay(unsigned int ticks) 339 { 340 u_int32_t start, end, current; 341 342 current = hardclock_ticks; 343 start = current; 344 end = start + ticks; 345 346 /* just loop for the specified number of ticks */ 347 while (current < end) 348 current = hardclock_ticks; 349 } 350 #endif 351 352 static void udelay(unsigned int usec) 353 { 354 // struct at91st_softc *sc = at91st_sc; 355 u_int32_t crtv, t, diff; 356 357 usec = (usec * 1000 + AT91_SCLK - 1) / AT91_SCLK + 1; 358 359 for (crtv = READ_ST(ST_CRTR);;) { 360 while (crtv == (t = READ_ST(ST_CRTR))) ; 361 diff = (t - crtv) & ST_CRTR_CRTV; 362 if (diff >= usec) { 363 break; 364 } 365 crtv = t; 366 usec -= diff; 367 } 368 } 369 370 371 372 /* 373 * delay: 374 * 375 *Delay for at least N microseconds. Note that due to our coarse clock, 376 * our resolution is 61 us. But we round up so we'll wait at least as 377 * long as requested. 378 */ 379 void 380 delay(unsigned int usec) 381 { 382 383 #ifdef DEBUG 384 if (at91st_sc == NULL) { 385 printf("delay: called before start at91st\n"); 386 return; 387 } 388 #endif 389 390 if (usec >= USEC_PER_TICK) 391 { 392 /* have more than 1 tick; just do in ticks */ 393 unsigned int ticks = usec / USEC_PER_TICK; 394 if (ticks*USEC_PER_TICK != usec) 395 ticks += 1; 396 while (ticks-- > 0) { 397 udelay(USEC_PER_TICK); 398 } 399 } 400 else 401 { 402 /* less than 1 tick; can do as usec */ 403 udelay(usec); 404 } 405 406 } 407 408