xref: /netbsd/sys/arch/arm/gemini/obio_wdc.c (revision 6550d01e)
1 /*	$NetBSD: obio_wdc.c,v 1.2 2008/11/17 23:51:30 cliff Exp $	*/
2 
3 /* adapted from iq31244/wdc_obio.c:
4  *	NetBSD: wdc_obio.c,v 1.5 2008/04/28 20:23:16 martin Exp
5  */
6 
7 /*-
8  * Copyright (c) 1998, 2003, 2005 The NetBSD Foundation, Inc.
9  * All rights reserved.
10  *
11  * This code is derived from software contributed to The NetBSD Foundation
12  * by Charles M. Hannum and by Onno van der Linden.
13  *
14  * Redistribution and use in source and binary forms, with or without
15  * modification, are permitted provided that the following conditions
16  * are met:
17  * 1. Redistributions of source code must retain the above copyright
18  *    notice, this list of conditions and the following disclaimer.
19  * 2. Redistributions in binary form must reproduce the above copyright
20  *    notice, this list of conditions and the following disclaimer in the
21  *    documentation and/or other materials provided with the distribution.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
24  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
25  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
26  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
27  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33  * POSSIBILITY OF SUCH DAMAGE.
34  */
35 
36 #include <sys/cdefs.h>
37 __KERNEL_RCSID(0, "$NetBSD: obio_wdc.c,v 1.2 2008/11/17 23:51:30 cliff Exp $");
38 
39 #include "locators.h"
40 
41 #include <sys/param.h>
42 #include <sys/systm.h>
43 #include <sys/device.h>
44 #include <sys/malloc.h>
45 
46 #include <machine/bus.h>
47 #include <machine/intr.h>
48 
49 #include <arm/gemini/gemini_var.h>
50 #include <arm/gemini/gemini_reg.h>
51 #include <arm/gemini/gemini_obiovar.h>
52 
53 #include <dev/ic/wdcreg.h>
54 #include <dev/ata/atavar.h>
55 #include <dev/ic/wdcvar.h>
56 
57 struct wdc_obio_softc {
58 	struct	wdc_softc sc_wdcdev;
59 	struct	ata_channel *wdc_chanlist[1];
60 	struct	ata_channel ata_channel;
61 	struct	ata_queue wdc_chqueue;
62 	struct	wdc_regs wdc_regs;
63 	void	*sc_ih;
64 };
65 
66 static int	wdc_obio_match(device_t, cfdata_t, void *);
67 static void	wdc_obio_attach(device_t, device_t, void *);
68 
69 CFATTACH_DECL_NEW(wdc_obio, sizeof(struct wdc_obio_softc),
70     wdc_obio_match, wdc_obio_attach, NULL, NULL);
71 
72 static int
73 wdc_obio_match(device_t parent, cfdata_t match, void *aux)
74 {
75 	struct obio_attach_args * const obio = aux;
76 
77 	if (obio->obio_addr == GEMINI_MIDE_BASEn(0)
78 	||  obio->obio_addr == GEMINI_MIDE_BASEn(1))
79 		return 1;
80 
81         return 0;
82 
83 }
84 
85 static void
86 wdc_obio_attach(device_t parent, device_t self, void *aux)
87 {
88 	struct wdc_obio_softc *sc = device_private(self);
89 	struct wdc_regs *wdr;
90 	struct obio_attach_args *obio = aux;
91 	uint chan;
92 	int i;
93 
94 	/*
95 	 * we treat the two channels of the Gemini MIDE controller
96 	 * as seperate wdc controllers, because they have
97 	 * independent interrupts.  'chan' here is an MIDE chanel,
98 	 * (not to be confused with ATA channel).
99 	 */
100 	switch (obio->obio_addr) {
101 	case  GEMINI_MIDE_BASEn(0):
102 		chan = 0;
103 		break;
104 	case  GEMINI_MIDE_BASEn(1):
105 		chan = 1;
106 		break;
107 	default:
108 		panic("wdc_obio_attach: bad address");
109 	}
110 
111 	sc->sc_wdcdev.sc_atac.atac_dev = self;
112 	sc->sc_wdcdev.regs = wdr = &sc->wdc_regs;
113 	wdr->cmd_iot = obio->obio_iot;
114 	wdr->ctl_iot = obio->obio_iot;
115 	if (bus_space_map(wdr->cmd_iot, obio->obio_addr, GEMINI_MIDE_SIZE,
116 	    0, &wdr->cmd_baseioh)) {
117 		aprint_error(": couldn't map registers\n");
118 		return;
119 	}
120 
121 	for (i = 0; i < 8; i++) {
122 		if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh,
123 		    GEMINI_MIDE_CMDBLK + i, 1, &wdr->cmd_iohs[i]) != 0) {
124 			aprint_error(": couldn't subregion registers\n");
125 			return;
126 		}
127 	}
128 
129 	if (bus_space_subregion(wdr->ctl_iot, wdr->cmd_baseioh,
130 	    GEMINI_MIDE_CTLBLK, 1, &wdr->ctl_ioh) != 0) {
131 		aprint_error(": couldn't subregion registers\n");
132 		return;
133 	}
134 
135 	sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16;
136 
137 	sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
138 	sc->wdc_chanlist[0] = &sc->ata_channel;
139 	sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanlist;
140 	sc->sc_wdcdev.sc_atac.atac_nchannels = 1;
141 	sc->ata_channel.ch_channel = 0;
142 	sc->ata_channel.ch_atac = &sc->sc_wdcdev.sc_atac;
143 	sc->ata_channel.ch_queue = &sc->wdc_chqueue;
144 	sc->ata_channel.ch_ndrive = 2;
145 	wdc_init_shadow_regs(&sc->ata_channel);
146 
147 	aprint_normal("\n");
148 
149 	if (obio->obio_intr != OBIOCF_INTR_DEFAULT)
150 		sc->sc_ih = intr_establish(obio->obio_intr, IPL_BIO, IST_LEVEL_HIGH,
151 			wdcintr, &sc->ata_channel);
152 	else {
153 		sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_NOIRQ;
154 		aprint_normal_dev(self, "Using polled I/O\n");
155 	}
156 
157 	wdcattach(&sc->ata_channel);
158 }
159