xref: /netbsd/sys/arch/arm/include/cpu.h (revision bf9ec67e)
1 /*	$NetBSD: cpu.h,v 1.27 2002/05/08 22:22:46 thorpej Exp $	*/
2 
3 /*
4  * Copyright (c) 1994-1996 Mark Brinicombe.
5  * Copyright (c) 1994 Brini.
6  * All rights reserved.
7  *
8  * This code is derived from software written for Brini by Mark Brinicombe
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *	This product includes software developed by Brini.
21  * 4. The name of the company nor the name of the author may be used to
22  *    endorse or promote products derived from this software without specific
23  *    prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
26  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
27  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
29  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
30  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35  * SUCH DAMAGE.
36  *
37  * RiscBSD kernel project
38  *
39  * cpu.h
40  *
41  * CPU specific symbols
42  *
43  * Created      : 18/09/94
44  *
45  * Based on kate/katelib/arm6.h
46  */
47 
48 #ifndef _ARM_CPU_H_
49 #define _ARM_CPU_H_
50 
51 /*
52  * User-visible definitions
53  */
54 
55 /*  CTL_MACHDEP definitions. */
56 #define	CPU_DEBUG		1	/* int: misc kernel debug control */
57 #define	CPU_BOOTED_DEVICE	2	/* string: device we booted from */
58 #define	CPU_BOOTED_KERNEL	3	/* string: kernel we booted */
59 #define	CPU_CONSDEV		4	/* struct: dev_t of our console */
60 #define	CPU_MAXID		5	/* number of valid machdep ids */
61 
62 #define	CTL_MACHDEP_NAMES { \
63 	{ 0, 0 }, \
64 	{ "debug", CTLTYPE_INT }, \
65 	{ "booted_device", CTLTYPE_STRING }, \
66 	{ "booted_kernel", CTLTYPE_STRING }, \
67 	{ "console_device", CTLTYPE_STRUCT }, \
68 }
69 
70 #ifdef _KERNEL
71 
72 /*
73  * Kernel-only definitions
74  */
75 
76 #ifndef _LKM
77 #include "opt_lockdebug.h"
78 #endif /* !_LKM */
79 
80 #include <arm/cpuconf.h>
81 
82 #include <machine/intr.h>
83 #ifndef _LOCORE
84 #include <sys/user.h>
85 #include <machine/frame.h>
86 #include <machine/pcb.h>
87 #endif	/* !_LOCORE */
88 
89 #include <arm/armreg.h>
90 
91 #ifdef __PROG32
92 #ifdef _LOCORE
93 #define IRQdisable \
94 	stmfd	sp!, {r0} ; \
95 	mrs	r0, cpsr_all ; \
96 	orr	r0, r0, #(I32_bit) ; \
97 	msr	cpsr_all, r0 ; \
98 	ldmfd	sp!, {r0}
99 
100 #define IRQenable \
101 	stmfd	sp!, {r0} ; \
102 	mrs	r0, cpsr_all ; \
103 	bic	r0, r0, #(I32_bit) ; \
104 	msr	cpsr_all, r0 ; \
105 	ldmfd	sp!, {r0}
106 
107 #else
108 #define IRQdisable SetCPSR(I32_bit, I32_bit);
109 #define IRQenable SetCPSR(I32_bit, 0);
110 #endif	/* _LOCORE */
111 #endif
112 
113 #ifndef _LOCORE
114 
115 /* All the CLKF_* macros take a struct clockframe * as an argument. */
116 
117 /*
118  * CLKF_USERMODE: Return TRUE/FALSE (1/0) depending on whether the
119  * frame came from USR mode or not.
120  */
121 #ifdef __PROG32
122 #define CLKF_USERMODE(frame)	((frame->if_spsr & PSR_MODE) == PSR_USR32_MODE)
123 #else
124 #define CLKF_USERMODE(frame)	((frame->if_r15 & R15_MODE) == R15_MODE_USR)
125 #endif
126 
127 /*
128  * CLKF_BASEPRI: True if we were at spl0 before the interrupt.
129  *
130  * This is hard-wired to 0 on the ARM, since spllowersoftclock() might
131  * not actually be able to unblock the interrupt, which would cause us
132  * to run the softclock interrupts with hardclock blocked.
133  */
134 #define CLKF_BASEPRI(frame)	0
135 
136 /*
137  * CLKF_INTR: True if we took the interrupt from inside another
138  * interrupt handler.
139  */
140 extern int current_intr_depth;
141 #ifdef __PROG32
142 /* Hack to treat FPE time as interrupt time so we can measure it */
143 #define CLKF_INTR(frame)						\
144 	((current_intr_depth > 1) ||					\
145 	    (frame->if_spsr & PSR_MODE) == PSR_UND32_MODE)
146 #else
147 #define CLKF_INTR(frame)	(current_intr_depth > 1)
148 #endif
149 
150 /*
151  * CLKF_PC: Extract the program counter from a clockframe
152  */
153 #ifdef __PROG32
154 #define CLKF_PC(frame)		(frame->if_pc)
155 #else
156 #define CLKF_PC(frame)		(frame->if_r15 & R15_PC)
157 #endif
158 
159 /*
160  * PROC_PC: Find out the program counter for the given process.
161  */
162 #ifdef __PROG32
163 #define PROC_PC(p)	((p)->p_addr->u_pcb.pcb_tf->tf_pc)
164 #else
165 #define PROC_PC(p)	((p)->p_addr->u_pcb.pcb_tf->tf_r15 & R15_PC)
166 #endif
167 
168 /* The address of the vector page. */
169 extern vaddr_t vector_page;
170 #ifdef __PROG32
171 void	arm32_vector_init(vaddr_t, int);
172 
173 #define	ARM_VEC_RESET			(1 << 0)
174 #define	ARM_VEC_UNDEFINED		(1 << 1)
175 #define	ARM_VEC_SWI			(1 << 2)
176 #define	ARM_VEC_PREFETCH_ABORT		(1 << 3)
177 #define	ARM_VEC_DATA_ABORT		(1 << 4)
178 #define	ARM_VEC_ADDRESS_EXCEPTION	(1 << 5)
179 #define	ARM_VEC_IRQ			(1 << 6)
180 #define	ARM_VEC_FIQ			(1 << 7)
181 
182 #define	ARM_NVEC			8
183 #define	ARM_VEC_ALL			0xffffffff
184 #endif
185 
186 /*
187  * Per-CPU information.  For now we assume one CPU.
188  */
189 
190 #include <sys/device.h>
191 #include <sys/sched.h>
192 struct cpu_info {
193 	struct schedstate_percpu ci_schedstate; /* scheduler state */
194 #if defined(DIAGNOSTIC) || defined(LOCKDEBUG)
195 	u_long ci_spin_locks;		/* # of spin locks held */
196 	u_long ci_simple_locks;		/* # of simple locks held */
197 #endif
198 	struct device *ci_dev;		/* Device corresponding to this CPU */
199 	u_int32_t ci_cpuid;		/* aggregate CPU id */
200 	u_int32_t ci_cputype;		/* CPU type */
201 	u_int32_t ci_cpurev;		/* CPU revision */
202 	u_int32_t ci_ctrl;		/* The CPU control register */
203 	struct evcnt ci_arm700bugcount;
204 };
205 
206 extern struct cpu_info cpu_info_store;
207 #define	curcpu()	(&cpu_info_store)
208 #define cpu_number()	0
209 
210 
211 /*
212  * Scheduling glue
213  */
214 
215 extern int astpending;
216 #define setsoftast() (astpending = 1)
217 
218 /*
219  * Notify the current process (p) that it has a signal pending,
220  * process as soon as possible.
221  */
222 
223 #define signotify(p)            setsoftast()
224 
225 #define cpu_wait(p)	/* nothing */
226 
227 /*
228  * Preempt the current process if in interrupt from user mode,
229  * or after the current trap/syscall if in system mode.
230  */
231 int	want_resched;		/* resched() was called */
232 #define	need_resched(ci)	(want_resched = 1, setsoftast())
233 
234 /*
235  * Give a profiling tick to the current process when the user profiling
236  * buffer pages are invalid.  On the i386, request an ast to send us
237  * through trap(), marking the proc as needing a profiling tick.
238  */
239 #define	need_proftick(p)	((p)->p_flag |= P_OWEUPC, setsoftast())
240 
241 #ifndef acorn26
242 /*
243  * cpu device glue (belongs in cpuvar.h)
244  */
245 
246 struct device;
247 void	cpu_attach	__P((struct device *));
248 #endif
249 
250 
251 /*
252  * Random cruft
253  */
254 
255 /* locore.S */
256 void atomic_set_bit	__P((u_int *address, u_int setmask));
257 void atomic_clear_bit	__P((u_int *address, u_int clearmask));
258 
259 /* cpuswitch.S */
260 struct pcb;
261 void	savectx		__P((struct pcb *pcb));
262 
263 /* ast.c */
264 void userret		__P((register struct proc *p));
265 
266 /* machdep.h */
267 void bootsync		__P((void));
268 
269 /* fault.c */
270 int badaddr_read	__P((void *, size_t, void *));
271 
272 /* syscall.c */
273 void swi_handler	__P((trapframe_t *));
274 
275 #endif	/* !_LOCORE */
276 
277 #endif /* _KERNEL */
278 
279 #endif /* !_ARM_CPU_H_ */
280 
281 /* End of cpu.h */
282