xref: /netbsd/sys/arch/arm/include/cpuconf.h (revision bf9ec67e)
1 /*	$NetBSD: cpuconf.h,v 1.2 2002/05/03 03:28:49 thorpej Exp $	*/
2 
3 /*
4  * Copyright (c 2002 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *	This product includes software developed for the NetBSD Project by
20  *	Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 #ifndef _ARM_CPUCONF_H_
39 #define	_ARM_CPUCONF_H_
40 
41 #if defined(_KERNEL_OPT)
42 #include "opt_cputypes.h"
43 #endif /* _KERNEL_OPT */
44 
45 /*
46  * Step 1: Count the number of CPU types configured into the kernel.
47  */
48 #if defined(_KERNEL_OPT)
49 #define	CPU_NTYPES	(defined(CPU_ARM2) + defined(CPU_ARM250) +	\
50 			 defined(CPU_ARM3) +				\
51 			 defined(CPU_ARM6) + defined(CPU_ARM7) +	\
52 			 defined(CPU_ARM7TDMI) +			\
53 			 defined(CPU_ARM8) + defined(CPU_ARM9) +	\
54 			 defined(CPU_SA110) + defined(CPU_SA1100) +	\
55 			 defined(CPU_SA1110) +				\
56 			 defined(CPU_XSCALE_80200) +			\
57 			 defined(CPU_XSCALE_80321) +			\
58 			 defined(CPU_XSCALE_PXA2X0))
59 #else
60 #define	CPU_NTYPES	2
61 #endif /* _KERNEL_OPT */
62 
63 /*
64  * Step 2: Determine which ARM architecture versions are configured.
65  */
66 #if !defined(_KERNEL_OPT) ||						\
67     (defined(CPU_ARM2) || defined(CPU_ARM250) || defined(CPU_ARM3))
68 #define	ARM_ARCH_2	1
69 #else
70 #define	ARM_ARCH_2	0
71 #endif
72 
73 #if !defined(_KERNEL_OPT) ||						\
74     (defined(CPU_ARM6) || defined(CPU_ARM7))
75 #define	ARM_ARCH_3	1
76 #else
77 #define	ARM_ARCH_3	0
78 #endif
79 
80 #if !defined(_KERNEL_OPT) ||						\
81     (defined(CPU_ARM7TDMI) || defined(CPU_ARM8) || defined(CPU_ARM9) ||	\
82      defined(CPU_SA110) || defined(CPU_SA1100) || defined(CPU_SA1110))
83 #define	ARM_ARCH_4	1
84 #else
85 #define	ARM_ARCH_4	0
86 #endif
87 
88 #if !defined(_KERNEL_OPT) ||						\
89     (defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) ||		\
90      defined(CPU_XSCALE_PXA2X0))
91 #define	ARM_ARCH_5	1
92 #else
93 #define	ARM_ARCH_5	0
94 #endif
95 
96 #define	ARM_NARCH	(ARM_ARCH_2 + ARM_ARCH_3 + ARM_ARCH_4 + ARM_ARCH_5)
97 #if ARM_NARCH == 0
98 #error ARM_NARCH is 0
99 #endif
100 
101 /*
102  * Step 3: Define which MMU classes are configured:
103  *
104  *	ARM_MMU_MEMC		Prehistoric, external memory controller
105  *				and MMU for ARMv2 CPUs.
106  *
107  *	ARM_MMU_GENERIC		Generic ARM MMU, compatible with ARM6.
108  *
109  *	ARM_MMU_XSCALE		XScale MMU.  Compatible with generic ARM
110  *				MMU, but also has several extensions which
111  *				require different PTE layout to use.
112  */
113 #if !defined(_KERNEL_OPT) ||						\
114     (defined(CPU_ARM2) || defined(CPU_ARM250) || defined(CPU_ARM3))
115 #define	ARM_MMU_MEMC		1
116 #else
117 #define	ARM_MMU_MEMC		0
118 #endif
119 
120 #if !defined(_KERNEL_OPT) ||						\
121     (defined(CPU_ARM6) || defined(CPU_ARM7) || defined(CPU_ARM7TDMI) ||	\
122      defined(CPU_ARM8) || defined(CPU_ARM9) || defined(CPU_SA110) ||	\
123      defined(CPU_SA1100) || defined(CPU_SA1110))
124 #define	ARM_MMU_GENERIC		1
125 #else
126 #define	ARM_MMU_GENERIC		0
127 #endif
128 
129 #if !defined(_KERNEL_OPT) ||						\
130     (defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) ||		\
131      defined(CPU_XSCALE_PXA2X0))
132 #define	ARM_MMU_XSCALE		1
133 #else
134 #define	ARM_MMU_XSCALE		0
135 #endif
136 
137 #define	ARM_NMMUS		(ARM_MMU_MEMC + ARM_MMU_GENERIC +	\
138 				 ARM_MMU_XSCALE)
139 #if ARM_NMMUS == 0
140 #error ARM_NMMUS is 0
141 #endif
142 
143 #endif /* _ARM_CPUCONF_H_ */
144