1 /* $NetBSD: cpuconf.h,v 1.4 2002/08/07 05:14:59 briggs Exp $ */ 2 3 /* 4 * Copyright (c 2002 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 #ifndef _ARM_CPUCONF_H_ 39 #define _ARM_CPUCONF_H_ 40 41 #if defined(_KERNEL_OPT) 42 #include "opt_cputypes.h" 43 #endif /* _KERNEL_OPT */ 44 45 /* 46 * Step 1: Count the number of CPU types configured into the kernel. 47 */ 48 #if defined(_KERNEL_OPT) 49 #define CPU_NTYPES (defined(CPU_ARM2) + defined(CPU_ARM250) + \ 50 defined(CPU_ARM3) + \ 51 defined(CPU_ARM6) + defined(CPU_ARM7) + \ 52 defined(CPU_ARM7TDMI) + \ 53 defined(CPU_ARM8) + defined(CPU_ARM9) + \ 54 defined(CPU_SA110) + defined(CPU_SA1100) + \ 55 defined(CPU_SA1110) + \ 56 defined(CPU_IXP12X0) + \ 57 defined(CPU_XSCALE_80200) + \ 58 defined(CPU_XSCALE_80321) + \ 59 defined(CPU_XSCALE_PXA2X0)) 60 #else 61 #define CPU_NTYPES 2 62 #endif /* _KERNEL_OPT */ 63 64 /* 65 * Step 2: Determine which ARM architecture versions are configured. 66 */ 67 #if !defined(_KERNEL_OPT) || \ 68 (defined(CPU_ARM2) || defined(CPU_ARM250) || defined(CPU_ARM3)) 69 #define ARM_ARCH_2 1 70 #else 71 #define ARM_ARCH_2 0 72 #endif 73 74 #if !defined(_KERNEL_OPT) || \ 75 (defined(CPU_ARM6) || defined(CPU_ARM7)) 76 #define ARM_ARCH_3 1 77 #else 78 #define ARM_ARCH_3 0 79 #endif 80 81 #if !defined(_KERNEL_OPT) || \ 82 (defined(CPU_ARM7TDMI) || defined(CPU_ARM8) || defined(CPU_ARM9) || \ 83 defined(CPU_SA110) || defined(CPU_SA1100) || defined(CPU_SA1110) || \ 84 defined(CPU_IXP12X0)) 85 #define ARM_ARCH_4 1 86 #else 87 #define ARM_ARCH_4 0 88 #endif 89 90 #if !defined(_KERNEL_OPT) || \ 91 (defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \ 92 defined(CPU_XSCALE_PXA2X0)) 93 #define ARM_ARCH_5 1 94 #else 95 #define ARM_ARCH_5 0 96 #endif 97 98 #define ARM_NARCH (ARM_ARCH_2 + ARM_ARCH_3 + ARM_ARCH_4 + ARM_ARCH_5) 99 #if ARM_NARCH == 0 100 #error ARM_NARCH is 0 101 #endif 102 103 /* 104 * Step 3: Define which MMU classes are configured: 105 * 106 * ARM_MMU_MEMC Prehistoric, external memory controller 107 * and MMU for ARMv2 CPUs. 108 * 109 * ARM_MMU_GENERIC Generic ARM MMU, compatible with ARM6. 110 * 111 * ARM_MMU_XSCALE XScale MMU. Compatible with generic ARM 112 * MMU, but also has several extensions which 113 * require different PTE layout to use. 114 */ 115 #if !defined(_KERNEL_OPT) || \ 116 (defined(CPU_ARM2) || defined(CPU_ARM250) || defined(CPU_ARM3)) 117 #define ARM_MMU_MEMC 1 118 #else 119 #define ARM_MMU_MEMC 0 120 #endif 121 122 #if !defined(_KERNEL_OPT) || \ 123 (defined(CPU_ARM6) || defined(CPU_ARM7) || defined(CPU_ARM7TDMI) || \ 124 defined(CPU_ARM8) || defined(CPU_ARM9) || defined(CPU_SA110) || \ 125 defined(CPU_SA1100) || defined(CPU_SA1110) || defined(CPU_IXP12X0)) 126 #define ARM_MMU_GENERIC 1 127 #else 128 #define ARM_MMU_GENERIC 0 129 #endif 130 131 #if !defined(_KERNEL_OPT) || \ 132 (defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \ 133 defined(CPU_XSCALE_PXA2X0)) 134 #define ARM_MMU_XSCALE 1 135 #else 136 #define ARM_MMU_XSCALE 0 137 #endif 138 139 #define ARM_NMMUS (ARM_MMU_MEMC + ARM_MMU_GENERIC + \ 140 ARM_MMU_XSCALE) 141 #if ARM_NMMUS == 0 142 #error ARM_NMMUS is 0 143 #endif 144 145 /* 146 * Step 4: Define features that may be present on a subset of CPUs 147 * 148 * ARM_XSCALE_PMU Performance Monitoring Unit on 80200 and 80321 149 */ 150 151 #if !defined(_KERNEL_OPT) || \ 152 (defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321)) 153 #define ARM_XSCALE_PMU 1 154 #else 155 #define ARM_XSCALE_PMU 0 156 #endif 157 158 #endif /* _ARM_CPUCONF_H_ */ 159