1 /* $NetBSD: ieee.h,v 1.2 2001/02/21 17:43:50 bjh21 Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * All advertising materials mentioning features or use of this software 12 * must display the following acknowledgement: 13 * This product includes software developed by the University of 14 * California, Lawrence Berkeley Laboratory. 15 * 16 * Redistribution and use in source and binary forms, with or without 17 * modification, are permitted provided that the following conditions 18 * are met: 19 * 1. Redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer. 21 * 2. Redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution. 24 * 3. All advertising materials mentioning features or use of this software 25 * must display the following acknowledgement: 26 * This product includes software developed by the University of 27 * California, Berkeley and its contributors. 28 * 4. Neither the name of the University nor the names of its contributors 29 * may be used to endorse or promote products derived from this software 30 * without specific prior written permission. 31 * 32 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 34 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 35 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 36 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 37 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 38 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 39 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 40 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 41 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 42 * SUCH DAMAGE. 43 * 44 * @(#)ieee.h 8.1 (Berkeley) 6/11/93 45 */ 46 47 /* 48 * ieee.h defines the machine-dependent layout of the machine's IEEE 49 * floating point. 50 */ 51 52 /* 53 * Define the number of bits in each fraction and exponent. 54 * 55 * k k+1 56 * Note that 1.0 x 2 == 0.1 x 2 and that denorms are represented 57 * 58 * (-exp_bias+1) 59 * as fractions that look like 0.fffff x 2 . This means that 60 * 61 * -126 62 * the number 0.10000 x 2 , for instance, is the same as the normalized 63 * 64 * -127 -128 65 * float 1.0 x 2 . Thus, to represent 2 , we need one leading zero 66 * 67 * -129 68 * in the fraction; to represent 2 , we need two, and so on. This 69 * 70 * (-exp_bias-fracbits+1) 71 * implies that the smallest denormalized number is 2 72 * 73 * for whichever format we are talking about: for single precision, for 74 * 75 * -126 -149 76 * instance, we get .00000000000000000000001 x 2 , or 1.0 x 2 , and 77 * 78 * -149 == -127 - 23 + 1. 79 */ 80 81 /* 82 * The ARM has two sets of FP data formats. The FPA supports 32-bit, 64-bit 83 * and 96-bit IEEE formats, with the words in big-endian order. VFP supports 84 * 32-bin and 64-bit IEEE formats with the words in the CPU's native byte 85 * order. 86 * 87 * The FPA also has two packed decimal formats, but we ignore them here. 88 */ 89 90 #define SNG_EXPBITS 8 91 #define SNG_FRACBITS 23 92 93 #define DBL_EXPBITS 11 94 #define DBL_FRACBITS 52 95 96 #ifndef __VFP_FP__ 97 #define E80_EXPBITS 15 98 #define E80_FRACBITS 64 99 100 #define EXT_EXPBITS 15 101 #define EXT_FRACBITS 112 102 #endif 103 104 struct ieee_single { 105 u_int sng_frac:23; 106 u_int sng_exponent:8; 107 u_int sng_sign:1; 108 }; 109 110 #ifdef __VFP_FP__ 111 struct ieee_double { 112 #ifdef __ARMEB__ 113 u_int dbl_sign:1; 114 u_int dbl_exp:11; 115 u_int dbl_frach:20; 116 u_int dbl_fracl; 117 #else /* !__ARMEB__ */ 118 u_int dbl_fracl; 119 u_int dbl_frach:20; 120 u_int dbl_exp:11; 121 u_int dbl_sign:1; 122 #endif /* !__ARMEB__ */ 123 }; 124 #else /* !__VFP_FP__ */ 125 struct ieee_double { 126 u_int dbl_frach:20; 127 u_int dbl_exp:11; 128 u_int dbl_sign:1; 129 u_int dbl_fracl; 130 }; 131 132 struct ieee_e80 { 133 u_int e80_exp:15; 134 u_int e80_zero:16; 135 u_int e80_sign:1; 136 u_int e80_frach:31; 137 u_int e80_j:1; 138 u_int e80_fracl; 139 }; 140 141 struct ieee_ext { 142 u_int ext_frach:16; 143 u_int ext_exp:15; 144 u_int ext_sign:1; 145 u_int ext_frachm; 146 u_int ext_fraclm; 147 u_int ext_fracl; 148 }; 149 #endif /* !__VFP_FP__ */ 150 151 /* 152 * Floats whose exponent is in [1..INFNAN) (of whatever type) are 153 * `normal'. Floats whose exponent is INFNAN are either Inf or NaN. 154 * Floats whose exponent is zero are either zero (iff all fraction 155 * bits are zero) or subnormal values. 156 * 157 * A NaN is a `signalling NaN' if its QUIETNAN bit is clear in its 158 * high fraction; if the bit is set, it is a `quiet NaN'. 159 */ 160 #define SNG_EXP_INFNAN 255 161 #define DBL_EXP_INFNAN 2047 162 #ifndef __VFP_FP__ 163 #define E80_EXP_INFNAN 32767 164 #define EXT_EXP_INFNAN 32767 165 #endif /* !__VFP_FP__ */ 166 167 #if 0 168 #define SNG_QUIETNAN (1 << 22) 169 #define DBL_QUIETNAN (1 << 19) 170 #ifndef __VFP_FP__ 171 #define E80_QUIETNAN (1 << 15) 172 #define EXT_QUIETNAN (1 << 15) 173 #endif /* !__VFP_FP__ */ 174 #endif 175 176 /* 177 * Exponent biases. 178 */ 179 #define SNG_EXP_BIAS 127 180 #define DBL_EXP_BIAS 1023 181 #ifndef __VFP_FP__ 182 #define E80_EXP_BIAS 16383 183 #define EXT_EXP_BIAS 16383 184 #endif /* !__VFP_FP__ */ 185