xref: /netbsd/sys/arch/arm/iomd/iomd_fiq.S (revision bf9ec67e)
1/*	$NetBSD: iomd_fiq.S,v 1.2 2001/12/20 01:20:23 thorpej Exp $	*/
2
3/*
4 * Copyright (c) 1994-1996 Mark Brinicombe.
5 * Copyright (c) 1994 Brini.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 *    must display the following acknowledgement:
18 *	This product includes software developed by Mark Brinicombe.
19 * 4. The name of the company nor the name of the author may be used to
20 *    endorse or promote products derived from this software without specific
21 *    prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
24 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
25 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL HTE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
27 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * SUCH DAMAGE.
34 *
35 * RiscBSD kernel project
36 *
37 * fiq.S
38 *
39 * Low level fiq handlers
40 *
41 * Created      : 27/09/94
42 */
43
44#include <machine/asm.h>
45#include <machine/cpu.h>
46
47
48/*
49 * if NOFDFIQLOOPS is defined only 1 byte is transferred per
50 * FIQ. The new default behaviour is to keep looping
51 * until there are no FD FIQ's pending.
52 */
53
54/*
55 * These registers needs to be consistent with fd
56 * driver's assignment.
57 *
58 *	r8  - scratch
59 *	r9  - IOMD_FIQRQ
60 *	r10 - transfer size
61 *	r11 - data address
62 *	r12 - floppy controller DACK address (+ 0x18000 for TC)
63 *	r13 - scratch (loop counter)
64 */
65
66ENTRY_NP(floppy_read_fiq)
67	subs	r10, r10, #0x00000001
68	addeq	r12, r12, #0x00018000
69	ldrb	r8, [r12]
70	strb	r8, [r11], #0x0001
71#ifndef NOFDFIQLOOPS
72	subeqs	pc, lr, #0x00000004
73	ldrb	r8, [r9]
74	tst	r8, #0x01
75	addne	r13, r13, #0x00000001
76	bne	_C_LABEL(floppy_read_fiq)
77#endif
78	subs	pc, lr, #0x00000004
79
80	.global	_C_LABEL(floppy_read_fiq_end)
81_C_LABEL(floppy_read_fiq_end):
82
83
84/*
85 * These registers needs to be consistent with fd
86 * driver's assignment.
87 *
88 *	r8  - scratch
89 *	r9  - IOMD_FIQRQ
90 *	r10 - transfer size
91 *	r11 - data address
92 *	r12 - floppy controller DACK address (+ 0x18000 for TC)
93 *	r13 - scratch (loop counter)
94 */
95
96ENTRY_NP(floppy_write_fiq)
97	subs	r10, r10, #0x00000001
98	addeq	r12, r12, #0x00018000
99	ldrb	r8, [r11], #0x0001
100	strb	r8, [r12]
101#ifndef NOFDFIQLOOPS
102	subeqs	pc, lr, #0x00000004
103	ldrb	r8, [r9]
104	tst	r8, #0x01
105	addne	r13, r13, #0x00000001
106	bne	_C_LABEL(floppy_write_fiq)
107#endif
108	subs	pc, lr, #0x00000004
109
110	.global	_C_LABEL(floppy_write_fiq_end)
111_C_LABEL(floppy_write_fiq_end):
112