1 /* $NetBSD: iomd_irqhandler.c,v 1.18 2010/12/20 00:25:28 matt Exp $ */ 2 3 /* 4 * Copyright (c) 1994-1998 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Mark Brinicombe 21 * for the NetBSD Project. 22 * 4. The name of the company nor the name of the author may be used to 23 * endorse or promote products derived from this software without specific 24 * prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 27 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 28 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 29 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 30 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 31 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 35 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 * 37 * IRQ/FIQ initialisation, claim, release and handler routines 38 * 39 * from: irqhandler.c,v 1.14 1997/04/02 21:52:19 christos Exp $ 40 */ 41 42 #include <sys/cdefs.h> 43 __KERNEL_RCSID(0, "$NetBSD: iomd_irqhandler.c,v 1.18 2010/12/20 00:25:28 matt Exp $"); 44 45 #include "opt_irqstats.h" 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/syslog.h> 50 #include <sys/malloc.h> 51 52 #include <arm/iomd/iomdreg.h> 53 #include <arm/iomd/iomdvar.h> 54 55 #include <machine/intr.h> 56 #include <machine/cpu.h> 57 #include <arm/arm32/katelib.h> 58 59 irqhandler_t *irqhandlers[NIRQS]; 60 61 u_int current_mask; 62 u_int actual_mask; 63 u_int disabled_mask; 64 u_int irqmasks[NIPL]; 65 66 extern char *_intrnames; 67 68 /* Prototypes */ 69 70 extern void set_spl_masks(void); 71 72 /* 73 * void irq_init(void) 74 * 75 * Initialise the IRQ/FIQ sub system 76 */ 77 78 void 79 irq_init(void) 80 { 81 int loop; 82 83 /* Clear all the IRQ handlers and the irq block masks */ 84 for (loop = 0; loop < NIRQS; ++loop) 85 irqhandlers[loop] = NULL; 86 87 /* Clear the IRQ/FIQ masks in the IOMD */ 88 IOMD_WRITE_BYTE(IOMD_IRQMSKA, 0x00); 89 IOMD_WRITE_BYTE(IOMD_IRQMSKB, 0x00); 90 91 switch (IOMD_ID) { 92 case RPC600_IOMD_ID: 93 break; 94 case ARM7500_IOC_ID: 95 case ARM7500FE_IOC_ID: 96 IOMD_WRITE_BYTE(IOMD_IRQMSKC, 0x00); 97 IOMD_WRITE_BYTE(IOMD_IRQMSKD, 0x00); 98 break; 99 default: 100 printf("Unknown IOMD id (%d) found in irq_init()\n", IOMD_ID); 101 } 102 103 IOMD_WRITE_BYTE(IOMD_FIQMSK, 0x00); 104 IOMD_WRITE_BYTE(IOMD_DMAMSK, 0x00); 105 106 /* 107 * Setup the irqmasks for the different Interrupt Priority Levels 108 * We will start with no bits set and these will be updated as handlers 109 * are installed at different IPL's. 110 */ 111 for (loop = 0; loop < NIPL; ++loop) 112 irqmasks[loop] = 0; 113 114 current_mask = 0x00000000; 115 disabled_mask = 0x00000000; 116 actual_mask = 0x00000000; 117 118 set_spl_masks(); 119 120 /* Enable IRQ's and FIQ's */ 121 enable_interrupts(I32_bit | F32_bit); 122 } 123 124 125 /* 126 * int irq_claim(int irq, irqhandler_t *handler) 127 * 128 * Enable an IRQ and install a handler for it. 129 */ 130 131 int 132 irq_claim(int irq, irqhandler_t *handler) 133 { 134 int level; 135 u_int oldirqstate; 136 137 #ifdef DIAGNOSTIC 138 /* Sanity check */ 139 if (handler == NULL) 140 panic("NULL interrupt handler"); 141 if (handler->ih_func == NULL) 142 panic("Interrupt handler does not have a function"); 143 #endif /* DIAGNOSTIC */ 144 145 /* 146 * IRQ_INSTRUCT indicates that we should get the irq number 147 * from the irq structure 148 */ 149 if (irq == IRQ_INSTRUCT) 150 irq = handler->ih_num; 151 152 /* Make sure the irq number is valid */ 153 if (irq < 0 || irq >= NIRQS) 154 return -1; 155 156 /* Make sure the level is valid */ 157 if (handler->ih_level < 0 || handler->ih_level >= NIPL) 158 return -1; 159 160 oldirqstate = disable_interrupts(I32_bit); 161 162 /* Attach handler at top of chain */ 163 handler->ih_next = irqhandlers[irq]; 164 irqhandlers[irq] = handler; 165 166 /* 167 * Reset the flags for this handler. 168 * As the handler is now in the chain mark it as active. 169 */ 170 handler->ih_flags = 0 | IRQ_FLAG_ACTIVE; 171 172 /* 173 * Record the interrupt number for accounting. 174 * Done here as the accounting number may not be the same as the 175 * IRQ number though for the moment they are 176 */ 177 handler->ih_num = irq; 178 179 #ifdef IRQSTATS 180 /* Get the interrupt name from the head of the list */ 181 if (handler->ih_name) { 182 char *ptr = _intrnames + (irq * 14); 183 strcpy(ptr, " "); 184 strncpy(ptr, handler->ih_name, 185 min(strlen(handler->ih_name), 13)); 186 } else { 187 char *ptr = _intrnames + (irq * 14); 188 sprintf(ptr, "irq %2d ", irq); 189 } 190 #endif /* IRQSTATS */ 191 192 /* 193 * Update the irq masks. 194 * Find the lowest interrupt priority on the irq chain. 195 * Interrupt is allowable at priorities lower than this. 196 * If ih_level is out of range then don't bother to update 197 * the masks. 198 */ 199 if (handler->ih_level >= 0 && handler->ih_level < NIPL) { 200 irqhandler_t *ptr; 201 202 /* 203 * Find the lowest interrupt priority on the irq chain. 204 * Interrupt is allowable at priorities lower than this. 205 */ 206 ptr = irqhandlers[irq]; 207 if (ptr) { 208 int max_level; 209 210 level = ptr->ih_level - 1; 211 max_level = ptr->ih_level - 1; 212 while (ptr) { 213 if (ptr->ih_level - 1 < level) 214 level = ptr->ih_level - 1; 215 else if (ptr->ih_level - 1 > max_level) 216 max_level = ptr->ih_level - 1; 217 ptr = ptr->ih_next; 218 } 219 /* Clear out any levels that we cannot now allow */ 220 while (max_level >=0 && max_level > level) { 221 irqmasks[max_level] &= ~(1 << irq); 222 --max_level; 223 } 224 while (level >= 0) { 225 irqmasks[level] |= (1 << irq); 226 --level; 227 } 228 } 229 230 #include "sl.h" 231 #include "ppp.h" 232 #if NSL > 0 || NPPP > 0 233 /* In the presence of SLIP or PPP, splimp > spltty. */ 234 irqmasks[IPL_NET] &= irqmasks[IPL_TTY]; 235 #endif 236 } 237 238 enable_irq(irq); 239 set_spl_masks(); 240 restore_interrupts(oldirqstate); 241 242 return 0; 243 } 244 245 246 /* 247 * int irq_release(int irq, irqhandler_t *handler) 248 * 249 * Disable an IRQ and remove a handler for it. 250 */ 251 252 int 253 irq_release(int irq, irqhandler_t *handler) 254 { 255 int level; 256 irqhandler_t *irqhand; 257 irqhandler_t **prehand; 258 #ifdef IRQSTATS 259 extern char *_intrnames; 260 #endif 261 262 /* 263 * IRQ_INSTRUCT indicates that we should get the irq number 264 * from the irq structure 265 */ 266 if (irq == IRQ_INSTRUCT) 267 irq = handler->ih_num; 268 269 /* Make sure the irq number is valid */ 270 if (irq < 0 || irq >= NIRQS) 271 return(-1); 272 273 /* Locate the handler */ 274 irqhand = irqhandlers[irq]; 275 prehand = &irqhandlers[irq]; 276 277 while (irqhand && handler != irqhand) { 278 prehand = &irqhand->ih_next; 279 irqhand = irqhand->ih_next; 280 } 281 282 /* Remove the handler if located */ 283 if (irqhand) 284 *prehand = irqhand->ih_next; 285 else 286 return -1; 287 288 /* Now the handler has been removed from the chain mark is as inactive */ 289 irqhand->ih_flags &= ~IRQ_FLAG_ACTIVE; 290 291 /* Make sure the head of the handler list is active */ 292 if (irqhandlers[irq]) 293 irqhandlers[irq]->ih_flags |= IRQ_FLAG_ACTIVE; 294 295 #ifdef IRQSTATS 296 /* Get the interrupt name from the head of the list */ 297 if (irqhandlers[irq] && irqhandlers[irq]->ih_name) { 298 char *ptr = _intrnames + (irq * 14); 299 strcpy(ptr, " "); 300 strncpy(ptr, irqhandlers[irq]->ih_name, 301 min(strlen(irqhandlers[irq]->ih_name), 13)); 302 } else { 303 char *ptr = _intrnames + (irq * 14); 304 sprintf(ptr, "irq %2d ", irq); 305 } 306 #endif /* IRQSTATS */ 307 308 /* 309 * Update the irq masks. 310 * If ih_level is out of range then don't bother to update 311 * the masks. 312 */ 313 if (handler->ih_level >= 0 && handler->ih_level < NIPL) { 314 irqhandler_t *ptr; 315 316 /* Clean the bit from all the masks */ 317 for (level = 0; level < NIPL; ++level) 318 irqmasks[level] &= ~(1 << irq); 319 320 /* 321 * Find the lowest interrupt priority on the irq chain. 322 * Interrupt is allowable at priorities lower than this. 323 */ 324 ptr = irqhandlers[irq]; 325 if (ptr) { 326 level = ptr->ih_level - 1; 327 while (ptr) { 328 if (ptr->ih_level - 1 < level) 329 level = ptr->ih_level - 1; 330 ptr = ptr->ih_next; 331 } 332 while (level >= 0) { 333 irqmasks[level] |= (1 << irq); 334 --level; 335 } 336 } 337 } 338 339 /* 340 * Disable the appropriate mask bit if there are no handlers left for 341 * this IRQ. 342 */ 343 if (irqhandlers[irq] == NULL) 344 disable_irq(irq); 345 346 set_spl_masks(); 347 348 return 0; 349 } 350 351 352 void * 353 intr_claim(int irq, int level, const char *name, int (*ih_func)(void *), 354 void *ih_arg) 355 { 356 irqhandler_t *ih; 357 358 ih = malloc(sizeof(*ih), M_DEVBUF, M_NOWAIT); 359 if (!ih) 360 panic("intr_claim(): Cannot malloc handler memory"); 361 362 ih->ih_level = level; 363 ih->ih_name = name; 364 ih->ih_func = ih_func; 365 ih->ih_arg = ih_arg; 366 ih->ih_flags = 0; 367 368 if (irq_claim(irq, ih) != 0) 369 return NULL; 370 return ih; 371 } 372 373 374 int 375 intr_release(void *arg) 376 { 377 irqhandler_t *ih = (irqhandler_t *)arg; 378 379 if (irq_release(ih->ih_num, ih) == 0) { 380 free(ih, M_DEVBUF); 381 return 0 ; 382 } 383 return 1; 384 } 385 386 #if 0 387 u_int 388 disable_interrupts(u_int mask) 389 { 390 u_int cpsr; 391 392 cpsr = SetCPSR(mask, mask); 393 return cpsr; 394 } 395 396 397 u_int 398 restore_interrupts(u_int old_cpsr) 399 { 400 int mask = I32_bit | F32_bit; 401 402 return SetCPSR(mask, old_cpsr & mask); 403 } 404 405 406 u_int 407 enable_interrupts(u_int mask) 408 { 409 410 return SetCPSR(mask, 0); 411 } 412 #endif 413 414 /* 415 * void disable_irq(int irq) 416 * 417 * Disables a specific irq. The irq is removed from the master irq mask 418 */ 419 420 void 421 disable_irq(int irq) 422 { 423 u_int oldirqstate; 424 425 oldirqstate = disable_interrupts(I32_bit); 426 current_mask &= ~(1 << irq); 427 irq_setmasks(); 428 restore_interrupts(oldirqstate); 429 } 430 431 432 /* 433 * void enable_irq(int irq) 434 * 435 * Enables a specific irq. The irq is added to the master irq mask 436 * This routine should be used with caution. A handler should already 437 * be installed. 438 */ 439 440 void 441 enable_irq(int irq) 442 { 443 u_int oldirqstate; 444 445 oldirqstate = disable_interrupts(I32_bit); 446 current_mask |= (1 << irq); 447 irq_setmasks(); 448 restore_interrupts(oldirqstate); 449 } 450 451 452 /* 453 * void stray_irqhandler(u_int mask) 454 * 455 * Handler for stray interrupts. This gets called if a handler cannot be 456 * found for an interrupt. 457 */ 458 459 void 460 stray_irqhandler(u_int mask) 461 { 462 static u_int stray_irqs = 0; 463 464 if (++stray_irqs <= 8) 465 log(LOG_ERR, "Stray interrupt %08x%s\n", mask, 466 stray_irqs >= 8 ? ": stopped logging" : ""); 467 } 468