1 /* $NetBSD: ixp12x0var.h,v 1.2 2002/10/09 00:09:37 thorpej Exp $ */ 2 /* 3 * Copyright (c) 2002 4 * Ichiro FUKUHARA <ichiro@ichiro.org>. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Ichiro FUKUHARA. 18 * 4. The name of the company nor the name of the author may be used to 19 * endorse or promote products derived from this software without specific 20 * prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR 26 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35 #ifndef _IXP12X0VAR_H_ 36 #define _IXP12X0VAR_H_ 37 38 #include <sys/conf.h> 39 #include <sys/device.h> 40 #include <sys/queue.h> 41 42 #include <machine/bus.h> 43 44 #include <dev/pci/pcivar.h> 45 46 #define IXPREG(reg) *((volatile u_int32_t*) (reg)) 47 48 struct ixp12x0_softc { 49 struct device sc_dev; 50 bus_space_tag_t sc_iot; 51 bus_space_handle_t sc_ioh; /* IRQ handle */ 52 53 u_int32_t sc_intrmask; 54 55 /* Handles for the various subregions. */ 56 bus_space_handle_t sc_pci_ioh; 57 58 /* I/O window vaddr */ 59 60 /* PCI address */ 61 62 /* Bus space, DMA, and PCI tags for the PCI bus */ 63 struct bus_space ia_pci_iot; 64 struct bus_space ia_pci_memt; 65 struct arm32_bus_dma_tag ia_pci_dmat; 66 struct arm32_pci_chipset ia_pci_chipset; 67 68 /* GPIO */ 69 }; 70 71 struct intrhand { 72 TAILQ_ENTRY(intrhand) ih_list; /* link on intrq list */ 73 int (*ih_func)(void *); /* interrupt handler */ 74 void *ih_arg; /* arg for handler */ 75 int ih_ipl; /* IPL_* */ 76 int ih_irq; /* IRQ number */ 77 }; 78 79 #define IRQNAMESIZE sizeof("ixpintr ipl xxx") 80 81 struct intrq { 82 TAILQ_HEAD(, intrhand) iq_list; /* handler list */ 83 struct evcnt iq_ev; /* event counter */ 84 u_int32_t iq_mask; /* IRQs to mask while handling */ 85 u_int32_t iq_pci_mask; /* PCI IRQs to mask while handling */ 86 u_int32_t iq_levels; /* IPL_*'s this IRQ has */ 87 char iq_name[IRQNAMESIZE]; /* interrupt name */ 88 }; 89 90 struct pmap_ent { 91 const char* msg; 92 vaddr_t va; 93 paddr_t pa; 94 vsize_t sz; 95 int prot; 96 int cache; 97 }; 98 99 void ixp12x0_bs_init(bus_space_tag_t, void *); 100 void ixp12x0_io_bs_init(bus_space_tag_t, void *); 101 void ixp12x0_mem_bs_init(bus_space_tag_t, void *); 102 void ixp12x0_pci_init(pci_chipset_tag_t, void *); 103 void ixp12x0_pci_dma_init(bus_dma_tag_t, void *); 104 void ixp12x0_attach(struct ixp12x0_softc *); 105 void ixp12x0_intr_init(void); 106 void *ixp12x0_intr_establish(int irq, int ipl, int (*)(void *), void *); 107 void ixp12x0_intr_disestablish(void *); 108 void ixp12x0_pmap_chunk_table(vaddr_t l1pt, struct pmap_ent* m); 109 void ixp12x0_pmap_io_reg(vaddr_t l1pt); 110 void ixp12x0_reset(void); 111 112 #endif /* _IXP12X0VAR_H_ */ 113