xref: /netbsd/sys/arch/arm/s3c2xx0/s3c2800.c (revision c4a72b64)
1 /*	$NetBSD: s3c2800.c,v 1.1 2002/11/20 17:52:49 bsh Exp $ */
2 
3 /*
4  * Copyright (c) 2002 Fujitsu Component Limited
5  * Copyright (c) 2002 Genetec Corporation
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. Neither the name of The Fujitsu Component Limited nor the name of
17  *    Genetec corporation may not be used to endorse or promote products
18  *    derived from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC
21  * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
22  * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
23  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24  * DISCLAIMED.  IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC
25  * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
28  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
29  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  */
34 
35 
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/device.h>
39 #include <sys/kernel.h>
40 #include <sys/reboot.h>
41 
42 #include <machine/cpu.h>
43 #include <machine/bus.h>
44 
45 #include <arm/cpufunc.h>
46 #include <arm/mainbus/mainbus.h>
47 #include <arm/s3c2xx0/s3c2800reg.h>
48 #include <arm/s3c2xx0/s3c2800var.h>
49 
50 #include "locators.h"
51 
52 /* prototypes */
53 static int	s3c2800_match(struct device *, struct cfdata *, void *);
54 static void	s3c2800_attach(struct device *, struct device *, void *);
55 static int	s3c2800_search(struct device *, struct cfdata *, void *);
56 
57 /* attach structures */
58 CFATTACH_DECL(ssio, sizeof(struct s3c2800_softc), s3c2800_match, s3c2800_attach,
59     NULL, NULL);
60 
61 extern struct bus_space s3c2xx0_bs_tag;
62 
63 struct s3c2xx0_softc *s3c2xx0_softc;
64 
65 static int
66 s3c2800_print(void *aux, const char *name)
67 {
68 	struct s3c2xx0_attach_args *sa = (struct s3c2xx0_attach_args *) aux;
69 
70 	if (sa->sa_size)
71 		printf(" addr 0x%lx", sa->sa_addr);
72 	if (sa->sa_size > 1)
73 		printf("-0x%lx", sa->sa_addr + sa->sa_size - 1);
74 	if (sa->sa_intr != SSIOCF_INTR_DEFAULT)
75 		printf(" intr %d", sa->sa_intr);
76 	if (sa->sa_index != SSIOCF_INDEX_DEFAULT)
77 		printf(" unit %d", sa->sa_index);
78 
79 	return (UNCONF);
80 }
81 
82 int
83 s3c2800_match(struct device *parent, struct cfdata *match, void *aux)
84 {
85 	return 1;
86 }
87 
88 void
89 s3c2800_attach(struct device *parent, struct device *self, void *aux)
90 {
91 	struct s3c2800_softc *sc = (struct s3c2800_softc *) self;
92 	bus_space_tag_t iot;
93 	const char *which_registers;	/* for panic message */
94 
95 #define FAIL(which)  do { \
96 	which_registers=(which); goto abort; }while(/*CONSTCOND*/0)
97 
98 	s3c2xx0_softc = &(sc->sc_sx);
99 	sc->sc_sx.sc_iot = iot = &s3c2xx0_bs_tag;
100 
101 	if (bus_space_map(iot,
102 		S3C2800_INTCTL_BASE, S3C2800_INTCTL_SIZE,
103 		BUS_SPACE_MAP_LINEAR, &sc->sc_sx.sc_intctl_ioh))
104 		FAIL("intc");
105 	/* tell register addresses to interrupt handler */
106 	s3c2800_intr_init(sc);
107 
108 	/* Map the GPIO registers */
109 	if (bus_space_map(iot, S3C2800_GPIO_BASE, S3C2800_GPIO_SIZE,
110 		0, &sc->sc_sx.sc_gpio_ioh))
111 		FAIL("GPIO");
112 
113 #if 0
114 	/* Map the DMA controller registers */
115 	if (bus_space_map(iot, S3C2800_DMAC_BASE, S3C2800_DMAC_SIZE,
116 		0, &sc->sc_sx.sc_dmach))
117 		FAIL("DMAC");
118 #endif
119 
120 	/* Memory controller */
121 	if (bus_space_map(iot, S3C2800_MEMCTL_BASE,
122 		S3C2800_MEMCTL_SIZE, 0, &sc->sc_sx.sc_memctl_ioh))
123 		FAIL("MEMC");
124 	/* Clock manager */
125 	if (bus_space_map(iot, S3C2800_CLKMAN_BASE,
126 		S3C2800_CLKMAN_SIZE, 0, &sc->sc_sx.sc_clkman_ioh))
127 		FAIL("CLK");
128 
129 #if 0
130 	/* Real time clock */
131 	if (bus_space_map(iot, S3C2800_RTC_BASE,
132 		S3C2800_RTC_SIZE, 0, &sc->sc_sx.sc_rtc_ioh))
133 		FAIL("RTC");
134 #endif
135 
136 	if (bus_space_map(iot, S3C2800_TIMER0_BASE,
137 		S3C2800_TIMER_SIZE, 0, &sc->sc_tmr0_ioh))
138 		FAIL("TIMER0");
139 
140 	if (bus_space_map(iot, S3C2800_TIMER1_BASE,
141 		S3C2800_TIMER_SIZE, 0, &sc->sc_tmr1_ioh))
142 		FAIL("TIMER0");
143 
144 
145 	printf("\n");
146 
147 
148 	/*
149 	 *  Attach devices.
150 	 */
151 	config_search(s3c2800_search, self, NULL);
152 	return;
153 
154 abort:
155 	panic("%s: unable to map %s registers",
156 	    self->dv_xname, which_registers);
157 
158 #undef FAIL
159 }
160 
161 int
162 s3c2800_search(struct device * parent, struct cfdata * cf, void *aux)
163 {
164 	struct s3c2800_softc *sc = (struct s3c2800_softc *) parent;
165 	struct s3c2xx0_attach_args aa;
166 
167 	aa.sa_sc = sc;
168 	aa.sa_iot = sc->sc_sx.sc_iot;
169 	aa.sa_addr = cf->cf_loc[SSIOCF_ADDR];
170 	aa.sa_size = cf->cf_loc[SSIOCF_SIZE];
171 	aa.sa_index = cf->cf_loc[SSIOCF_INDEX];
172 	aa.sa_intr = cf->cf_loc[SSIOCF_INTR];
173 
174 	if (config_match(parent, cf, &aa))
175 		config_attach(parent, cf, &aa, s3c2800_print);
176 
177 	return 0;
178 }
179 
180 void
181 s3c2800_softreset(void)
182 {
183 	/* XXX */
184 }
185