xref: /netbsd/sys/arch/arm/xscale/i80200_irq.S (revision bf9ec67e)
1/*	$NetBSD: i80200_irq.S,v 1.1 2002/01/24 01:12:40 thorpej Exp $	*/
2
3/*
4 * Copyright (c) 2002 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 *    must display the following acknowledgement:
19 *	This product includes software developed for the NetBSD Project by
20 *	Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 *    or promote products derived from this software without specific prior
23 *    written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38#include "assym.h"
39
40#include <machine/asm.h>
41#include <machine/cpu.h>
42#include <machine/frame.h>
43
44#include <arm/xscale/i80200reg.h>
45
46/*
47 * irq_entry:
48 *
49 *	Main entry point for the IRQ vector.
50 *
51 *	This function reads the 2 IQ80310 CPLD interrupt source
52 *	registers, and then calls the installed handlers for each
53 *	bit that is set.  The function stray_irqhandler is called
54 *	if a handler is not defined for a particular interrupt.
55 *
56 *	If an interrupt handler is found, then it is called with
57 *	r0 containing the argument defined in the handler structure.
58 *	If the field ih_arg is zero, then a pointer to the IRQ frame
59 *	on the stack is passed instead.
60 */
61
62	.text
63	.align	0
64
65Lcurrent_intr_depth:
66	.word	_C_LABEL(current_intr_depth)
67	.word	_C_LABEL(prev_intr_depth)
68
69Lintr_dispatch:
70	.word	_C_LABEL(i80200_extirq_dispatch)
71
72Lastpending:
73	.word	_C_LABEL(astpending)
74
75ASENTRY_NP(irq_entry)
76	sub	lr, lr, #0x00000004	/* Adjust the lr */
77
78	PUSHFRAMEINSVC			/* Push an interrupt frame */
79
80	/*
81	 * Note that we have entered the IRQ handler.  We are
82	 * in SVC mode so we cannot use the processor mode to
83	 * determine if we are in an IRQ.  Instead, we will
84	 * count each time the interrupt handler is nested.
85	 */
86	ldr	r0, Lcurrent_intr_depth
87	ldr	r2, Lcurrent_intr_depth+4
88	ldr	r1, [r0]
89	str	r1, [r2]
90	add	r1, r1, #1
91	str	r1, [r0]
92
93	/*
94	 * Get the interrupt status into a callee-save register.
95	 */
96	mrc	p13, 0, r4, c1, c0, 0
97
98	/*
99	 * XXX Right here will be a good place to check for PMU
100	 * XXX interrupts, if we decide to use IRQs for them.
101	 */
102
103	/*
104	 * Check for external IRQs.  If we have one, call the
105	 * external IRQ dispatcher.  The argument is a pointer
106	 * to the stack frame.  This function will be called with
107	 * interrupts disabled, and will return with interrupts
108	 * disabled.
109	 */
110	tst	r4, #(INTSRC_II)
111	bne	Lextirq_return		/* no external IRQ pending */
112	ldr	r1, Lintr_dispatch
113	add	lr, pc, #Lextirq_return - . - 8
114	mov	r0, sp
115	ldr	pc, [r1]
116Lextirq_return:
117
118	/* Decremement the nest count. */
119	ldr	r0, Lcurrent_intr_depth
120	ldr	r2, Lcurrent_intr_depth+4
121	ldr	r1, [r0]
122	str	r1, [r2]
123	sub	r1, r1, #1
124	str	r1, [r0]
125
126	/*
127	 * If we're returning to user mode, check for pending ASTs.
128	 */
129	ldr	r0, [sp]		/* Get the SPSR from stack */
130	and	r0, r0, #(PSR_MODE)	/* Test for USR32 mode before the IRQ */
131	teq	r0, #(PSR_USR32_MODE)
132	bne	Lirqout			/* Nope, get out now */
133
134Lastloop:
135	ldr	r0, Lastpending		/* Do we have an AST pending? */
136	ldr	r1, [r0]
137	teq	r1, #0x00000000
138	beq	Lirqout			/* Nope, get out now */
139
140	mov	r1, #0x00000000
141	str	r1, [r0]		/* Clear astpending */
142
143	mrs	r4, cpsr_all		/* save CPSR */
144	bic	r0, r4, #(I32_bit)	/* Enable IRQs */
145	msr	cpsr_all, r0
146
147	mov	r0, sp
148	bl	_C_LABEL(ast)		/* ast(frame) */
149
150	msr	cpsr_all, r4		/* Disable IRQs */
151	b	Lastloop		/* Check for more ASTs */
152
153Lirqout:
154	PULLFRAMEFROMSVCANDEXIT
155	movs	pc, lr			/* Exit */
156
157	.bss
158	.align	0
159
160	.global _C_LABEL(astpending)
161_C_LABEL(astpending):
162	.word	0
163
164	.global	_C_LABEL(current_intr_depth)
165_C_LABEL(current_intr_depth):
166	.word	0
167
168	.global	_C_LABEL(prev_intr_depth)
169_C_LABEL(prev_intr_depth):
170	.word	0
171
172	/*
173	 * XXX Provide intrnames/intrcnt for legacy code, but
174	 * don't actually use them.
175	 */
176
177	.global _C_LABEL(intrnames), _C_LABEL(eintrnames)
178	.global _C_LABEL(intrcnt), _C_LABEL(eintrcnt)
179_C_LABEL(intrnames):
180_C_LABEL(eintrnames):
181
182	.global _C_LABEL(intrcnt), _C_LABEL(sintrcnt), _C_LABEL(eintrcnt)
183_C_LABEL(intrcnt):
184_C_LABEL(eintrcnt):
185