xref: /netbsd/sys/arch/arm/xscale/i80312_space.c (revision bf9ec67e)
1 /*	$NetBSD: i80312_space.c,v 1.3 2002/04/12 19:02:30 thorpej Exp $	*/
2 
3 /*
4  * Copyright (c) 2001 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *	This product includes software developed for the NetBSD Project by
20  *	Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 /*
39  * bus_space functions for i80312 Companion I/O chip.
40  */
41 
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 
45 #include <uvm/uvm_extern.h>
46 
47 #include <machine/bus.h>
48 
49 #include <arm/xscale/i80312reg.h>
50 #include <arm/xscale/i80312var.h>
51 
52 /* Prototypes for all the bus_space structure functions */
53 bs_protos(i80312);
54 bs_protos(i80312_io);
55 bs_protos(i80312_mem);
56 bs_protos(generic);
57 bs_protos(generic_armv4);
58 bs_protos(bs_notimpl);
59 
60 /*
61  * Template bus_space -- copied, and the bits that are NULL are
62  * filled in.
63  */
64 const struct bus_space i80312_bs_tag_template = {
65 	/* cookie */
66 	(void *) 0,
67 
68 	/* mapping/unmapping */
69 	NULL,
70 	NULL,
71 	i80312_bs_subregion,
72 
73 	/* allocation/deallocation */
74 	NULL,
75 	NULL,
76 
77 	/* get kernel virtual address */
78 	i80312_bs_vaddr,
79 
80 	/* mmap */
81 	i80312_bs_mmap,
82 
83 	/* barrier */
84 	i80312_bs_barrier,
85 
86 	/* read (single) */
87 	generic_bs_r_1,
88 	generic_armv4_bs_r_2,
89 	generic_bs_r_4,
90 	bs_notimpl_bs_r_8,
91 
92 	/* read multiple */
93 	generic_bs_rm_1,
94 	generic_armv4_bs_rm_2,
95 	generic_bs_rm_4,
96 	bs_notimpl_bs_rm_8,
97 
98 	/* read region */
99 	bs_notimpl_bs_rr_1,
100 	generic_armv4_bs_rr_2,
101 	generic_bs_rr_4,
102 	bs_notimpl_bs_rr_8,
103 
104 	/* write (single) */
105 	generic_bs_w_1,
106 	generic_armv4_bs_w_2,
107 	generic_bs_w_4,
108 	bs_notimpl_bs_w_8,
109 
110 	/* write multiple */
111 	generic_bs_wm_1,
112 	generic_armv4_bs_wm_2,
113 	generic_bs_wm_4,
114 	bs_notimpl_bs_wm_8,
115 
116 	/* write region */
117 	bs_notimpl_bs_wr_1,
118 	generic_armv4_bs_wr_2,
119 	generic_bs_wr_4,
120 	bs_notimpl_bs_wr_8,
121 
122 	/* set multiple */
123 	bs_notimpl_bs_sm_1,
124 	bs_notimpl_bs_sm_2,
125 	bs_notimpl_bs_sm_4,
126 	bs_notimpl_bs_sm_8,
127 
128 	/* set region */
129 	bs_notimpl_bs_sr_1,
130 	generic_armv4_bs_sr_2,
131 	bs_notimpl_bs_sr_4,
132 	bs_notimpl_bs_sr_8,
133 
134 	/* copy */
135 	bs_notimpl_bs_c_1,
136 	generic_armv4_bs_c_2,
137 	bs_notimpl_bs_c_4,
138 	bs_notimpl_bs_c_8,
139 };
140 
141 void
142 i80312_bs_init(bus_space_tag_t bs, void *cookie)
143 {
144 
145 	*bs = i80312_bs_tag_template;
146 	bs->bs_cookie = cookie;
147 }
148 
149 void
150 i80312_io_bs_init(bus_space_tag_t bs, void *cookie)
151 {
152 
153 	*bs = i80312_bs_tag_template;
154 	bs->bs_cookie = cookie;
155 
156 	bs->bs_map = i80312_io_bs_map;
157 	bs->bs_unmap = i80312_io_bs_unmap;
158 	bs->bs_alloc = i80312_io_bs_alloc;
159 	bs->bs_free = i80312_io_bs_free;
160 
161 	bs->bs_vaddr = i80312_io_bs_vaddr;
162 }
163 
164 void
165 i80312_mem_bs_init(bus_space_tag_t bs, void *cookie)
166 {
167 
168 	*bs = i80312_bs_tag_template;
169 	bs->bs_cookie = cookie;
170 
171 	bs->bs_map = i80312_mem_bs_map;
172 	bs->bs_unmap = i80312_mem_bs_unmap;
173 	bs->bs_alloc = i80312_mem_bs_alloc;
174 	bs->bs_free = i80312_mem_bs_free;
175 
176 	bs->bs_mmap = i80312_mem_bs_mmap;
177 }
178 
179 /* *** Routines shared by i80312, PCI IO, and PCI MEM. *** */
180 
181 int
182 i80312_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
183     bus_size_t size, bus_space_handle_t *nbshp)
184 {
185 
186 	*nbshp = bsh + offset;
187 	return (0);
188 }
189 
190 void
191 i80312_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
192     bus_size_t len, int flags)
193 {
194 
195 	/* Nothing to do. */
196 }
197 
198 void *
199 i80312_bs_vaddr(void *t, bus_space_handle_t bsh)
200 {
201 
202 	return ((void *)bsh);
203 }
204 
205 paddr_t
206 i80312_bs_mmap(void *t, bus_addr_t addr, off_t off, int prot, int flags)
207 {
208 
209 	/* Not supported. */
210 	return (-1);
211 }
212 
213 /* *** Routines for PCI IO. *** */
214 
215 int
216 i80312_io_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags,
217     bus_space_handle_t *bshp)
218 {
219 	struct i80312_softc *sc = t;
220 	vaddr_t winvaddr;
221 	uint32_t busbase, bussize;
222 
223 	if (bpa >= sc->sc_pioout_base &&
224 	    bpa < (sc->sc_pioout_base + sc->sc_pioout_size)) {
225 		busbase = sc->sc_pioout_base;
226 		bussize = sc->sc_pioout_size;
227 		winvaddr = sc->sc_piow_vaddr;
228 	} else if (bpa >= sc->sc_sioout_base &&
229 		   bpa < (sc->sc_sioout_base + sc->sc_sioout_size)) {
230 		busbase = sc->sc_sioout_base;
231 		bussize = sc->sc_sioout_size;
232 		winvaddr = sc->sc_siow_vaddr;
233 	} else
234 		return (EINVAL);
235 
236 	if ((bpa + size) >= (busbase + bussize))
237 		return (EINVAL);
238 
239 	/*
240 	 * Found the window -- PCI I/O space is mapped at a fixed
241 	 * virtual address by board-specific code.  Translate the
242 	 * bus address to the virtual address.
243 	 */
244 	*bshp = winvaddr + (bpa - busbase);
245 
246 	return (0);
247 }
248 
249 void
250 i80312_io_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
251 {
252 
253 	/* Nothing to do. */
254 }
255 
256 int
257 i80312_io_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
258     bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
259     bus_addr_t *bpap, bus_space_handle_t *bshp)
260 {
261 
262 	panic("i80312_io_bs_alloc(): not implemented\n");
263 }
264 
265 void
266 i80312_io_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
267 {
268 
269 	panic("i80312_io_bs_free(): not implemented\n");
270 }
271 
272 void *
273 i80312_io_bs_vaddr(void *t, bus_space_handle_t bsh)
274 {
275 
276 	/* Not supported. */
277 	return (NULL);
278 }
279 
280 /* *** Routines for PCI MEM. *** */
281 
282 int
283 i80312_mem_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags,
284     bus_space_handle_t *bshp)
285 {
286 
287 	struct i80312_softc *sc = t;
288 	vaddr_t va;
289 	uint32_t busbase, bussize;
290 	paddr_t pa, endpa, physbase;
291 
292 	if (bpa >= sc->sc_pmemout_base &&
293 	    bpa < (sc->sc_pmemout_base + sc->sc_pmemout_size)) {
294 		busbase = sc->sc_pmemout_base;
295 		bussize = sc->sc_pmemout_size;
296 		physbase = I80312_PCI_XLATE_PMW_BASE;
297 	} else if (bpa >= sc->sc_smemout_base &&
298 		   bpa < (sc->sc_smemout_base + sc->sc_smemout_size)) {
299 		busbase = sc->sc_smemout_base;
300 		bussize = sc->sc_smemout_size;
301 		physbase = I80312_PCI_XLATE_SMW_BASE;
302 	} else
303 		return (EINVAL);
304 
305 	if ((bpa + size) >= (busbase + bussize))
306 		return (EINVAL);
307 
308 	/*
309 	 * Found the window -- PCI MEM space is not mapped by allocating
310 	 * some kernel VA space and mapping the pages with pmap_enter().
311 	 * pmap_enter() will map unmanaged pages as non-cacheable.
312 	 */
313 	pa = trunc_page((bpa - busbase) + physbase);
314 	endpa = round_page(((bpa - busbase) + physbase) + size);
315 
316 	va = uvm_km_valloc(kernel_map, endpa - pa);
317 	if (va == 0)
318 		return (ENOMEM);
319 
320 	*bshp = va + (bpa & PAGE_MASK);
321 
322 	for (; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
323 		pmap_enter(pmap_kernel(), va, pa,
324 		    VM_PROT_READ | VM_PROT_WRITE, PMAP_WIRED);
325 	}
326 	pmap_update(pmap_kernel());
327 
328 	return (0);
329 }
330 
331 void
332 i80312_mem_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
333 {
334 	vaddr_t va, endva;
335 
336 	va = trunc_page(bsh);
337 	endva = round_page(bsh + size);
338 
339 	/* Free the kernel virtual mapping. */
340 	uvm_km_free(kernel_map, va, endva - va);
341 }
342 
343 int
344 i80312_mem_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
345     bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
346     bus_addr_t *bpap, bus_space_handle_t *bshp)
347 {
348 
349 	panic("i80312_mem_bs_alloc(): not implemented\n");
350 }
351 
352 void
353 i80312_mem_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
354 {
355 
356 	panic("i80312_mem_bs_free(): not implemented\n");
357 }
358 
359 paddr_t
360 i80312_mem_bs_mmap(void *t, bus_addr_t addr, off_t off, int prot, int flags)
361 {
362 
363 	/* XXX */
364 	return (-1);
365 }
366