1 /* $NetBSD: i80321_i2c.c,v 1.3 2007/12/06 17:00:32 ad Exp $ */ 2 3 /* 4 * Copyright (c) 2003 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /* 39 * Intel i80321 I/O Processor I2C Controller Unit support. 40 */ 41 42 #include <sys/cdefs.h> 43 __KERNEL_RCSID(0, "$NetBSD: i80321_i2c.c,v 1.3 2007/12/06 17:00:32 ad Exp $"); 44 45 #include <sys/param.h> 46 #include <sys/mutex.h> 47 #include <sys/systm.h> 48 #include <sys/device.h> 49 #include <sys/kernel.h> 50 51 #include <machine/bus.h> 52 #include <machine/intr.h> 53 54 #include <arm/xscale/i80321reg.h> 55 #include <arm/xscale/i80321var.h> 56 57 #include <dev/i2c/i2cvar.h> 58 59 #include <arm/xscale/iopi2creg.h> 60 #include <arm/xscale/iopi2cvar.h> 61 62 static int 63 iic321_match(struct device *parent, struct cfdata *cf, void *aux) 64 { 65 struct iopxs_attach_args *ia = aux; 66 67 if (strcmp(cf->cf_name, ia->ia_name) == 0) 68 return (1); 69 70 return (0); 71 } 72 73 static void 74 iic321_attach(struct device *parent, struct device *self, void *aux) 75 { 76 struct iopiic_softc *sc = (void *) self; 77 struct iopxs_attach_args *ia = aux; 78 int error; 79 uint8_t gpio_bits; 80 81 aprint_naive(": I2C controller\n"); 82 aprint_normal(": I2C controller\n"); 83 84 sc->sc_st = ia->ia_st; 85 if ((error = bus_space_subregion(sc->sc_st, ia->ia_sh, 86 ia->ia_offset, ia->ia_size, 87 &sc->sc_sh)) != 0) { 88 aprint_error("%s: unable to subregion registers, error = %d\n", 89 sc->sc_dev.dv_xname, error); 90 return; 91 } 92 93 gpio_bits = (ia->ia_offset == VERDE_I2C_BASE0) ? 94 (1U << 7) | (1U << 6) : (1U << 5) | (1U << 4); 95 i80321_gpio_set_val(gpio_bits, 0); 96 i80321_gpio_set_direction(gpio_bits, 0); 97 98 /* XXX Reset the I2C unit? */ 99 100 mutex_init(&sc->sc_buslock, MUTEX_DEFAULT, IPL_NONE); 101 102 /* XXX We don't currently use interrupts. Fix this some day. */ 103 #if 0 104 sc->sc_ih = i80321_intr_establish((ia->ia_offset == VERDE_I2C_BASE0) ? 105 ICU_INT_I2C0 : ICU_INT_I2C1, IPL_BIO, iopiic_intr, sc); 106 if (sc->sc_ih == NULL) { 107 aprint_error("%s: unable to establish interrupt handler\n", 108 sc->sc_dev.dv_xname); 109 return; 110 } 111 #endif 112 113 /* 114 * Enable the I2C unit as a master. 115 * No, we do not support slave mode. 116 */ 117 sc->sc_icr = IIC_ICR_GCD | IIC_ICR_UE | IIC_ICR_SCLE; 118 bus_space_write_4(sc->sc_st, sc->sc_sh, IIC_ICR, 0); 119 bus_space_write_4(sc->sc_st, sc->sc_sh, IIC_ISAR, 0); 120 bus_space_write_4(sc->sc_st, sc->sc_sh, IIC_ICR, sc->sc_icr); 121 122 iopiic_attach(sc); 123 } 124 125 CFATTACH_DECL(iopiic, sizeof(struct iopiic_softc), 126 iic321_match, iic321_attach, NULL, NULL); 127