xref: /netbsd/sys/arch/arm/xscale/i80321_mcu.c (revision bf9ec67e)
1 /*	$NetBSD: i80321_mcu.c,v 1.1 2002/03/27 21:45:47 thorpej Exp $	*/
2 
3 /*
4  * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *	This product includes software developed for the NetBSD Project by
20  *	Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 /*
39  * Intel i80321 I/O Processor memory controller support.
40  */
41 
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 
45 #include <machine/bus.h>
46 
47 #include <arm/xscale/i80321reg.h>
48 #include <arm/xscale/i80321var.h>
49 
50 /*
51  * i80321_sdram_bounds:
52  *
53  *	Retrieve the start and size of SDRAM.
54  */
55 void
56 i80321_sdram_bounds(bus_space_tag_t st, bus_space_handle_t sh,
57     paddr_t *start, psize_t *size)
58 {
59 	uint32_t sdbr, sbr0, sbr1;
60 	uint32_t bank0, bank1;
61 
62 	sdbr = bus_space_read_4(st, sh, MCU_SDBR);
63 	sbr0 = bus_space_read_4(st, sh, MCU_SBR0);
64 	sbr1 = bus_space_read_4(st, sh, MCU_SBR1);
65 
66 #ifdef VERBOSE_INIT_ARM
67 	printf("i80321: SBDR = 0x%08x SBR0 = 0x%08x SBR1 = 0x%08x\n",
68 	    sdbr, sbr0, sbr1);
69 #endif
70 
71 	*start = sdbr;
72 
73 	sdbr = (sdbr >> 25) & 0x1f;
74 
75 	sbr0 &= 0x3f;
76 	sbr1 &= 0x3f;
77 
78 	bank0 = (sbr0 - sdbr) << 25;
79 	bank1 = (sbr1 - sbr0) << 25;
80 
81 #ifdef VERBOSE_INIT_ARM
82 	printf("i80321: BANK0 = 0x%08x BANK1 = 0x%08x\n", bank0, bank1);
83 #endif
84 
85 	*size = bank0 + bank1;
86 }
87