xref: /netbsd/sys/arch/atari/atari/atari_init.c (revision bf9ec67e)
1 /*	$NetBSD: atari_init.c,v 1.55 2001/05/28 06:43:19 leo Exp $	*/
2 
3 /*
4  * Copyright (c) 1995 Leo Weppelman
5  * Copyright (c) 1994 Michael L. Hitch
6  * Copyright (c) 1993 Markus Wild
7  * All rights reserved.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *      This product includes software developed by Markus Wild.
20  * 4. The name of the author may not be used to endorse or promote products
21  *    derived from this software without specific prior written permission
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
27  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33  */
34 
35 #include "opt_ddb.h"
36 #include "opt_mbtype.h"
37 
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/proc.h>
41 #include <sys/user.h>
42 #include <sys/ioctl.h>
43 #include <sys/select.h>
44 #include <sys/tty.h>
45 #include <sys/proc.h>
46 #include <sys/buf.h>
47 #include <sys/msgbuf.h>
48 #include <sys/mbuf.h>
49 #include <sys/extent.h>
50 #include <sys/protosw.h>
51 #include <sys/domain.h>
52 #include <sys/dkbad.h>
53 #include <sys/reboot.h>
54 #include <sys/exec.h>
55 #include <sys/core.h>
56 #include <sys/kcore.h>
57 
58 #include <uvm/uvm_extern.h>
59 
60 #include <machine/vmparam.h>
61 #include <machine/pte.h>
62 #include <machine/cpu.h>
63 #include <machine/iomap.h>
64 #include <machine/mfp.h>
65 #include <machine/scu.h>
66 #include <machine/acia.h>
67 #include <machine/kcore.h>
68 
69 #include <m68k/cpu.h>
70 #include <m68k/cacheops.h>
71 
72 #include <atari/atari/intr.h>
73 #include <atari/atari/stalloc.h>
74 #include <atari/dev/ym2149reg.h>
75 
76 #include "pci.h"
77 
78 void start_c __P((int, u_int, u_int, u_int, char *));
79 static void atari_hwinit __P((void));
80 static void cpu_init_kcorehdr __P((u_long));
81 static void initcpu __P((void));
82 static void mmu030_setup __P((st_entry_t *, u_int, pt_entry_t *, u_int,
83 			      pt_entry_t *, u_int, u_int));
84 static void map_io_areas __P((pt_entry_t *, u_int, u_int));
85 static void set_machtype __P((void));
86 
87 #if defined(M68040) || defined(M68060)
88 static void mmu040_setup __P((st_entry_t *, u_int, pt_entry_t *, u_int,
89 			      pt_entry_t *, u_int, u_int));
90 #endif
91 
92 /*
93  * Extent maps to manage all memory space, including I/O ranges.  Allocate
94  * storage for 8 regions in each, initially.  Later, iomem_malloc_safe
95  * will indicate that it's safe to use malloc() to dynamically allocate
96  * region descriptors.
97  * This means that the fixed static storage is only used for registrating
98  * the found memory regions and the bus-mapping of the console.
99  *
100  * The extent maps are not static!  They are used for bus address space
101  * allocation.
102  */
103 static long iomem_ex_storage[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)];
104 struct extent *iomem_ex;
105 int iomem_malloc_safe;
106 
107 /*
108  * All info needed to generate a panic dump. All fields are setup by
109  * start_c().
110  * XXX: Should sheck usage of phys_segs. There is some unwanted overlap
111  *      here.... Also, the name is badly choosen. Phys_segs contains the
112  *      segment descriptions _after_ reservations are made.
113  * XXX: 'lowram' is obsoleted by the new panicdump format
114  */
115 static cpu_kcore_hdr_t cpu_kcore_hdr;
116 
117 extern u_int 	lowram;
118 extern u_int	Sysptsize, Sysseg_pa, proc0paddr;
119 extern pt_entry_t *Sysptmap;
120 extern st_entry_t *Sysseg;
121 u_int		*Sysmap;
122 int		machineid, mmutype, cputype, astpending;
123 char		*vmmap;
124 pv_entry_t	pv_table;
125 #if defined(M68040) || defined(M68060)
126 extern int	protostfree;
127 #endif
128 
129 extern char		*esym;
130 extern struct pcb	*curpcb;
131 
132 /*
133  * This is the virtual address of physical page 0. Used by 'do_boot()'.
134  */
135 vaddr_t	page_zero;
136 
137 /*
138  * Crude support for allocation in ST-ram. Currently only used to allocate
139  * video ram.
140  * The physical address is also returned because the video init needs it to
141  * setup the controller at the time the vm-system is not yet operational so
142  * 'kvtop()' cannot be used.
143  */
144 #ifndef ST_POOL_SIZE
145 #define	ST_POOL_SIZE	40			/* XXX: enough? */
146 #endif
147 
148 u_long	st_pool_size = ST_POOL_SIZE * NBPG;	/* Patchable	*/
149 u_long	st_pool_virt, st_pool_phys;
150 
151 /*
152  * Are we relocating the kernel to TT-Ram if possible? It is faster, but
153  * it is also reported not to work on all TT's. So the default is NO.
154  */
155 #ifndef	RELOC_KERNEL
156 #define	RELOC_KERNEL	0
157 #endif
158 int	reloc_kernel = RELOC_KERNEL;		/* Patchable	*/
159 
160 /*
161  * this is the C-level entry function, it's called from locore.s.
162  * Preconditions:
163  *	Interrupts are disabled
164  *	PA == VA, we don't have to relocate addresses before enabling
165  *		the MMU
166  * 	Exec is no longer available (because we're loaded all over
167  *		low memory, no ExecBase is available anymore)
168  *
169  * It's purpose is:
170  *	Do the things that are done in locore.s in the hp300 version,
171  *		this includes allocation of kernel maps and enabling the MMU.
172  *
173  * Some of the code in here is `stolen' from Amiga MACH, and was
174  * written by Bryan Ford and Niklas Hallqvist.
175  *
176  * Very crude 68040 support by Michael L. Hitch.
177  */
178 int kernel_copyback = 1;
179 
180 void
181 start_c(id, ttphystart, ttphysize, stphysize, esym_addr)
182 int	id;			/* Machine id				*/
183 u_int	ttphystart, ttphysize;	/* Start address and size of TT-ram	*/
184 u_int	stphysize;		/* Size of ST-ram	 		*/
185 char	*esym_addr;		/* Address of kernel '_esym' symbol	*/
186 {
187 	extern char	end[];
188 	extern void	etext __P((void));
189 	extern u_long	protorp[2];
190 	u_int		pstart;		/* Next available physical address*/
191 	u_int		vstart;		/* Next available virtual address */
192 	u_int		avail;
193 	pt_entry_t	*pt;
194 	u_int		ptsize, ptextra;
195 	u_int		tc, i;
196 	u_int		*pg;
197 	u_int		pg_proto;
198 	u_int		end_loaded;
199 	u_long		kbase;
200 	u_int		kstsize;
201 
202 #if defined(_MILANHW_)
203 	/* XXX
204 	 * XXX The right place todo this is probably the booter (Leo)
205 	 * XXX More than 16MB memory is not yet supported on the Milan!
206 	 * The Milan Lies about the presence of TT-RAM. If you insert
207 	 * 16MB it is split in 14MB ST starting at address 0 and 2MB TT RAM,
208 	 * starting at address 16MB.
209 	 */
210 	stphysize += ttphysize;
211 	ttphysize  = ttphystart = 0;
212 #endif
213 	boot_segs[0].start       = 0;
214 	boot_segs[0].end         = stphysize;
215 	boot_segs[1].start       = ttphystart;
216 	boot_segs[1].end         = ttphystart + ttphysize;
217 	boot_segs[2].start = boot_segs[2].end = 0; /* End of segments! */
218 
219 	/*
220 	 * The following is a hack. We do not know how much ST memory we
221 	 * really need until after configuration has finished. At this
222 	 * time I have no idea how to grab ST memory at that time.
223 	 * The round_page() call is ment to correct errors made by
224 	 * binpatching!
225 	 */
226 	st_pool_size   = m68k_round_page(st_pool_size);
227 	st_pool_phys   = stphysize - st_pool_size;
228 	stphysize      = st_pool_phys;
229 
230 	machineid      = id;
231 	esym           = esym_addr;
232 
233 	/*
234 	 * the kernel ends at end() or esym.
235 	 */
236 	if(esym == NULL)
237 		end_loaded = (u_int)end;
238 	else end_loaded = (u_int)esym;
239 
240 	/*
241 	 * If we have enough fast-memory to put the kernel in and the
242 	 * RELOC_KERNEL option is set, do it!
243 	 */
244 	if((reloc_kernel != 0) && (ttphysize >= end_loaded))
245 		kbase = ttphystart;
246 	else kbase = 0;
247 
248 	/*
249 	 * Determine the type of machine we are running on. This needs
250 	 * to be done early (and before initcpu())!
251 	 */
252 	set_machtype();
253 
254 	/*
255 	 * Initialize cpu specific stuff
256 	 */
257 	initcpu();
258 
259 	/*
260 	 * We run the kernel from ST memory at the moment.
261 	 * The kernel segment table is put just behind the loaded image.
262 	 * pstart: start of usable ST memory
263 	 * avail : size of ST memory available.
264 	 */
265 	pstart = (u_int)end_loaded;
266 	pstart = m68k_round_page(pstart);
267 	avail  = stphysize - pstart;
268 
269 	/*
270 	 * Calculate the number of pages needed for Sysseg.
271 	 * For the 68030, we need 256 descriptors (segment-table-entries).
272 	 * This easily fits into one page.
273 	 * For the 68040, both the level-1 and level-2 descriptors are
274 	 * stored into Sysseg. We currently handle a maximum sum of MAXKL2SIZE
275 	 * level-1 & level-2 tables.
276 	 */
277 #if defined(M68040) || defined(M68060)
278 	if (mmutype == MMU_68040)
279 		kstsize = MAXKL2SIZE / (NPTEPG/SG4_LEV2SIZE);
280 	else
281 #endif
282 		kstsize = 1;
283 	/*
284 	 * allocate the kernel segment table
285 	 */
286 	Sysseg     = (st_entry_t *)pstart;
287 	Sysseg_pa  = (u_int)Sysseg + kbase;
288 	pstart    += kstsize * NBPG;
289 	avail     -= kstsize * NBPG;
290 
291 	/*
292 	 * Determine the number of pte's we need for extra's like
293 	 * ST I/O map's.
294 	 */
295 	ptextra = btoc(STIO_SIZE);
296 
297 	/*
298 	 * If present, add pci areas
299 	 */
300 	if (machineid & ATARI_HADES)
301 		ptextra += btoc(PCI_CONF_SIZE + PCI_IO_SIZE + PCI_MEM_SIZE);
302 	if (machineid & ATARI_MILAN)
303 		ptextra += btoc(PCI_IO_SIZE + PCI_MEM_SIZE);
304 	ptextra += btoc(BOOTM_VA_POOL);
305 
306 	/*
307 	 * The 'pt' (the initial kernel pagetable) has to map the kernel and
308 	 * the I/O areas. The various I/O areas are mapped (virtually) at
309 	 * the top of the address space mapped by 'pt' (ie. just below Sysmap).
310 	 */
311 	pt      = (pt_entry_t *)pstart;
312 	ptsize  = (Sysptsize + howmany(ptextra, NPTEPG)) << PGSHIFT;
313 	pstart += ptsize;
314 	avail  -= ptsize;
315 
316 	/*
317 	 * allocate kernel page table map
318 	 */
319 	Sysptmap = (pt_entry_t *)pstart;
320 	pstart  += NBPG;
321 	avail   -= NBPG;
322 
323 	/*
324 	 * Set Sysmap; mapped after page table pages. Because I too (LWP)
325 	 * didn't understand the reason for this, I borrowed the following
326 	 * (sligthly modified) comment from mac68k/locore.s:
327 	 * LAK:  There seems to be some confusion here about the next line,
328 	 * so I'll explain.  The kernel needs some way of dynamically modifying
329 	 * the page tables for its own virtual memory.  What it does is that it
330 	 * has a page table map.  This page table map is mapped right after the
331 	 * kernel itself (in our implementation; in HP's it was after the I/O
332 	 * space). Therefore, the first three (or so) entries in the segment
333 	 * table point to the first three pages of the page tables (which
334 	 * point to the kernel) and the next entry in the segment table points
335 	 * to the page table map (this is done later).  Therefore, the value
336 	 * of the pointer "Sysmap" will be something like 16M*3 = 48M.  When
337 	 * the kernel addresses this pointer (e.g., Sysmap[0]), it will get
338 	 * the first longword of the first page map (== pt[0]).  Since the
339 	 * page map mirrors the segment table, addressing any index of Sysmap
340 	 * will give you a PTE of the page maps which map the kernel.
341 	 */
342 	Sysmap = (u_int *)(ptsize << (SEGSHIFT - PGSHIFT));
343 
344 	/*
345 	 * Initialize segment tables
346 	 */
347 #if defined(M68040) || defined(M68060)
348 	if (mmutype == MMU_68040)
349 		mmu040_setup(Sysseg, kstsize, pt, ptsize, Sysptmap, 1, kbase);
350 	else
351 #endif /* defined(M68040) || defined(M68060) */
352 		mmu030_setup(Sysseg, kstsize, pt, ptsize, Sysptmap, 1, kbase);
353 
354 	/*
355 	 * initialize kernel page table page(s).
356 	 * Assume load at VA 0.
357 	 * - Text pages are RO
358 	 * - Page zero is invalid
359 	 */
360 	pg_proto = (0 + kbase) | PG_RO | PG_V;
361 	pg       = pt;
362 	*pg++ = PG_NV; pg_proto += NBPG;
363 	for(i = NBPG; i < (u_int)etext; i += NBPG, pg_proto += NBPG)
364 		*pg++ = pg_proto;
365 
366 	/*
367 	 * data, bss and dynamic tables are read/write
368 	 */
369 	pg_proto = (pg_proto & PG_FRAME) | PG_RW | PG_V;
370 
371 #if defined(M68040) || defined(M68060)
372 	/*
373 	 * Map the kernel segment table cache invalidated for
374 	 * these machines (for the 68040 not strictly necessary, but
375 	 * recommended by Motorola; for the 68060 mandatory)
376 	 */
377 	if (mmutype == MMU_68040) {
378 
379 	    if (kernel_copyback)
380 		pg_proto |= PG_CCB;
381 
382 	    for (; i < (u_int)Sysseg; i += NBPG, pg_proto += NBPG)
383 		*pg++ = pg_proto;
384 
385 	    pg_proto = (pg_proto & ~PG_CCB) | PG_CI;
386 	    for (; i < pstart; i += NBPG, pg_proto += NBPG)
387 		*pg++ = pg_proto;
388 	    pg_proto = (pg_proto & ~PG_CI);
389 	    if (kernel_copyback)
390 		pg_proto |= PG_CCB;
391 	}
392 #endif /* defined(M68040) || defined(M68060) */
393 
394 	/*
395 	 * go till end of data allocated so far
396 	 * plus proc0 u-area (to be allocated)
397 	 */
398 	for(; i < pstart + USPACE; i += NBPG, pg_proto += NBPG)
399 		*pg++ = pg_proto;
400 
401 	/*
402 	 * invalidate remainder of kernel PT
403 	 */
404 	while(pg < &pt[ptsize/sizeof(pt_entry_t)])
405 		*pg++ = PG_NV;
406 
407 	/*
408 	 * Map various I/O areas
409 	 */
410 	map_io_areas(pt, ptsize, ptextra);
411 
412 	/*
413 	 * Save KVA of proc0 user-area and allocate it
414 	 */
415 	proc0paddr = pstart;
416 	pstart    += USPACE;
417 	avail     -= USPACE;
418 
419 	/*
420 	 * At this point, virtual and physical allocation starts to divert.
421 	 */
422 	vstart     = pstart;
423 
424 	/*
425 	 * Map the allocated space in ST-ram now. In the contig-case, there
426 	 * is no need to make a distinction between virtual and physical
427 	 * adresses. But I make it anyway to be prepared.
428 	 * Physcal space is already reserved!
429 	 */
430 	st_pool_virt = vstart;
431 	pg           = &pt[vstart / NBPG];
432 	pg_proto     = st_pool_phys | PG_RW | PG_CI | PG_V;
433 	vstart      += st_pool_size;
434 	while(pg_proto < (st_pool_phys + st_pool_size)) {
435 		*pg++     = pg_proto;
436 		pg_proto += NBPG;
437 	}
438 
439 	/*
440 	 * Map physical page_zero and page-zero+1 (First ST-ram page). We need
441 	 * to reference it in the reboot code. Two pages are mapped, because
442 	 * we must make sure 'doboot()' is contained in it (see the tricky
443 	 * copying there....).
444 	 */
445 	page_zero  = vstart;
446 	pg         = &pt[vstart / NBPG];
447 	*pg++      = PG_RW | PG_CI | PG_V;
448 	vstart    += NBPG;
449 	*pg        = PG_RW | PG_CI | PG_V | NBPG;
450 	vstart    += NBPG;
451 
452 	lowram  = 0 >> PGSHIFT; /* XXX */
453 
454 	/*
455 	 * Fill in usable segments. The page indexes will be initialized
456 	 * later when all reservations are made.
457 	 */
458 	usable_segs[0].start = 0;
459 	usable_segs[0].end   = stphysize;
460 	usable_segs[1].start = ttphystart;
461 	usable_segs[1].end   = ttphystart + ttphysize;
462 	usable_segs[2].start = usable_segs[2].end = 0; /* End of segments! */
463 
464 	if(kbase) {
465 		/*
466 		 * First page of ST-ram is unusable, reserve the space
467 		 * for the kernel in the TT-ram segment.
468 		 * Note: Because physical page-zero is partially mapped to ROM
469 		 *       by hardware, it is unusable.
470 		 */
471 		usable_segs[0].start  = NBPG;
472 		usable_segs[1].start += pstart;
473 	}
474 	else usable_segs[0].start += pstart;
475 
476 	/*
477 	 * As all segment sizes are now valid, calculate page indexes and
478 	 * available physical memory.
479 	 */
480 	usable_segs[0].first_page = 0;
481 	for (i = 1; usable_segs[i].start; i++) {
482 		usable_segs[i].first_page  = usable_segs[i-1].first_page;
483 		usable_segs[i].first_page +=
484 			(usable_segs[i-1].end - usable_segs[i-1].start) / NBPG;
485 	}
486 	for (i = 0, physmem = 0; usable_segs[i].start; i++)
487 		physmem += usable_segs[i].end - usable_segs[i].start;
488 	physmem >>= PGSHIFT;
489 
490 	/*
491 	 * get the pmap module in sync with reality.
492 	 */
493 	pmap_bootstrap(vstart, stio_addr, ptextra);
494 
495 	/*
496 	 * Prepare to enable the MMU.
497 	 * Setup and load SRP nolimit, share global, 4 byte PTE's
498 	 */
499 	protorp[0] = 0x80000202;
500 	protorp[1] = (u_int)Sysseg + kbase;	/* + segtable address */
501 	Sysseg_pa  = (u_int)Sysseg + kbase;
502 
503 	cpu_init_kcorehdr(kbase);
504 
505 	/*
506 	 * copy over the kernel (and all now initialized variables)
507 	 * to fastram.  DONT use bcopy(), this beast is much larger
508 	 * than 128k !
509 	 */
510 	if(kbase) {
511 		register u_long	*lp, *le, *fp;
512 
513 		lp = (u_long *)0;
514 		le = (u_long *)pstart;
515 		fp = (u_long *)kbase;
516 		while(lp < le)
517 			*fp++ = *lp++;
518 	}
519 #if defined(M68040) || defined(M68060)
520 	if (mmutype == MMU_68040) {
521 		/*
522 		 * movel Sysseg_pa,a0;
523 		 * movec a0,SRP;
524 		 * pflusha;
525 		 * movel #$0xc000,d0;
526 		 * movec d0,TC
527 		 */
528 		if (cputype == CPU_68060) {
529 			/* XXX: Need the branch cache be cleared? */
530 			asm volatile (".word 0x4e7a,0x0002;"
531 				      "orl #0x400000,%%d0;"
532 				      ".word 0x4e7b,0x0002" : : : "d0");
533 		}
534 		asm volatile ("movel %0,%%a0;"
535 			      ".word 0x4e7b,0x8807" : : "a" (Sysseg_pa) : "a0");
536 		asm volatile (".word 0xf518" : : );
537 		asm volatile ("movel #0xc000,%%d0;"
538 			      ".word 0x4e7b,0x0003" : : : "d0" );
539 	} else
540 #endif
541 	{
542 		asm volatile ("pmove %0@,%%srp" : : "a" (&protorp[0]));
543 		/*
544 		 * setup and load TC register.
545 		 * enable_cpr, enable_srp, pagesize=8k,
546 		 * A = 8 bits, B = 11 bits
547 		 */
548 		tc = 0x82d08b00;
549 		asm volatile ("pmove %0@,%%tc" : : "a" (&tc));
550 	}
551 
552 	/* Is this to fool the optimizer?? */
553 	i = *(int *)proc0paddr;
554 	*(volatile int *)proc0paddr = i;
555 
556 	/*
557 	 * Initialize the "u-area" pages.
558 	 * Must initialize p_addr before autoconfig or the
559 	 * fault handler will get a NULL reference.
560 	 */
561 	bzero((u_char *)proc0paddr, USPACE);
562 	proc0.p_addr = (struct user *)proc0paddr;
563 	curproc = &proc0;
564 	curpcb  = &((struct user *)proc0paddr)->u_pcb;
565 
566 	/*
567 	 * Get the hardware into a defined state
568 	 */
569 	atari_hwinit();
570 
571 	/*
572 	 * Initialize stmem allocator
573 	 */
574 	init_stmem();
575 
576 	/*
577 	 * Initialize the I/O mem extent map.
578 	 * Note: we don't have to check the return value since
579 	 * creation of a fixed extent map will never fail (since
580 	 * descriptor storage has already been allocated).
581 	 *
582 	 * N.B. The iomem extent manages _all_ physical addresses
583 	 * on the machine.  When the amount of RAM is found, all
584 	 * extents of RAM are allocated from the map.
585 	 */
586 	iomem_ex = extent_create("iomem", 0x0, 0xffffffff, M_DEVBUF,
587 	    (caddr_t)iomem_ex_storage, sizeof(iomem_ex_storage),
588 	    EX_NOCOALESCE|EX_NOWAIT);
589 
590 	/*
591 	 * Allocate the physical RAM from the extent map
592 	 */
593 	for (i = 0; boot_segs[i].end != 0; i++) {
594 		if (extent_alloc_region(iomem_ex, boot_segs[i].start,
595 			  boot_segs[i].end - boot_segs[i].start, EX_NOWAIT)) {
596 			/* XXX: Ahum, should not happen ;-) */
597 			printf("Warning: Cannot allocate boot memory from"
598 			       " extent map!?\n");
599 		}
600 	}
601 
602 	/*
603 	 * Initialize interrupt mapping.
604 	 */
605 	intr_init();
606 }
607 
608 /*
609  * Try to figure out on what type of machine we are running
610  * Note: This module runs *before* the io-mapping is setup!
611  */
612 static void
613 set_machtype()
614 {
615 #ifdef _MILANHW_
616 	machineid |= ATARI_MILAN;
617 
618 #else
619 	stio_addr = 0xff8000;	/* XXX: For TT & Falcon only */
620 	if(badbaddr((caddr_t)&MFP2->mf_gpip, sizeof(char))) {
621 		/*
622 		 * Watch out! We can also have a Hades with < 16Mb
623 		 * RAM here...
624 		 */
625 		if(!badbaddr((caddr_t)&MFP->mf_gpip, sizeof(char))) {
626 			machineid |= ATARI_FALCON;
627 			return;
628 		}
629 	}
630 	if(!badbaddr((caddr_t)(PCI_CONFB_PHYS + PCI_CONFM_PHYS), sizeof(char)))
631 		machineid |= ATARI_HADES;
632 	else machineid |= ATARI_TT;
633 #endif /* _MILANHW_ */
634 }
635 
636 static void
637 atari_hwinit()
638 {
639 #if defined(_ATARIHW_)
640 	/*
641 	 * Initialize the sound chip
642 	 */
643 	ym2149_init();
644 
645 	/*
646 	 * Make sure that the midi acia will not generate an interrupt
647 	 * unless something attaches to it. We cannot do this for the
648 	 * keyboard acia because this breaks the '-d' option of the
649 	 * booter...
650 	 */
651 	MDI->ac_cs = 0;
652 #endif /* defined(_ATARIHW_) */
653 
654 	/*
655 	 * Initialize both MFP chips (if both present!) to generate
656 	 * auto-vectored interrupts with EOI. The active-edge registers are
657 	 * set up. The interrupt enable registers are set to disable all
658 	 * interrupts.
659 	 */
660 	MFP->mf_iera  = MFP->mf_ierb = 0;
661 	MFP->mf_imra  = MFP->mf_imrb = 0;
662 	MFP->mf_aer   = MFP->mf_ddr  = 0;
663 	MFP->mf_vr    = 0x40;
664 
665 #if defined(_ATARIHW_)
666 	if(machineid & (ATARI_TT|ATARI_HADES)) {
667 		MFP2->mf_iera = MFP2->mf_ierb = 0;
668 		MFP2->mf_imra = MFP2->mf_imrb = 0;
669 		MFP2->mf_aer  = 0x80;
670 		MFP2->mf_vr   = 0x50;
671 	}
672 
673 	if(machineid & ATARI_TT) {
674 		/*
675 		 * Initialize the SCU, to enable interrupts on the SCC (ipl5),
676 		 * MFP (ipl6) and softints (ipl1).
677 		 */
678 		SCU->sys_mask = SCU_SYS_SOFT;
679 		SCU->vme_mask = SCU_MFP | SCU_SCC;
680 #ifdef DDB
681 		/*
682 		 * This allows people with the correct hardware modification
683 		 * to drop into the debugger from an NMI.
684 		 */
685 		SCU->sys_mask |= SCU_IRQ7;
686 #endif
687 	}
688 #endif /* defined(_ATARIHW_) */
689 
690 #if NPCI > 0
691 	if(machineid & (ATARI_HADES|ATARI_MILAN)) {
692 		/*
693 		 * Configure PCI-bus
694 		 */
695 		init_pci_bus();
696 	}
697 #endif
698 
699 }
700 
701 /*
702  * Do the dull work of mapping the various I/O areas. They MUST be Cache
703  * inhibited!
704  * All I/O areas are virtually mapped at the end of the pt-table.
705  */
706 static void
707 map_io_areas(pt, ptsize, ptextra)
708 pt_entry_t	*pt;
709 u_int		ptsize;		/* Size of 'pt' in bytes	*/
710 u_int		ptextra;	/* #of additional I/O pte's	*/
711 {
712 	extern void	bootm_init __P((vaddr_t, pt_entry_t *, u_long));
713 	vaddr_t		ioaddr;
714 	pt_entry_t	*pg, *epg;
715 	pt_entry_t	pg_proto;
716 	u_long		mask;
717 
718 	ioaddr = ((ptsize / sizeof(pt_entry_t)) - ptextra) * NBPG;
719 
720 	/*
721 	 * Map ST-IO area
722 	 */
723 	stio_addr = ioaddr;
724 	ioaddr   += STIO_SIZE;
725 	pg        = &pt[stio_addr / NBPG];
726 	epg       = &pg[btoc(STIO_SIZE)];
727 #ifdef _MILANHW_
728 	/*
729 	 * Turn on byte swaps in the ST I/O area. On the Milan, the
730 	 * U0 signal of the MMU controls the BigEndian signal
731 	 * of the PLX9080. We use this setting so we can read/write the
732 	 * PLX registers (and PCI-config space) in big-endian mode.
733 	 */
734 	pg_proto  = STIO_PHYS | PG_RW | PG_CI | PG_V | 0x100;
735 #else
736 	pg_proto  = STIO_PHYS | PG_RW | PG_CI | PG_V;
737 #endif
738 	while(pg < epg) {
739 		*pg++     = pg_proto;
740 		pg_proto += NBPG;
741 	}
742 
743 	/*
744 	 * Map PCI areas
745 	 */
746 	if (machineid & ATARI_HADES) {
747 		/*
748 		 * Only Hades maps the PCI-config space!
749 		 */
750 		pci_conf_addr = ioaddr;
751 		ioaddr       += PCI_CONF_SIZE;
752 		pg            = &pt[pci_conf_addr / NBPG];
753 		epg           = &pg[btoc(PCI_CONF_SIZE)];
754 		mask          = PCI_CONFM_PHYS;
755 		pg_proto      = PCI_CONFB_PHYS | PG_RW | PG_CI | PG_V;
756 		for(; pg < epg; mask <<= 1)
757 			*pg++ = pg_proto | mask;
758 	}
759 	else pci_conf_addr = 0; /* XXX: should crash */
760 
761 	if (machineid & (ATARI_HADES|ATARI_MILAN)) {
762 		pci_io_addr   = ioaddr;
763 		ioaddr       += PCI_IO_SIZE;
764 		pg	      = &pt[pci_io_addr / NBPG];
765 		epg           = &pg[btoc(PCI_IO_SIZE)];
766 		pg_proto      = PCI_IO_PHYS | PG_RW | PG_CI | PG_V;
767 		while(pg < epg) {
768 			*pg++     = pg_proto;
769 			pg_proto += NBPG;
770 		}
771 
772 		pci_mem_addr  = ioaddr;
773 		/* Provide an uncached PCI address for the MILAN */
774 		pci_mem_uncached = ioaddr;
775 		ioaddr       += PCI_MEM_SIZE;
776 		epg           = &pg[btoc(PCI_MEM_SIZE)];
777 		pg_proto      = PCI_VGA_PHYS | PG_RW | PG_CI | PG_V;
778 		while(pg < epg) {
779 			*pg++     = pg_proto;
780 			pg_proto += NBPG;
781 		}
782 	}
783 
784 	bootm_init(ioaddr, pg, BOOTM_VA_POOL);
785 	/*
786 	 * ioaddr += BOOTM_VA_POOL;
787 	 * pg = &pg[btoc(BOOTM_VA_POOL)];
788 	 */
789 }
790 
791 /*
792  * Used by dumpconf() to get the size of the machine-dependent panic-dump
793  * header in disk blocks.
794  */
795 int
796 cpu_dumpsize()
797 {
798 	int	size;
799 
800 	size = ALIGN(sizeof(kcore_seg_t)) + ALIGN(sizeof(cpu_kcore_hdr_t));
801 	return (btodb(roundup(size, dbtob(1))));
802 }
803 
804 /*
805  * Called by dumpsys() to dump the machine-dependent header.
806  * XXX: Assumes that it will all fit in one diskblock.
807  */
808 int
809 cpu_dump(dump, p_blkno)
810 int	(*dump) __P((dev_t, daddr_t, caddr_t, size_t));
811 daddr_t	*p_blkno;
812 {
813 	int		buf[dbtob(1)/sizeof(int)];
814 	int		error;
815 	kcore_seg_t	*kseg_p;
816 	cpu_kcore_hdr_t	*chdr_p;
817 
818 	kseg_p = (kcore_seg_t *)buf;
819 	chdr_p = (cpu_kcore_hdr_t *)&buf[ALIGN(sizeof(*kseg_p)) / sizeof(int)];
820 
821 	/*
822 	 * Generate a segment header
823 	 */
824 	CORE_SETMAGIC(*kseg_p, KCORE_MAGIC, MID_MACHINE, CORE_CPU);
825 	kseg_p->c_size = dbtob(1) - ALIGN(sizeof(*kseg_p));
826 
827 	/*
828 	 * Add the md header
829 	 */
830 	*chdr_p = cpu_kcore_hdr;
831 	error = dump(dumpdev, *p_blkno, (caddr_t)buf, dbtob(1));
832 	*p_blkno += 1;
833 	return (error);
834 }
835 
836 #if (M68K_NPHYS_RAM_SEGS < NMEM_SEGS)
837 #error "Configuration error: M68K_NPHYS_RAM_SEGS < NMEM_SEGS"
838 #endif
839 /*
840  * Initialize the cpu_kcore_header.
841  */
842 static void
843 cpu_init_kcorehdr(kbase)
844 u_long	kbase;
845 {
846 	cpu_kcore_hdr_t *h = &cpu_kcore_hdr;
847 	struct m68k_kcore_hdr *m = &h->un._m68k;
848 	extern char end[];
849 	int	i;
850 
851 	bzero(&cpu_kcore_hdr, sizeof(cpu_kcore_hdr));
852 
853 	/*
854 	 * Initialize the `dispatcher' portion of the header.
855 	 */
856 	strcpy(h->name, machine);
857 	h->page_size = NBPG;
858 	h->kernbase = KERNBASE;
859 
860 	/*
861 	 * Fill in information about our MMU configuration.
862 	 */
863 	m->mmutype	= mmutype;
864 	m->sg_v		= SG_V;
865 	m->sg_frame	= SG_FRAME;
866 	m->sg_ishift	= SG_ISHIFT;
867 	m->sg_pmask	= SG_PMASK;
868 	m->sg40_shift1	= SG4_SHIFT1;
869 	m->sg40_mask2	= SG4_MASK2;
870 	m->sg40_shift2	= SG4_SHIFT2;
871 	m->sg40_mask3	= SG4_MASK3;
872 	m->sg40_shift3	= SG4_SHIFT3;
873 	m->sg40_addr1	= SG4_ADDR1;
874 	m->sg40_addr2	= SG4_ADDR2;
875 	m->pg_v		= PG_V;
876 	m->pg_frame	= PG_FRAME;
877 
878 	/*
879 	 * Initialize pointer to kernel segment table.
880 	 */
881 	m->sysseg_pa = (u_int)Sysseg + kbase;
882 
883 	/*
884 	 * Initialize relocation value such that:
885 	 *
886 	 *	pa = (va - KERNBASE) + reloc
887 	 */
888 	m->reloc = kbase;
889 
890 	/*
891 	 * Define the end of the relocatable range.
892 	 */
893 	m->relocend = (u_int32_t)end;
894 
895 	for (i = 0; i < NMEM_SEGS; i++) {
896 		m->ram_segs[i].start = boot_segs[i].start;
897 		m->ram_segs[i].size  = boot_segs[i].end -
898 		    boot_segs[i].start;
899 	}
900 }
901 
902 void
903 mmu030_setup(sysseg, kstsize, pt, ptsize, sysptmap, sysptsize, kbase)
904 	st_entry_t	*sysseg;	/* System segment table		*/
905 	u_int		kstsize;	/* size of 'sysseg' in pages	*/
906 	pt_entry_t	*pt;		/* Kernel page table		*/
907 	u_int		ptsize;		/* size	of 'pt' in bytes	*/
908 	pt_entry_t	*sysptmap;	/* System page table		*/
909 	u_int		sysptsize;	/* size of 'sysptmap' in pages	*/
910 	u_int		kbase;
911 {
912 	st_entry_t	sg_proto, *sg;
913 	pt_entry_t	pg_proto, *pg, *epg;
914 
915 	sg_proto = ((u_int)pt + kbase) | SG_RW | SG_V;
916 	pg_proto = ((u_int)pt + kbase) | PG_RW | PG_CI | PG_V;
917 
918 	/*
919 	 * Map the page table pages in both the HW segment table
920 	 * and the software Sysptmap.  Note that Sysptmap is also
921 	 * considered a PT page, hence the +sysptsize.
922 	 */
923 	sg  = sysseg;
924 	pg  = sysptmap;
925 	epg = &pg[(ptsize >> PGSHIFT) + sysptsize];
926 	while(pg < epg) {
927 		*sg++ = sg_proto;
928 		*pg++ = pg_proto;
929 		sg_proto += NBPG;
930 		pg_proto += NBPG;
931 	}
932 
933 	/*
934 	 * invalidate the remainder of the tables
935 	 */
936 	epg = &sysptmap[sysptsize * NPTEPG];
937 	while(pg < epg) {
938 		*sg++ = SG_NV;
939 		*pg++ = PG_NV;
940 	}
941 }
942 
943 #if defined(M68040) || defined(M68060)
944 void
945 mmu040_setup(sysseg, kstsize, pt, ptsize, sysptmap, sysptsize, kbase)
946 	st_entry_t	*sysseg;	/* System segment table		*/
947 	u_int		kstsize;	/* size of 'sysseg' in pages	*/
948 	pt_entry_t	*pt;		/* Kernel page table		*/
949 	u_int		ptsize;		/* size	of 'pt' in bytes	*/
950 	pt_entry_t	*sysptmap;	/* System page table		*/
951 	u_int		sysptsize;	/* size of 'sysptmap' in pages	*/
952 	u_int		kbase;
953 {
954 	int		i;
955 	st_entry_t	sg_proto, *sg, *esg;
956 	pt_entry_t	pg_proto;
957 
958 	/*
959 	 * First invalidate the entire "segment table" pages
960 	 * (levels 1 and 2 have the same "invalid" values).
961 	 */
962 	sg  = sysseg;
963 	esg = &sg[kstsize * NPTEPG];
964 	while (sg < esg)
965 		*sg++ = SG_NV;
966 
967 	/*
968 	 * Initialize level 2 descriptors (which immediately
969 	 * follow the level 1 table). These should map 'pt' + 'sysptmap'.
970 	 * We need:
971 	 *	NPTEPG / SG4_LEV3SIZE
972 	 * level 2 descriptors to map each of the nptpages + 1
973 	 * pages of PTEs.  Note that we set the "used" bit
974 	 * now to save the HW the expense of doing it.
975 	 */
976 	i   = ((ptsize >> PGSHIFT) + sysptsize) * (NPTEPG / SG4_LEV3SIZE);
977 	sg  = &sysseg[SG4_LEV1SIZE];
978 	esg = &sg[i];
979 	sg_proto = ((u_int)pt + kbase) | SG_U | SG_RW | SG_V;
980 	while (sg < esg) {
981 		*sg++     = sg_proto;
982 		sg_proto += (SG4_LEV3SIZE * sizeof (st_entry_t));
983 	}
984 
985 	/*
986 	 * Initialize level 1 descriptors.  We need:
987 	 *	roundup(num, SG4_LEV2SIZE) / SG4_LEVEL2SIZE
988 	 * level 1 descriptors to map the 'num' level 2's.
989 	 */
990 	i = roundup(i, SG4_LEV2SIZE) / SG4_LEV2SIZE;
991 	protostfree = (-1 << (i + 1)) /* & ~(-1 << MAXKL2SIZE) */;
992 	sg  = sysseg;
993 	esg = &sg[i];
994 	sg_proto = ((u_int)&sg[SG4_LEV1SIZE] + kbase) | SG_U | SG_RW |SG_V;
995 	while (sg < esg) {
996 		*sg++     = sg_proto;
997 		sg_proto += (SG4_LEV2SIZE * sizeof(st_entry_t));
998 	}
999 
1000 	/*
1001 	 * Initialize sysptmap
1002 	 */
1003 	sg  = sysptmap;
1004 	esg = &sg[(ptsize >> PGSHIFT) + sysptsize];
1005 	pg_proto = ((u_int)pt + kbase) | PG_RW | PG_CI | PG_V;
1006 	while (sg < esg) {
1007 		*sg++     = pg_proto;
1008 		pg_proto += NBPG;
1009 	}
1010 	/*
1011 	 * Invalidate rest of Sysptmap page
1012 	 */
1013 	esg = &sysptmap[sysptsize * NPTEPG];
1014 	while (sg < esg)
1015 		*sg++ = SG_NV;
1016 }
1017 #endif /* M68040 */
1018 
1019 #if defined(M68060)
1020 int m68060_pcr_init = 0x21;	/* make this patchable */
1021 #endif
1022 
1023 static void
1024 initcpu()
1025 {
1026 	typedef void trapfun __P((void));
1027 
1028 	switch (cputype) {
1029 
1030 #if defined(M68060)
1031 	case CPU_68060:
1032 		{
1033 			extern trapfun	*vectab[256];
1034 			extern trapfun	buserr60, addrerr4060, fpfault;
1035 #if defined(M060SP)
1036 			extern u_int8_t FP_CALL_TOP[], I_CALL_TOP[];
1037 #else
1038 			extern trapfun illinst;
1039 #endif
1040 
1041 			asm volatile ("movl %0,%%d0; .word 0x4e7b,0x0808" : :
1042 					"d"(m68060_pcr_init):"d0" );
1043 
1044 			/* bus/addrerr vectors */
1045 			vectab[2] = buserr60;
1046 			vectab[3] = addrerr4060;
1047 
1048 #if defined(M060SP)
1049 			/* integer support */
1050 			vectab[61] = (trapfun *)&I_CALL_TOP[128 + 0x00];
1051 
1052 			/* floating point support */
1053 			/*
1054 			 * XXX maybe we really should run-time check for the
1055 			 * stack frame format here:
1056 			 */
1057 			vectab[11] = (trapfun *)&FP_CALL_TOP[128 + 0x30];
1058 
1059 			vectab[55] = (trapfun *)&FP_CALL_TOP[128 + 0x38];
1060 			vectab[60] = (trapfun *)&FP_CALL_TOP[128 + 0x40];
1061 
1062 			vectab[54] = (trapfun *)&FP_CALL_TOP[128 + 0x00];
1063 			vectab[52] = (trapfun *)&FP_CALL_TOP[128 + 0x08];
1064 			vectab[53] = (trapfun *)&FP_CALL_TOP[128 + 0x10];
1065 			vectab[51] = (trapfun *)&FP_CALL_TOP[128 + 0x18];
1066 			vectab[50] = (trapfun *)&FP_CALL_TOP[128 + 0x20];
1067 			vectab[49] = (trapfun *)&FP_CALL_TOP[128 + 0x28];
1068 #else
1069 			vectab[61] = illinst;
1070 #endif
1071 			vectab[48] = fpfault;
1072 		}
1073 		break;
1074 #endif /* defined(M68060) */
1075 #if defined(M68040)
1076 	case CPU_68040:
1077 		{
1078 			extern trapfun	*vectab[256];
1079 			extern trapfun	buserr40, addrerr4060;
1080 
1081 			/* bus/addrerr vectors */
1082 			vectab[2] = buserr40;
1083 			vectab[3] = addrerr4060;
1084 		}
1085 		break;
1086 #endif /* defined(M68040) */
1087 #if defined(M68030) || defined(M68020)
1088 	case CPU_68030:
1089 	case CPU_68020:
1090 		{
1091 			extern trapfun	*vectab[256];
1092 			extern trapfun	buserr2030, addrerr2030;
1093 
1094 			/* bus/addrerr vectors */
1095 			vectab[2] = buserr2030;
1096 			vectab[3] = addrerr2030;
1097 		}
1098 		break;
1099 #endif /* defined(M68030) || defined(M68020) */
1100 	}
1101 
1102 	DCIS();
1103 }
1104 
1105 #ifdef DEBUG
1106 void dump_segtable __P((u_int *));
1107 void dump_pagetable __P((u_int *, u_int, u_int));
1108 u_int vmtophys __P((u_int *, u_int));
1109 
1110 void
1111 dump_segtable(stp)
1112 	u_int *stp;
1113 {
1114 	u_int *s, *es;
1115 	int shift, i;
1116 
1117 	s = stp;
1118 	{
1119 		es = s + (ATARI_STSIZE >> 2);
1120 		shift = SG_ISHIFT;
1121 	}
1122 
1123 	/*
1124 	 * XXX need changes for 68040
1125 	 */
1126 	for (i = 0; s < es; s++, i++)
1127 		if (*s & SG_V)
1128 			printf("$%08x: $%08x\t", i << shift, *s & SG_FRAME);
1129 	printf("\n");
1130 }
1131 
1132 void
1133 dump_pagetable(ptp, i, n)
1134 	u_int *ptp, i, n;
1135 {
1136 	u_int *p, *ep;
1137 
1138 	p = ptp + i;
1139 	ep = p + n;
1140 	for (; p < ep; p++, i++)
1141 		if (*p & PG_V)
1142 			printf("$%08x -> $%08x\t", i, *p & PG_FRAME);
1143 	printf("\n");
1144 }
1145 
1146 u_int
1147 vmtophys(ste, vm)
1148 	u_int *ste, vm;
1149 {
1150 	ste = (u_int *) (*(ste + (vm >> SEGSHIFT)) & SG_FRAME);
1151 		ste += (vm & SG_PMASK) >> PGSHIFT;
1152 	return((*ste & -NBPG) | (vm & (NBPG - 1)));
1153 }
1154 
1155 #endif
1156