1 /* $NetBSD: pci_hades.c,v 1.3 2002/09/27 15:35:54 provos Exp $ */ 2 3 /* 4 * Copyright (c) 1996 Leo Weppelman. All rights reserved. 5 * Copyright (c) 1996, 1997 Christopher G. Demetriou. All rights reserved. 6 * Copyright (c) 1994 Charles M. Hannum. All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Charles M. Hannum. 19 * 4. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #include <sys/types.h> 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/device.h> 38 39 #include <machine/bus.h> 40 41 #include <dev/pci/pcivar.h> 42 #include <dev/pci/pcireg.h> 43 44 #include <machine/cpu.h> 45 #include <machine/iomap.h> 46 #include <machine/mfp.h> 47 #include <machine/bswap.h> 48 49 #include <atari/atari/device.h> 50 #include <atari/pci/pci_vga.h> 51 #include <atari/dev/grf_etreg.h> 52 53 int 54 pci_bus_maxdevs(pc, busno) 55 pci_chipset_tag_t pc; 56 int busno; 57 { 58 return (4); 59 } 60 61 static int pci_config_offset __P((pcitag_t)); 62 63 /* 64 * Atari_init.c maps the config areas NBPG bytes apart.... 65 */ 66 static int pci_config_offset(tag) 67 pcitag_t tag; 68 { 69 int device; 70 71 device = (tag >> 11) & 0x1f; 72 return(device * NBPG); 73 } 74 75 pcireg_t 76 pci_conf_read(pc, tag, reg) 77 pci_chipset_tag_t pc; 78 pcitag_t tag; 79 int reg; 80 { 81 u_long data; 82 83 data = *(u_long *)(pci_conf_addr + pci_config_offset(tag) + reg); 84 return (bswap32(data)); 85 } 86 87 void 88 pci_conf_write(pc, tag, reg, data) 89 pci_chipset_tag_t pc; 90 pcitag_t tag; 91 int reg; 92 pcireg_t data; 93 { 94 *((u_long *)(pci_conf_addr + pci_config_offset(tag) + reg)) 95 = bswap32(data); 96 } 97 98 /* 99 * The interrupt stuff is rather ugly. On the Hades, all interrupt lines 100 * for a slot are wired together and connected to IO 0,1,2 or 5 (slots: 101 * (0-3) on the TT-MFP. The Pci-config code initializes the irq. number 102 * to the slot position. 103 */ 104 static pci_intr_info_t iinfo[4] = { { -1 }, { -1 }, { -1 }, { -1 } }; 105 106 static int iifun __P((int, int)); 107 108 static int 109 iifun(slot, sr) 110 int slot; 111 int sr; 112 { 113 pci_intr_info_t *iinfo_p; 114 int s; 115 116 iinfo_p = &iinfo[slot]; 117 118 /* 119 * Disable the interrupts 120 */ 121 MFP2->mf_imrb &= ~iinfo_p->imask; 122 123 if ((sr & PSL_IPL) >= (iinfo_p->ipl & PSL_IPL)) { 124 /* 125 * We're running at a too high priority now. 126 */ 127 add_sicallback((si_farg)iifun, (void*)slot, 0); 128 } 129 else { 130 s = splx(iinfo_p->ipl); 131 (void) (iinfo_p->ifunc)(iinfo_p->iarg); 132 splx(s); 133 134 /* 135 * Re-enable interrupts after handling 136 */ 137 MFP2->mf_imrb |= iinfo_p->imask; 138 } 139 return 1; 140 } 141 142 void * 143 pci_intr_establish(pc, ih, level, ih_fun, ih_arg) 144 pci_chipset_tag_t pc; 145 pci_intr_handle_t ih; 146 int level; 147 int (*ih_fun) __P((void *)); 148 void *ih_arg; 149 { 150 pci_intr_info_t *iinfo_p; 151 struct intrhand *ihand; 152 int slot; 153 154 slot = ih; 155 iinfo_p = &iinfo[slot]; 156 157 if (iinfo_p->ipl > 0) 158 panic("pci_intr_establish: interrupt was already established"); 159 160 ihand = intr_establish((slot == 3) ? 23 : 16 + slot, USER_VEC, 0, 161 (hw_ifun_t)iifun, (void *)slot); 162 if (ihand != NULL) { 163 iinfo_p->ipl = level; 164 iinfo_p->imask = (slot == 3) ? 0x80 : (0x01 << slot); 165 iinfo_p->ifunc = ih_fun; 166 iinfo_p->iarg = ih_arg; 167 iinfo_p->ihand = ihand; 168 169 /* 170 * Enable (unmask) the interrupt 171 */ 172 MFP2->mf_imrb |= iinfo_p->imask; 173 MFP2->mf_ierb |= iinfo_p->imask; 174 return(iinfo_p); 175 } 176 return NULL; 177 } 178 179 void 180 pci_intr_disestablish(pc, cookie) 181 pci_chipset_tag_t pc; 182 void *cookie; 183 { 184 pci_intr_info_t *iinfo_p = (pci_intr_info_t *)cookie; 185 186 if (iinfo->ipl < 0) 187 panic("pci_intr_disestablish: interrupt was not established"); 188 189 MFP2->mf_imrb &= ~iinfo->imask; 190 MFP2->mf_ierb &= ~iinfo->imask; 191 (void) intr_disestablish(iinfo_p->ihand); 192 iinfo_p->ipl = -1; 193 } 194 195 /* 196 * XXX: Why are we repeating this everywhere! (Leo) 197 */ 198 #define PCI_LINMEMBASE 0x0e000000 199 200 static u_char crt_tab[] = { 201 0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f, 202 0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00, 203 0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3, 204 0xff }; 205 206 static u_char seq_tab[] = { 207 0x03, 0x00, 0x03, 0x00, 0x02, 0x00, 0x00, 0x00 }; 208 209 static u_char attr_tab[] = { 210 0x0c, 0x00, 0x0f, 0x08, 0x00, 0x00, 0x00, 0x00 }; 211 212 static u_char gdc_tab[] = { 213 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00, 0xff }; 214 215 void 216 ati_vga_init(pc, tag, id, ba, fb) 217 pci_chipset_tag_t pc; 218 pcitag_t tag; 219 int id; 220 volatile u_char *ba; 221 u_char *fb; 222 { 223 int i, csr; 224 225 /* Turn on the card */ 226 pci_conf_write(pc, tag, PCI_MAPREG_START, PCI_LINMEMBASE); 227 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 228 csr |= (PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_IO_ENABLE); 229 csr |= PCI_COMMAND_MASTER_ENABLE; 230 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr); 231 232 /* 233 * Make sure we're allowed to write all crt-registers and reload them. 234 */ 235 WCrt(ba, CRT_ID_END_VER_RETR, (RCrt(ba, CRT_ID_END_VER_RETR) & 0x7f)); 236 237 for (i = 0; i < 0x18; i++) 238 WCrt(ba, i, crt_tab[i]); 239 for (i = 0; i < 8; i++) 240 WSeq(ba, i, seq_tab[i]); 241 for (i = 0; i < 9; i++) 242 WGfx(ba, i, gdc_tab[i]); 243 for (i = 0x10; i < 0x18; i++) 244 WAttr(ba, i, attr_tab[i - 0x10]); 245 WAttr(ba, 0x20, 0); 246 } 247