xref: /netbsd/sys/arch/cesfic/include/pte.h (revision bf9ec67e)
1 /*	$NetBSD: pte.h,v 1.1 2001/05/14 18:23:13 drochner Exp $	*/
2 
3 /*
4  * Copyright (c) 1988 University of Utah.
5  * Copyright (c) 1982, 1986, 1990, 1993
6  *	The Regents of the University of California.  All rights reserved.
7  *
8  * This code is derived from software contributed to Berkeley by
9  * the Systems Programming Group of the University of Utah Computer
10  * Science Department.
11  *
12  * Redistribution and use in source and binary forms, with or without
13  * modification, are permitted provided that the following conditions
14  * are met:
15  * 1. Redistributions of source code must retain the above copyright
16  *    notice, this list of conditions and the following disclaimer.
17  * 2. Redistributions in binary form must reproduce the above copyright
18  *    notice, this list of conditions and the following disclaimer in the
19  *    documentation and/or other materials provided with the distribution.
20  * 3. All advertising materials mentioning features or use of this software
21  *    must display the following acknowledgement:
22  *	This product includes software developed by the University of
23  *	California, Berkeley and its contributors.
24  * 4. Neither the name of the University nor the names of its contributors
25  *    may be used to endorse or promote products derived from this software
26  *    without specific prior written permission.
27  *
28  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38  * SUCH DAMAGE.
39  *
40  * from: Utah $Hdr: pte.h 1.13 92/01/20$
41  *
42  *	@(#)pte.h	8.1 (Berkeley) 6/10/93
43  */
44 
45 #ifndef	_MACHINE_PTE_H_
46 #define	_MACHINE_PTE_H_
47 
48 /*
49  * m68k hardware segment/page table entries
50  */
51 
52 typedef int	st_entry_t;	/* segment table entry */
53 typedef int	pt_entry_t;	/* Mach page table entry */
54 
55 #define	PT_ENTRY_NULL	((pt_entry_t *) 0)
56 #define	ST_ENTRY_NULL	((st_entry_t *) 0)
57 
58 #define	SG_V		0x00000002	/* segment is valid */
59 #define	SG_NV		0x00000000
60 #define	SG_PROT		0x00000004	/* access protection mask */
61 #define	SG_RO		0x00000004
62 #define	SG_RW		0x00000000
63 #define	SG_U		0x00000008	/* modified bit (68040) */
64 #define	SG_FRAME	0xfffff000
65 #define	SG_IMASK	0xffc00000
66 #define	SG_ISHIFT	22
67 #define	SG_PMASK	0x003ff000
68 #define	SG_PSHIFT	12
69 
70 /* 68040 additions */
71 #define	SG4_MASK1	0xfe000000
72 #define	SG4_SHIFT1	25
73 #define	SG4_MASK2	0x01fc0000
74 #define	SG4_SHIFT2	18
75 #define	SG4_MASK3	0x0003f000
76 #define	SG4_SHIFT3	12
77 #define	SG4_ADDR1	0xfffffe00
78 #define	SG4_ADDR2	0xffffff00
79 #define	SG4_LEV1SIZE	128
80 #define	SG4_LEV2SIZE	128
81 #define	SG4_LEV3SIZE	64
82 
83 #define	PG_V		0x00000001
84 #define	PG_NV		0x00000000
85 #define	PG_PROT		0x00000004
86 #define	PG_U		0x00000008
87 #define	PG_M		0x00000010
88 #define	PG_W		0x00000100
89 #define	PG_RO		0x00000004
90 #define	PG_RW		0x00000000
91 #define	PG_FRAME	0xfffff000
92 #define	PG_CI		0x00000040
93 #define PG_SHIFT	12
94 #define	PG_PFNUM(x)	(((x) & PG_FRAME) >> PG_SHIFT)
95 
96 /* 68040 additions */
97 #define	PG_CMASK	0x00000060	/* cache mode mask */
98 #define	PG_CWT		0x00000000	/* writethrough caching */
99 #define	PG_CCB		0x00000020	/* copyback caching */
100 #define	PG_CIS		0x00000040	/* cache inhibited serialized */
101 #define	PG_CIN		0x00000060	/* cache inhibited nonserialized */
102 #define	PG_SO		0x00000080	/* supervisor only */
103 
104 #define HP_STSIZE	(MAXUL2SIZE*SG4_LEV2SIZE*sizeof(st_entry_t))
105 					/* user process segment table size */
106 #define HP_MAX_PTSIZE	0x400000	/* max size of UPT */
107 #define HP_MAX_KPTSIZE	0x100000	/* max memory to allocate to KPT */
108 #define HP_PTBASE	0x10000000	/* UPT map base address */
109 #define HP_PTMAXSIZE	0x70000000	/* UPT map maximum size */
110 
111 /*
112  * Kernel virtual address to page table entry and to physical address.
113  */
114 #define	kvtopte(va) \
115 	(&Sysmap[((unsigned)(va)) >> PGSHIFT])
116 #define	ptetokv(pt) \
117 	((((pt_entry_t *)(pt) - Sysmap) << PGSHIFT))
118 #define	xxxkvtophys(va) \
119 	((kvtopte(va)->pg_pfnum << PGSHIFT) | ((int)(va) & PGOFSET))
120 
121 #endif /* !_MACHINE_PTE_H_ */
122