xref: /netbsd/sys/arch/cesfic/include/z8530var.h (revision bf9ec67e)
1 /* $NetBSD: z8530var.h,v 1.1 2001/05/14 18:23:16 drochner Exp $ */
2 
3 #include <dev/ic/z8530sc.h>
4 
5 struct zsc_softc {
6 	struct	device zsc_dev;		/* required first: base device */
7 	struct	zs_chanstate *zsc_cs[2];	/* channel A and B soft state */
8 	/* Machine-dependent part follows... */
9 };
10 
11 u_char zs_read_reg __P((struct zs_chanstate *cs, u_char reg));
12 u_char zs_read_csr __P((struct zs_chanstate *cs));
13 u_char zs_read_data __P((struct zs_chanstate *cs));
14 
15 void  zs_write_reg __P((struct zs_chanstate *cs, u_char reg, u_char val));
16 void  zs_write_csr __P((struct zs_chanstate *cs, u_char val));
17 void  zs_write_data __P((struct zs_chanstate *cs, u_char val));
18 
19 /* Interrupt priority for the SCC chip; needs to match ZSHARD_PRI. */
20 #define splzs()		spl4()
21