xref: /netbsd/sys/arch/dreamcast/dreamcast/locore.S (revision bf9ec67e)
1/*	$NetBSD: locore.S,v 1.5 2002/05/09 12:32:55 uch Exp $	*/
2
3/*-
4 * Copyright (c) 2002 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 *    must display the following acknowledgement:
17 *        This product includes software developed by the NetBSD
18 *        Foundation, Inc. and its contributors.
19 * 4. Neither the name of The NetBSD Foundation nor the names of its
20 *    contributors may be used to endorse or promote products derived
21 *    from this software without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
26 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 * POSSIBILITY OF SUCH DAMAGE.
34 */
35
36#include "opt_memsize.h"
37#include "assym.h"
38
39#include <sh3/asm.h>
40#include <sh3/locore.h>
41#include <sh3/exception.h>
42#include <sh3/mmu_sh4.h>
43#include <sh3/cache_sh4.h>
44
45/*
46 * void start(void) __attribute__((__noreturn__)):
47 *	Kernel entry point.
48 */
49NENTRY(start)
50	/* Set bootstrap stack pointer */
51	mov.l	_L.bootstrap_stack, r15
52
53	/* Mask all interrupt */
54	__INTR_MASK(r0, r1)
55
56	/*
57	 * Cache initialize.
58	 *	I/D-cache enable, P0, U0, P3 write-back P1 write-through.
59	 */
60	mov.l	_L.sh4_icache_sync_all, r0
61	jsr	@r0
62	 nop
63	mov.l	_L.CCR,	r0
64	mov.l	_L.CCRconfig, r1
65	mov.l	r1, @r0
66
67	/* MMU off */
68	mov.l	_L.MMUCR, r0
69	xor	r1,	r1
70	mov.l	r1,	@r0
71
72	/* Make sure to change register bank 0 */
73	mov	#0x20,	r1
74	stc	sr,	r0
75	swap.b	r1,	r1
76	swap.w	r1,	r1
77	not	r1,	r1
78	and	r1,	r0
79	ldc	r0,	sr	/* SR.RB = 0 */
80
81	/* Go! */
82	mov.l	_L.dreamcast_startup, r0
83	jmp	@r0
84	 nop
85	/* NOTREACHED */
86	.align	2
87_L.dreamcast_startup:	.long	_C_LABEL(dreamcast_startup)
88_L.bootstrap_stack:	.long	_C_LABEL(start)
89_L.sh4_icache_sync_all:	.long	_C_LABEL(sh4_icache_sync_all)
90_L.CCR:			.long	SH4_CCR
91_L.CCRconfig:		.long	0x00000909
92_L.MMUCR:		.long	SH4_MMUCR
93	.data
94	.align	2
95	.globl	_C_LABEL(intrcnt), _C_LABEL(eintrcnt)
96	.globl	_C_LABEL(intrnames), _C_LABEL(eintrnames)
97_C_LABEL(intrcnt):
98_C_LABEL(eintrcnt):
99_C_LABEL(intrnames):
100_C_LABEL(eintrnames):
101