xref: /netbsd/sys/arch/evbarm/adi_brh/becc_mainbus.c (revision 6550d01e)
1 /*	$NetBSD: becc_mainbus.c,v 1.3 2005/12/11 12:17:06 christos Exp $	*/
2 
3 /*
4  * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *	This product includes software developed for the NetBSD Project by
20  *	Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 /*
39  * ``Big Red Head'' front-end for the ADI Engineering Big Endian Companion
40  * Chip.  We take care of setting up the BECC memory map, which is specific
41  * to the board the BECC is wired up to.
42  */
43 
44 #include <sys/cdefs.h>
45 __KERNEL_RCSID(0, "$NetBSD: becc_mainbus.c,v 1.3 2005/12/11 12:17:06 christos Exp $");
46 
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/device.h>
50 
51 #include <machine/autoconf.h>
52 #include <machine/bus.h>
53 
54 #include <evbarm/adi_brh/brhreg.h>
55 #include <evbarm/adi_brh/brhvar.h>
56 
57 #include <arm/xscale/beccreg.h>
58 #include <arm/xscale/beccvar.h>
59 
60 #include <dev/pci/pcireg.h>
61 #include <dev/pci/pcidevs.h>
62 
63 int	becc_mainbus_match(struct device *, struct cfdata *, void *);
64 void	becc_mainbus_attach(struct device *, struct device *, void *);
65 
66 CFATTACH_DECL(becc_mainbus, sizeof(struct becc_softc),
67     becc_mainbus_match, becc_mainbus_attach, NULL, NULL);
68 
69 /* There can be only one. */
70 int	becc_mainbus_found;
71 
72 int
73 becc_mainbus_match(struct device *parent, struct cfdata *cf, void *aux)
74 {
75 #if 0
76 	struct mainbus_attach_args *ma = aux;
77 #endif
78 
79 	if (becc_mainbus_found)
80 		return (0);
81 
82 #if 1
83 	/* XXX Shoot arch/arm/mainbus in the head. */
84 	return (1);
85 #else
86 	if (strcmp(cf->cf_name, ma->ma_name) == 0)
87 		return (1);
88 
89 	return (0);
90 #endif
91 }
92 
93 void
94 becc_mainbus_attach(struct device *parent, struct device *self, void *aux)
95 {
96 	extern paddr_t physical_start;
97 
98 	struct becc_softc *sc = (void *) self;
99 
100 	becc_mainbus_found = 1;
101 
102 	printf(": ADI Big Endian Companion Chip, rev. %s\n",
103 	    becc_revisions[becc_rev]);
104 
105 	/*
106 	 * Virtual addresses for the PCI I/O, 2 PCI MEM, and
107 	 * PCI CFG windows.
108 	 */
109 	sc->sc_pci_io_base = BRH_PCI_IO_VBASE;
110 	sc->sc_pci_mem_base[0] = BRH_PCI_MEM1_VBASE;
111 	sc->sc_pci_mem_base[1] = BRH_PCI_MEM2_VBASE;
112 	sc->sc_pci_cfg_base = BRH_PCI_CONF_VBASE;
113 
114 	/*
115 	 * Ver <= 7: There are 2 32M inbound PCI memory windows.  Direct-
116 	 * map them to the first 64M of SDRAM.  We have limited SDRAM to
117 	 * 64M during bootstrap in this case.
118 	 *
119 	 * Ver >= 8: There is a 128M inbound PCI memory window which can
120 	 * cover all of SDRAM, which we obviously prefer to use.
121 	 *
122 	 * We map PCI:SDRAM 1:1, placing the two smaller windows after
123 	 * after the larger one.
124 	 */
125 	sc->sc_iwin[0].iwin_base = physical_start + 128 * 1024 * 1024;
126 	sc->sc_iwin[0].iwin_xlate = physical_start;
127 	sc->sc_iwin[1].iwin_base = sc->sc_iwin[0].iwin_base+BECC_PCI_MEM1_SIZE;
128 	sc->sc_iwin[1].iwin_xlate = physical_start + BECC_PCI_MEM1_SIZE;
129 	sc->sc_iwin[2].iwin_base = physical_start;
130 	sc->sc_iwin[2].iwin_xlate = physical_start;
131 
132 	/*
133 	 * Ver <= 8: There are 2 32M outbound PCI memory windows.
134 	 * Ver >= 9: There are 3 32M outbound PCI memory windows.
135 	 *
136 	 * One of these may be byte swapped.  We don't use the third
137 	 * one available on >= Ver9.
138 	 */
139 	sc->sc_owin_xlate[0] = 32U * 1024 * 1024;
140 	sc->sc_owin_xlate[1] = 32U * 1024 * 1024;
141 	sc->sc_owin_xlate[2] = 32U * 1024 * 1024;
142 
143 	/*
144 	 * Map the 1M PCI I/O window to PCI I/O address 0.
145 	 */
146 	sc->sc_ioout_xlate = 0;
147 
148 	/*
149 	 * No platform-specific PCI interrupt routing; it's all done
150 	 * in the BECC.
151 	 */
152 
153 	becc_attach(sc);
154 }
155