xref: /netbsd/sys/arch/evbarm/dev/plcom.c (revision c4a72b64)
1 /*	$NetBSD: plcom.c,v 1.5 2002/10/23 09:11:01 jdolecek Exp $	*/
2 
3 /*-
4  * Copyright (c) 2001 ARM Ltd
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. The name of the company may not be used to endorse or promote
16  *    products derived from this software without specific prior written
17  *    permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
20  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
21  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
23  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
25  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29  * SUCH DAMAGE.
30  *
31  * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
32  * All rights reserved.
33  *
34  * This code is derived from software contributed to The NetBSD Foundation
35  * by Charles M. Hannum.
36  *
37  * Redistribution and use in source and binary forms, with or without
38  * modification, are permitted provided that the following conditions
39  * are met:
40  * 1. Redistributions of source code must retain the above copyright
41  *    notice, this list of conditions and the following disclaimer.
42  * 2. Redistributions in binary form must reproduce the above copyright
43  *    notice, this list of conditions and the following disclaimer in the
44  *    documentation and/or other materials provided with the distribution.
45  * 3. All advertising materials mentioning features or use of this software
46  *    must display the following acknowledgement:
47  *        This product includes software developed by the NetBSD
48  *        Foundation, Inc. and its contributors.
49  * 4. Neither the name of The NetBSD Foundation nor the names of its
50  *    contributors may be used to endorse or promote products derived
51  *    from this software without specific prior written permission.
52  *
53  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
54  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
55  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
56  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
57  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
58  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
59  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
60  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
61  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
62  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
63  * POSSIBILITY OF SUCH DAMAGE.
64  */
65 
66 /*
67  * Copyright (c) 1991 The Regents of the University of California.
68  * All rights reserved.
69  *
70  * Redistribution and use in source and binary forms, with or without
71  * modification, are permitted provided that the following conditions
72  * are met:
73  * 1. Redistributions of source code must retain the above copyright
74  *    notice, this list of conditions and the following disclaimer.
75  * 2. Redistributions in binary form must reproduce the above copyright
76  *    notice, this list of conditions and the following disclaimer in the
77  *    documentation and/or other materials provided with the distribution.
78  * 3. All advertising materials mentioning features or use of this software
79  *    must display the following acknowledgement:
80  *	This product includes software developed by the University of
81  *	California, Berkeley and its contributors.
82  * 4. Neither the name of the University nor the names of its contributors
83  *    may be used to endorse or promote products derived from this software
84  *    without specific prior written permission.
85  *
86  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
87  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
88  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
89  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
90  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
91  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
92  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
93  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
94  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
95  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
96  * SUCH DAMAGE.
97  *
98  *	@(#)com.c	7.5 (Berkeley) 5/16/91
99  */
100 
101 /*
102  * COM driver for the Prime Cell PL010 UART, which is similar to the 16C550,
103  * but has a completely different programmer's model.
104  * Derived from the NS16550AF com driver.
105  */
106 
107 #include "opt_plcom.h"
108 #include "opt_ddb.h"
109 #include "opt_kgdb.h"
110 
111 #include "rnd.h"
112 #if NRND > 0 && defined(RND_COM)
113 #include <sys/rnd.h>
114 #endif
115 
116 /*
117  * Override cnmagic(9) macro before including <sys/systm.h>.
118  * We need to know if cn_check_magic triggered debugger, so set a flag.
119  * Callers of cn_check_magic must declare int cn_trapped = 0;
120  * XXX: this is *ugly*!
121  */
122 #define cn_trap()				\
123 	do {					\
124 		console_debugger();		\
125 		cn_trapped = 1;			\
126 	} while (/* CONSTCOND */ 0)
127 
128 #include <sys/param.h>
129 #include <sys/systm.h>
130 #include <sys/ioctl.h>
131 #include <sys/select.h>
132 #include <sys/tty.h>
133 #include <sys/proc.h>
134 #include <sys/user.h>
135 #include <sys/conf.h>
136 #include <sys/file.h>
137 #include <sys/uio.h>
138 #include <sys/kernel.h>
139 #include <sys/syslog.h>
140 #include <sys/types.h>
141 #include <sys/device.h>
142 #include <sys/malloc.h>
143 #include <sys/timepps.h>
144 #include <sys/vnode.h>
145 
146 #include <machine/intr.h>
147 #include <machine/bus.h>
148 
149 #include <evbarm/dev/plcomreg.h>
150 #include <evbarm/dev/plcomvar.h>
151 
152 #include <dev/cons.h>
153 
154 static void plcom_enable_debugport (struct plcom_softc *);
155 
156 void	plcom_config	(struct plcom_softc *);
157 void	plcom_shutdown	(struct plcom_softc *);
158 int	plcomspeed	(long, long);
159 static	u_char	cflag2lcr (tcflag_t);
160 int	plcomparam	(struct tty *, struct termios *);
161 void	plcomstart	(struct tty *);
162 int	plcomhwiflow	(struct tty *, int);
163 
164 void	plcom_loadchannelregs (struct plcom_softc *);
165 void	plcom_hwiflow	(struct plcom_softc *);
166 void	plcom_break	(struct plcom_softc *, int);
167 void	plcom_modem	(struct plcom_softc *, int);
168 void	tiocm_to_plcom	(struct plcom_softc *, u_long, int);
169 int	plcom_to_tiocm	(struct plcom_softc *);
170 void	plcom_iflush	(struct plcom_softc *);
171 
172 int	plcom_common_getc (dev_t, bus_space_tag_t, bus_space_handle_t);
173 void	plcom_common_putc (dev_t, bus_space_tag_t, bus_space_handle_t, int);
174 
175 int	plcominit	(bus_space_tag_t, bus_addr_t, int, int, tcflag_t,
176 			    bus_space_handle_t *);
177 
178 dev_type_open(plcomopen);
179 dev_type_close(plcomclose);
180 dev_type_read(plcomread);
181 dev_type_write(plcomwrite);
182 dev_type_ioctl(plcomioctl);
183 dev_type_stop(plcomstop);
184 dev_type_tty(plcomtty);
185 dev_type_poll(plcompoll);
186 
187 int	plcomcngetc	(dev_t);
188 void	plcomcnputc	(dev_t, int);
189 void	plcomcnpollc	(dev_t, int);
190 
191 #define	integrate	static inline
192 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
193 void 	plcomsoft	(void *);
194 #else
195 #ifndef __NO_SOFT_SERIAL_INTERRUPT
196 void 	plcomsoft	(void);
197 #else
198 void 	plcomsoft	(void *);
199 struct callout plcomsoft_callout = CALLOUT_INITIALIZER;
200 #endif
201 #endif
202 integrate void plcom_rxsoft	(struct plcom_softc *, struct tty *);
203 integrate void plcom_txsoft	(struct plcom_softc *, struct tty *);
204 integrate void plcom_stsoft	(struct plcom_softc *, struct tty *);
205 integrate void plcom_schedrx	(struct plcom_softc *);
206 void	plcomdiag		(void *);
207 
208 extern struct cfdriver plcom_cd;
209 
210 const struct cdevsw plcom_cdevsw = {
211 	plcomopen, plcomclose, plcomread, plcomwrite, plcomioctl,
212 	plcomstop, plcomtty, plcompoll, nommap, ttykqfilter, D_TTY
213 };
214 
215 /*
216  * Make this an option variable one can patch.
217  * But be warned:  this must be a power of 2!
218  */
219 u_int plcom_rbuf_size = PLCOM_RING_SIZE;
220 
221 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
222 u_int plcom_rbuf_hiwat = (PLCOM_RING_SIZE * 1) / 4;
223 u_int plcom_rbuf_lowat = (PLCOM_RING_SIZE * 3) / 4;
224 
225 static int	plcomconsunit = -1;
226 static bus_space_tag_t plcomconstag;
227 static bus_space_handle_t plcomconsioh;
228 static int	plcomconsattached;
229 static int plcomconsrate;
230 static tcflag_t plcomconscflag;
231 static struct cnm_state plcom_cnm_state;
232 
233 static int ppscap =
234 	PPS_TSFMT_TSPEC |
235 	PPS_CAPTUREASSERT |
236 	PPS_CAPTURECLEAR |
237 #ifdef  PPS_SYNC
238 	PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR |
239 #endif	/* PPS_SYNC */
240 	PPS_OFFSETASSERT | PPS_OFFSETCLEAR;
241 
242 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
243 #ifdef __NO_SOFT_SERIAL_INTERRUPT
244 volatile int	plcom_softintr_scheduled;
245 #endif
246 #endif
247 
248 #ifdef KGDB
249 #include <sys/kgdb.h>
250 
251 static int plcom_kgdb_unit;
252 static bus_space_tag_t plcom_kgdb_iot;
253 static bus_space_handle_t plcom_kgdb_ioh;
254 static int plcom_kgdb_attached;
255 
256 int	plcom_kgdb_getc (void *);
257 void	plcom_kgdb_putc (void *, int);
258 #endif /* KGDB */
259 
260 #define	PLCOMUNIT_MASK	0x7ffff
261 #define	PLCOMDIALOUT_MASK	0x80000
262 
263 #define	PLCOMUNIT(x)	(minor(x) & PLCOMUNIT_MASK)
264 #define	PLCOMDIALOUT(x)	(minor(x) & PLCOMDIALOUT_MASK)
265 
266 #define	PLCOM_ISALIVE(sc)	((sc)->enabled != 0 && \
267 			 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE))
268 
269 #define	BR	BUS_SPACE_BARRIER_READ
270 #define	BW	BUS_SPACE_BARRIER_WRITE
271 #define PLCOM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, PLCOM_UART_SIZE, (f))
272 
273 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(PLCOM_MPLOCK)
274 
275 #define PLCOM_LOCK(sc) simple_lock(&(sc)->sc_lock)
276 #define PLCOM_UNLOCK(sc) simple_unlock(&(sc)->sc_lock)
277 
278 #else
279 
280 #define PLCOM_LOCK(sc)
281 #define PLCOM_UNLOCK(sc)
282 
283 #endif
284 
285 int
286 plcomspeed(long speed, long frequency)
287 {
288 #define	divrnd(n, q)	(((n)*2/(q)+1)/2)	/* divide and round off */
289 
290 	int x, err;
291 
292 #if 0
293 	if (speed == 0)
294 		return 0;
295 #endif
296 	if (speed <= 0)
297 		return -1;
298 	x = divrnd(frequency / 16, speed);
299 	if (x <= 0)
300 		return -1;
301 	err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000;
302 	if (err < 0)
303 		err = -err;
304 	if (err > PLCOM_TOLERANCE)
305 		return -1;
306 	return x;
307 
308 #undef	divrnd
309 }
310 
311 #ifdef PLCOM_DEBUG
312 int	plcom_debug = 0;
313 
314 void plcomstatus (struct plcom_softc *, char *);
315 void
316 plcomstatus(struct plcom_softc *sc, char *str)
317 {
318 	struct tty *tp = sc->sc_tty;
319 
320 	printf("%s: %s %sclocal  %sdcd %sts_carr_on %sdtr %stx_stopped\n",
321 	    sc->sc_dev.dv_xname, str,
322 	    ISSET(tp->t_cflag, CLOCAL) ? "+" : "-",
323 	    ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-",
324 	    ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-",
325 	    ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-",
326 	    sc->sc_tx_stopped ? "+" : "-");
327 
328 	printf("%s: %s %scrtscts %scts %sts_ttstop  %srts %xrx_flags\n",
329 	    sc->sc_dev.dv_xname, str,
330 	    ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-",
331 	    ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-",
332 	    ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-",
333 	    ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-",
334 	    sc->sc_rx_flags);
335 }
336 #endif
337 
338 int
339 plcomprobe1(bus_space_tag_t iot, bus_space_handle_t ioh)
340 {
341 	int data;
342 
343 	/* Disable the UART.  */
344 	bus_space_write_1(iot, ioh, plcom_cr, 0);
345 	/* Make sure the FIFO is off.  */
346 	bus_space_write_1(iot, ioh, plcom_lcr, LCR_8BITS);
347 	/* Disable interrupts.  */
348 	bus_space_write_1(iot, ioh, plcom_iir, 0);
349 
350 	/* Make sure we swallow anything in the receiving register.  */
351 	data = bus_space_read_1(iot, ioh, plcom_dr);
352 
353 	if (bus_space_read_1(iot, ioh, plcom_lcr) != LCR_8BITS)
354 		return 0;
355 
356 	data = bus_space_read_1(iot, ioh, plcom_fr) & (FR_RXFF | FR_RXFE);
357 
358 	if (data != FR_RXFE)
359 		return 0;
360 
361 	return 1;
362 }
363 
364 static void
365 plcom_enable_debugport(struct plcom_softc *sc)
366 {
367 	int s;
368 
369 	/* Turn on line break interrupt, set carrier. */
370 	s = splserial();
371 	PLCOM_LOCK(sc);
372 	sc->sc_cr = CR_RIE | CR_RTIE | CR_UARTEN;
373 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, plcom_cr, sc->sc_cr);
374 	SET(sc->sc_mcr, MCR_DTR | MCR_RTS);
375 	sc->sc_set_mcr(sc->sc_set_mcr_arg, sc->sc_dev.dv_unit, sc->sc_mcr);
376 	PLCOM_UNLOCK(sc);
377 	splx(s);
378 }
379 
380 void
381 plcom_attach_subr(struct plcom_softc *sc)
382 {
383 	int unit = sc->sc_iounit;
384 	bus_space_tag_t iot = sc->sc_iot;
385 	bus_space_handle_t ioh = sc->sc_ioh;
386 	struct tty *tp;
387 
388 	callout_init(&sc->sc_diag_callout);
389 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(PLCOM_MPLOCK)
390 	simple_lock_init(&sc->sc_lock);
391 #endif
392 
393 	/* Disable interrupts before configuring the device. */
394 	sc->sc_cr = 0;
395 
396 	if (plcomconstag && unit == plcomconsunit) {
397 		plcomconsattached = 1;
398 
399 		plcomconstag = iot;
400 		plcomconsioh = ioh;
401 
402 		/* Make sure the console is always "hardwired". */
403 		delay(1000);			/* wait for output to finish */
404 		SET(sc->sc_hwflags, PLCOM_HW_CONSOLE);
405 		SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
406 		/* Must re-enable the console immediately, or we will
407 		   hang when trying to print.  */
408 		sc->sc_cr = CR_UARTEN;
409 	}
410 
411 	bus_space_write_1(iot, ioh, plcom_cr, sc->sc_cr);
412 
413 	/* The PL010 has a 16-byte fifo, but the tx interrupt triggers when
414 	   there is space for 8 more bytes.  */
415 	sc->sc_fifolen = 8;
416 	printf("\n");
417 
418 	if (ISSET(sc->sc_hwflags, PLCOM_HW_TXFIFO_DISABLE)) {
419 		sc->sc_fifolen = 1;
420 		printf("%s: txfifo disabled\n", sc->sc_dev.dv_xname);
421 	}
422 
423 	if (sc->sc_fifolen > 1)
424 		SET(sc->sc_hwflags, PLCOM_HW_FIFO);
425 
426 	tp = ttymalloc();
427 	tp->t_oproc = plcomstart;
428 	tp->t_param = plcomparam;
429 	tp->t_hwiflow = plcomhwiflow;
430 
431 	sc->sc_tty = tp;
432 	sc->sc_rbuf = malloc(plcom_rbuf_size << 1, M_DEVBUF, M_NOWAIT);
433 	sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
434 	sc->sc_rbavail = plcom_rbuf_size;
435 	if (sc->sc_rbuf == NULL) {
436 		printf("%s: unable to allocate ring buffer\n",
437 		    sc->sc_dev.dv_xname);
438 		return;
439 	}
440 	sc->sc_ebuf = sc->sc_rbuf + (plcom_rbuf_size << 1);
441 
442 	tty_attach(tp);
443 
444 	if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) {
445 		int maj;
446 
447 		/* locate the major number */
448 		maj = cdevsw_lookup_major(&plcom_cdevsw);
449 
450 		cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit);
451 
452 		printf("%s: console\n", sc->sc_dev.dv_xname);
453 	}
454 
455 #ifdef KGDB
456 	/*
457 	 * Allow kgdb to "take over" this port.  If this is
458 	 * the kgdb device, it has exclusive use.
459 	 */
460 	if (iot == plcom_kgdb_iot && unit == plcom_kgdb_unit) {
461 		plcom_kgdb_attached = 1;
462 
463 		SET(sc->sc_hwflags, PLCOM_HW_KGDB);
464 		printf("%s: kgdb\n", sc->sc_dev.dv_xname);
465 	}
466 #endif
467 
468 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
469 	sc->sc_si = softintr_establish(IPL_SOFTSERIAL, plcomsoft, sc);
470 #endif
471 
472 #if NRND > 0 && defined(RND_COM)
473 	rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname,
474 			  RND_TYPE_TTY, 0);
475 #endif
476 
477 	/* if there are no enable/disable functions, assume the device
478 	   is always enabled */
479 	if (!sc->enable)
480 		sc->enabled = 1;
481 
482 	plcom_config(sc);
483 
484 	SET(sc->sc_hwflags, PLCOM_HW_DEV_OK);
485 }
486 
487 void
488 plcom_config(struct plcom_softc *sc)
489 {
490 	bus_space_tag_t iot = sc->sc_iot;
491 	bus_space_handle_t ioh = sc->sc_ioh;
492 
493 	/* Disable interrupts before configuring the device. */
494 	sc->sc_cr = 0;
495 	bus_space_write_1(iot, ioh, plcom_cr, sc->sc_cr);
496 
497 	if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE|PLCOM_HW_KGDB))
498 		plcom_enable_debugport(sc);
499 }
500 
501 int
502 plcom_detach(self, flags)
503 	struct device *self;
504 	int flags;
505 {
506 	struct plcom_softc *sc = (struct plcom_softc *)self;
507 	int maj, mn;
508 
509 	/* locate the major number */
510 	maj = cdevsw_lookup_major(&plcom_cdevsw);
511 
512 	/* Nuke the vnodes for any open instances. */
513 	mn = self->dv_unit;
514 	vdevgone(maj, mn, mn, VCHR);
515 
516 	mn |= PLCOMDIALOUT_MASK;
517 	vdevgone(maj, mn, mn, VCHR);
518 
519 	/* Free the receive buffer. */
520 	free(sc->sc_rbuf, M_DEVBUF);
521 
522 	/* Detach and free the tty. */
523 	tty_detach(sc->sc_tty);
524 	ttyfree(sc->sc_tty);
525 
526 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
527 	/* Unhook the soft interrupt handler. */
528 	softintr_disestablish(sc->sc_si);
529 #endif
530 
531 #if NRND > 0 && defined(RND_COM)
532 	/* Unhook the entropy source. */
533 	rnd_detach_source(&sc->rnd_source);
534 #endif
535 
536 	return 0;
537 }
538 
539 int
540 plcom_activate(struct device *self, enum devact act)
541 {
542 	struct plcom_softc *sc = (struct plcom_softc *)self;
543 	int s, rv = 0;
544 
545 	s = splserial();
546 	PLCOM_LOCK(sc);
547 	switch (act) {
548 	case DVACT_ACTIVATE:
549 		rv = EOPNOTSUPP;
550 		break;
551 
552 	case DVACT_DEACTIVATE:
553 		if (sc->sc_hwflags & (PLCOM_HW_CONSOLE|PLCOM_HW_KGDB)) {
554 			rv = EBUSY;
555 			break;
556 		}
557 
558 		if (sc->disable != NULL && sc->enabled != 0) {
559 			(*sc->disable)(sc);
560 			sc->enabled = 0;
561 		}
562 		break;
563 	}
564 
565 	PLCOM_UNLOCK(sc);
566 	splx(s);
567 	return rv;
568 }
569 
570 void
571 plcom_shutdown(struct plcom_softc *sc)
572 {
573 	struct tty *tp = sc->sc_tty;
574 	int s;
575 
576 	s = splserial();
577 	PLCOM_LOCK(sc);
578 
579 	/* If we were asserting flow control, then deassert it. */
580 	SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
581 	plcom_hwiflow(sc);
582 
583 	/* Clear any break condition set with TIOCSBRK. */
584 	plcom_break(sc, 0);
585 
586 	/* Turn off PPS capture on last close. */
587 	sc->sc_ppsmask = 0;
588 	sc->ppsparam.mode = 0;
589 
590 	/*
591 	 * Hang up if necessary.  Wait a bit, so the other side has time to
592 	 * notice even if we immediately open the port again.
593 	 * Avoid tsleeping above splhigh().
594 	 */
595 	if (ISSET(tp->t_cflag, HUPCL)) {
596 		plcom_modem(sc, 0);
597 		PLCOM_UNLOCK(sc);
598 		splx(s);
599 		/* XXX tsleep will only timeout */
600 		(void) tsleep(sc, TTIPRI, ttclos, hz);
601 		s = splserial();
602 		PLCOM_LOCK(sc);
603 	}
604 
605 	/* Turn off interrupts. */
606 	if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE))
607 		/* interrupt on break */
608 		sc->sc_cr = CR_RIE | CR_RTIE | CR_UARTEN;
609 	else
610 		sc->sc_cr = 0;
611 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, plcom_cr, sc->sc_cr);
612 
613 	if (sc->disable) {
614 #ifdef DIAGNOSTIC
615 		if (!sc->enabled)
616 			panic("plcom_shutdown: not enabled?");
617 #endif
618 		(*sc->disable)(sc);
619 		sc->enabled = 0;
620 	}
621 	PLCOM_UNLOCK(sc);
622 	splx(s);
623 }
624 
625 int
626 plcomopen(dev_t dev, int flag, int mode, struct proc *p)
627 {
628 	struct plcom_softc *sc;
629 	struct tty *tp;
630 	int s, s2;
631 	int error;
632 
633 	sc = device_lookup(&plcom_cd, PLCOMUNIT(dev));
634 	if (sc == NULL || !ISSET(sc->sc_hwflags, PLCOM_HW_DEV_OK) ||
635 		sc->sc_rbuf == NULL)
636 		return ENXIO;
637 
638 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
639 		return ENXIO;
640 
641 #ifdef KGDB
642 	/*
643 	 * If this is the kgdb port, no other use is permitted.
644 	 */
645 	if (ISSET(sc->sc_hwflags, PLCOM_HW_KGDB))
646 		return EBUSY;
647 #endif
648 
649 	tp = sc->sc_tty;
650 
651 	if (ISSET(tp->t_state, TS_ISOPEN) &&
652 	    ISSET(tp->t_state, TS_XCLUDE) &&
653 		p->p_ucred->cr_uid != 0)
654 		return EBUSY;
655 
656 	s = spltty();
657 
658 	/*
659 	 * Do the following iff this is a first open.
660 	 */
661 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
662 		struct termios t;
663 
664 		tp->t_dev = dev;
665 
666 		s2 = splserial();
667 		PLCOM_LOCK(sc);
668 
669 		if (sc->enable) {
670 			if ((*sc->enable)(sc)) {
671 				PLCOM_UNLOCK(sc);
672 				splx(s2);
673 				splx(s);
674 				printf("%s: device enable failed\n",
675 				       sc->sc_dev.dv_xname);
676 				return EIO;
677 			}
678 			sc->enabled = 1;
679 			plcom_config(sc);
680 		}
681 
682 		/* Turn on interrupts. */
683 		/* IER_ERXRDY | IER_ERLS | IER_EMSC;  */
684 		sc->sc_cr = CR_RIE | CR_RTIE | CR_MSIE | CR_UARTEN;
685 		bus_space_write_1(sc->sc_iot, sc->sc_ioh, plcom_cr, sc->sc_cr);
686 
687 		/* Fetch the current modem control status, needed later. */
688 		sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, plcom_fr);
689 
690 		/* Clear PPS capture state on first open. */
691 		sc->sc_ppsmask = 0;
692 		sc->ppsparam.mode = 0;
693 
694 		PLCOM_UNLOCK(sc);
695 		splx(s2);
696 
697 		/*
698 		 * Initialize the termios status to the defaults.  Add in the
699 		 * sticky bits from TIOCSFLAGS.
700 		 */
701 		t.c_ispeed = 0;
702 		if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) {
703 			t.c_ospeed = plcomconsrate;
704 			t.c_cflag = plcomconscflag;
705 		} else {
706 			t.c_ospeed = TTYDEF_SPEED;
707 			t.c_cflag = TTYDEF_CFLAG;
708 		}
709 		if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
710 			SET(t.c_cflag, CLOCAL);
711 		if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
712 			SET(t.c_cflag, CRTSCTS);
713 		if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
714 			SET(t.c_cflag, MDMBUF);
715 		/* Make sure plcomparam() will do something. */
716 		tp->t_ospeed = 0;
717 		(void) plcomparam(tp, &t);
718 		tp->t_iflag = TTYDEF_IFLAG;
719 		tp->t_oflag = TTYDEF_OFLAG;
720 		tp->t_lflag = TTYDEF_LFLAG;
721 		ttychars(tp);
722 		ttsetwater(tp);
723 
724 		s2 = splserial();
725 		PLCOM_LOCK(sc);
726 
727 		/*
728 		 * Turn on DTR.  We must always do this, even if carrier is not
729 		 * present, because otherwise we'd have to use TIOCSDTR
730 		 * immediately after setting CLOCAL, which applications do not
731 		 * expect.  We always assert DTR while the device is open
732 		 * unless explicitly requested to deassert it.
733 		 */
734 		plcom_modem(sc, 1);
735 
736 		/* Clear the input ring, and unblock. */
737 		sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
738 		sc->sc_rbavail = plcom_rbuf_size;
739 		plcom_iflush(sc);
740 		CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
741 		plcom_hwiflow(sc);
742 
743 #ifdef PLCOM_DEBUG
744 		if (plcom_debug)
745 			plcomstatus(sc, "plcomopen  ");
746 #endif
747 
748 		PLCOM_UNLOCK(sc);
749 		splx(s2);
750 	}
751 
752 	splx(s);
753 
754 	error = ttyopen(tp, PLCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK));
755 	if (error)
756 		goto bad;
757 
758 	error = (*tp->t_linesw->l_open)(dev, tp);
759 	if (error)
760 		goto bad;
761 
762 	return 0;
763 
764 bad:
765 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
766 		/*
767 		 * We failed to open the device, and nobody else had it opened.
768 		 * Clean up the state as appropriate.
769 		 */
770 		plcom_shutdown(sc);
771 	}
772 
773 	return error;
774 }
775 
776 int
777 plcomclose(dev_t dev, int flag, int mode, struct proc *p)
778 {
779 	struct plcom_softc *sc = device_lookup(&plcom_cd, PLCOMUNIT(dev));
780 	struct tty *tp = sc->sc_tty;
781 
782 	/* XXX This is for cons.c. */
783 	if (!ISSET(tp->t_state, TS_ISOPEN))
784 		return 0;
785 
786 	(*tp->t_linesw->l_close)(tp, flag);
787 	ttyclose(tp);
788 
789 	if (PLCOM_ISALIVE(sc) == 0)
790 		return 0;
791 
792 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
793 		/*
794 		 * Although we got a last close, the device may still be in
795 		 * use; e.g. if this was the dialout node, and there are still
796 		 * processes waiting for carrier on the non-dialout node.
797 		 */
798 		plcom_shutdown(sc);
799 	}
800 
801 	return 0;
802 }
803 
804 int
805 plcomread(dev_t dev, struct uio *uio, int flag)
806 {
807 	struct plcom_softc *sc = device_lookup(&plcom_cd, PLCOMUNIT(dev));
808 	struct tty *tp = sc->sc_tty;
809 
810 	if (PLCOM_ISALIVE(sc) == 0)
811 		return EIO;
812 
813 	return (*tp->t_linesw->l_read)(tp, uio, flag);
814 }
815 
816 int
817 plcomwrite(dev_t dev, struct uio *uio, int flag)
818 {
819 	struct plcom_softc *sc = device_lookup(&plcom_cd, PLCOMUNIT(dev));
820 	struct tty *tp = sc->sc_tty;
821 
822 	if (PLCOM_ISALIVE(sc) == 0)
823 		return EIO;
824 
825 	return (*tp->t_linesw->l_write)(tp, uio, flag);
826 }
827 
828 int
829 plcompoll(dev_t dev, int events, struct proc *p)
830 {
831 	struct plcom_softc *sc = device_lookup(&plcom_cd, PLCOMUNIT(dev));
832 	struct tty *tp = sc->sc_tty;
833 
834 	if (PLCOM_ISALIVE(sc) == 0)
835 		return EIO;
836 
837 	return (*tp->t_linesw->l_poll)(tp, events, p);
838 }
839 
840 struct tty *
841 plcomtty(dev_t dev)
842 {
843 	struct plcom_softc *sc = device_lookup(&plcom_cd, PLCOMUNIT(dev));
844 	struct tty *tp = sc->sc_tty;
845 
846 	return tp;
847 }
848 
849 int
850 plcomioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
851 {
852 	struct plcom_softc *sc = device_lookup(&plcom_cd, PLCOMUNIT(dev));
853 	struct tty *tp = sc->sc_tty;
854 	int error;
855 	int s;
856 
857 	if (PLCOM_ISALIVE(sc) == 0)
858 		return EIO;
859 
860 	error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p);
861 	if (error != EPASSTHROUGH)
862 		return error;
863 
864 	error = ttioctl(tp, cmd, data, flag, p);
865 	if (error != EPASSTHROUGH)
866 		return error;
867 
868 	error = 0;
869 
870 	s = splserial();
871 	PLCOM_LOCK(sc);
872 
873 	switch (cmd) {
874 	case TIOCSBRK:
875 		plcom_break(sc, 1);
876 		break;
877 
878 	case TIOCCBRK:
879 		plcom_break(sc, 0);
880 		break;
881 
882 	case TIOCSDTR:
883 		plcom_modem(sc, 1);
884 		break;
885 
886 	case TIOCCDTR:
887 		plcom_modem(sc, 0);
888 		break;
889 
890 	case TIOCGFLAGS:
891 		*(int *)data = sc->sc_swflags;
892 		break;
893 
894 	case TIOCSFLAGS:
895 		error = suser(p->p_ucred, &p->p_acflag);
896 		if (error)
897 			break;
898 		sc->sc_swflags = *(int *)data;
899 		break;
900 
901 	case TIOCMSET:
902 	case TIOCMBIS:
903 	case TIOCMBIC:
904 		tiocm_to_plcom(sc, cmd, *(int *)data);
905 		break;
906 
907 	case TIOCMGET:
908 		*(int *)data = plcom_to_tiocm(sc);
909 		break;
910 
911 	case PPS_IOC_CREATE:
912 		break;
913 
914 	case PPS_IOC_DESTROY:
915 		break;
916 
917 	case PPS_IOC_GETPARAMS: {
918 		pps_params_t *pp;
919 		pp = (pps_params_t *)data;
920 		*pp = sc->ppsparam;
921 		break;
922 	}
923 
924 	case PPS_IOC_SETPARAMS: {
925 	  	pps_params_t *pp;
926 		int mode;
927 		pp = (pps_params_t *)data;
928 		if (pp->mode & ~ppscap) {
929 			error = EINVAL;
930 			break;
931 		}
932 		sc->ppsparam = *pp;
933 	 	/*
934 		 * Compute msr masks from user-specified timestamp state.
935 		 */
936 		mode = sc->ppsparam.mode;
937 #ifdef	PPS_SYNC
938 		if (mode & PPS_HARDPPSONASSERT) {
939 			mode |= PPS_CAPTUREASSERT;
940 			/* XXX revoke any previous HARDPPS source */
941 		}
942 		if (mode & PPS_HARDPPSONCLEAR) {
943 			mode |= PPS_CAPTURECLEAR;
944 			/* XXX revoke any previous HARDPPS source */
945 		}
946 #endif	/* PPS_SYNC */
947 		switch (mode & PPS_CAPTUREBOTH) {
948 		case 0:
949 			sc->sc_ppsmask = 0;
950 			break;
951 
952 		case PPS_CAPTUREASSERT:
953 			sc->sc_ppsmask = MSR_DCD;
954 			sc->sc_ppsassert = MSR_DCD;
955 			sc->sc_ppsclear = -1;
956 			break;
957 
958 		case PPS_CAPTURECLEAR:
959 			sc->sc_ppsmask = MSR_DCD;
960 			sc->sc_ppsassert = -1;
961 			sc->sc_ppsclear = 0;
962 			break;
963 
964 		case PPS_CAPTUREBOTH:
965 			sc->sc_ppsmask = MSR_DCD;
966 			sc->sc_ppsassert = MSR_DCD;
967 			sc->sc_ppsclear = 0;
968 			break;
969 
970 		default:
971 			error = EINVAL;
972 			break;
973 		}
974 		break;
975 	}
976 
977 	case PPS_IOC_GETCAP:
978 		*(int*)data = ppscap;
979 		break;
980 
981 	case PPS_IOC_FETCH: {
982 		pps_info_t *pi;
983 		pi = (pps_info_t *)data;
984 		*pi = sc->ppsinfo;
985 		break;
986 	}
987 
988 	case TIOCDCDTIMESTAMP:	/* XXX old, overloaded  API used by xntpd v3 */
989 		/*
990 		 * Some GPS clocks models use the falling rather than
991 		 * rising edge as the on-the-second signal.
992 		 * The old API has no way to specify PPS polarity.
993 		 */
994 		sc->sc_ppsmask = MSR_DCD;
995 #ifndef PPS_TRAILING_EDGE
996 		sc->sc_ppsassert = MSR_DCD;
997 		sc->sc_ppsclear = -1;
998 		TIMESPEC_TO_TIMEVAL((struct timeval *)data,
999 		    &sc->ppsinfo.assert_timestamp);
1000 #else
1001 		sc->sc_ppsassert = -1
1002 		sc->sc_ppsclear = 0;
1003 		TIMESPEC_TO_TIMEVAL((struct timeval *)data,
1004 		    &sc->ppsinfo.clear_timestamp);
1005 #endif
1006 		break;
1007 
1008 	default:
1009 		error = EPASSTHROUGH;
1010 		break;
1011 	}
1012 
1013 	PLCOM_UNLOCK(sc);
1014 	splx(s);
1015 
1016 #ifdef PLCOM_DEBUG
1017 	if (plcom_debug)
1018 		plcomstatus(sc, "plcomioctl ");
1019 #endif
1020 
1021 	return error;
1022 }
1023 
1024 integrate void
1025 plcom_schedrx(struct plcom_softc *sc)
1026 {
1027 
1028 	sc->sc_rx_ready = 1;
1029 
1030 	/* Wake up the poller. */
1031 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
1032 	softintr_schedule(sc->sc_si);
1033 #else
1034 #ifndef __NO_SOFT_SERIAL_INTERRUPT
1035 	setsoftserial();
1036 #else
1037 	if (!plcom_softintr_scheduled) {
1038 		plcom_softintr_scheduled = 1;
1039 		callout_reset(&plcomsoft_callout, 1, plcomsoft, NULL);
1040 	}
1041 #endif
1042 #endif
1043 }
1044 
1045 void
1046 plcom_break(struct plcom_softc *sc, int onoff)
1047 {
1048 
1049 	if (onoff)
1050 		SET(sc->sc_lcr, LCR_BRK);
1051 	else
1052 		CLR(sc->sc_lcr, LCR_BRK);
1053 
1054 	if (!sc->sc_heldchange) {
1055 		if (sc->sc_tx_busy) {
1056 			sc->sc_heldtbc = sc->sc_tbc;
1057 			sc->sc_tbc = 0;
1058 			sc->sc_heldchange = 1;
1059 		} else
1060 			plcom_loadchannelregs(sc);
1061 	}
1062 }
1063 
1064 void
1065 plcom_modem(struct plcom_softc *sc, int onoff)
1066 {
1067 
1068 	if (sc->sc_mcr_dtr == 0)
1069 		return;
1070 
1071 	if (onoff)
1072 		SET(sc->sc_mcr, sc->sc_mcr_dtr);
1073 	else
1074 		CLR(sc->sc_mcr, sc->sc_mcr_dtr);
1075 
1076 	if (!sc->sc_heldchange) {
1077 		if (sc->sc_tx_busy) {
1078 			sc->sc_heldtbc = sc->sc_tbc;
1079 			sc->sc_tbc = 0;
1080 			sc->sc_heldchange = 1;
1081 		} else
1082 			plcom_loadchannelregs(sc);
1083 	}
1084 }
1085 
1086 void
1087 tiocm_to_plcom(struct plcom_softc *sc, u_long how, int ttybits)
1088 {
1089 	u_char plcombits;
1090 
1091 	plcombits = 0;
1092 	if (ISSET(ttybits, TIOCM_DTR))
1093 		SET(plcombits, MCR_DTR);
1094 	if (ISSET(ttybits, TIOCM_RTS))
1095 		SET(plcombits, MCR_RTS);
1096 
1097 	switch (how) {
1098 	case TIOCMBIC:
1099 		CLR(sc->sc_mcr, plcombits);
1100 		break;
1101 
1102 	case TIOCMBIS:
1103 		SET(sc->sc_mcr, plcombits);
1104 		break;
1105 
1106 	case TIOCMSET:
1107 		CLR(sc->sc_mcr, MCR_DTR | MCR_RTS);
1108 		SET(sc->sc_mcr, plcombits);
1109 		break;
1110 	}
1111 
1112 	if (!sc->sc_heldchange) {
1113 		if (sc->sc_tx_busy) {
1114 			sc->sc_heldtbc = sc->sc_tbc;
1115 			sc->sc_tbc = 0;
1116 			sc->sc_heldchange = 1;
1117 		} else
1118 			plcom_loadchannelregs(sc);
1119 	}
1120 }
1121 
1122 int
1123 plcom_to_tiocm(struct plcom_softc *sc)
1124 {
1125 	u_char plcombits;
1126 	int ttybits = 0;
1127 
1128 	plcombits = sc->sc_mcr;
1129 	if (ISSET(plcombits, MCR_DTR))
1130 		SET(ttybits, TIOCM_DTR);
1131 	if (ISSET(plcombits, MCR_RTS))
1132 		SET(ttybits, TIOCM_RTS);
1133 
1134 	plcombits = sc->sc_msr;
1135 	if (ISSET(plcombits, MSR_DCD))
1136 		SET(ttybits, TIOCM_CD);
1137 	if (ISSET(plcombits, MSR_CTS))
1138 		SET(ttybits, TIOCM_CTS);
1139 	if (ISSET(plcombits, MSR_DSR))
1140 		SET(ttybits, TIOCM_DSR);
1141 
1142 	if (sc->sc_cr != 0)
1143 		SET(ttybits, TIOCM_LE);
1144 
1145 	return ttybits;
1146 }
1147 
1148 static u_char
1149 cflag2lcr(tcflag_t cflag)
1150 {
1151 	u_char lcr = 0;
1152 
1153 	switch (ISSET(cflag, CSIZE)) {
1154 	case CS5:
1155 		SET(lcr, LCR_5BITS);
1156 		break;
1157 	case CS6:
1158 		SET(lcr, LCR_6BITS);
1159 		break;
1160 	case CS7:
1161 		SET(lcr, LCR_7BITS);
1162 		break;
1163 	case CS8:
1164 		SET(lcr, LCR_8BITS);
1165 		break;
1166 	}
1167 	if (ISSET(cflag, PARENB)) {
1168 		SET(lcr, LCR_PEN);
1169 		if (!ISSET(cflag, PARODD))
1170 			SET(lcr, LCR_EPS);
1171 	}
1172 	if (ISSET(cflag, CSTOPB))
1173 		SET(lcr, LCR_STP2);
1174 
1175 	return lcr;
1176 }
1177 
1178 int
1179 plcomparam(struct tty *tp, struct termios *t)
1180 {
1181 	struct plcom_softc *sc = device_lookup(&plcom_cd, PLCOMUNIT(tp->t_dev));
1182 	int ospeed;
1183 	u_char lcr;
1184 	int s;
1185 
1186 	if (PLCOM_ISALIVE(sc) == 0)
1187 		return EIO;
1188 
1189 	ospeed = plcomspeed(t->c_ospeed, sc->sc_frequency);
1190 
1191 	/* Check requested parameters. */
1192 	if (ospeed < 0)
1193 		return EINVAL;
1194 	if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
1195 		return EINVAL;
1196 
1197 	/*
1198 	 * For the console, always force CLOCAL and !HUPCL, so that the port
1199 	 * is always active.
1200 	 */
1201 	if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
1202 	    ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) {
1203 		SET(t->c_cflag, CLOCAL);
1204 		CLR(t->c_cflag, HUPCL);
1205 	}
1206 
1207 	/*
1208 	 * If there were no changes, don't do anything.  This avoids dropping
1209 	 * input and improves performance when all we did was frob things like
1210 	 * VMIN and VTIME.
1211 	 */
1212 	if (tp->t_ospeed == t->c_ospeed &&
1213 	    tp->t_cflag == t->c_cflag)
1214 		return 0;
1215 
1216 	lcr = ISSET(sc->sc_lcr, LCR_BRK) | cflag2lcr(t->c_cflag);
1217 
1218 	s = splserial();
1219 	PLCOM_LOCK(sc);
1220 
1221 	sc->sc_lcr = lcr;
1222 
1223 	/*
1224 	 * PL010 has a fixed-length FIFO trigger point.
1225 	 */
1226 	if (ISSET(sc->sc_hwflags, PLCOM_HW_FIFO))
1227 		sc->sc_fifo = 1;
1228 	else
1229 		sc->sc_fifo = 0;
1230 
1231 	if (sc->sc_fifo)
1232 		SET(sc->sc_lcr, LCR_FEN);
1233 
1234 	/*
1235 	 * If we're not in a mode that assumes a connection is present, then
1236 	 * ignore carrier changes.
1237 	 */
1238 	if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
1239 		sc->sc_msr_dcd = 0;
1240 	else
1241 		sc->sc_msr_dcd = MSR_DCD;
1242 	/*
1243 	 * Set the flow control pins depending on the current flow control
1244 	 * mode.
1245 	 */
1246 	if (ISSET(t->c_cflag, CRTSCTS)) {
1247 		sc->sc_mcr_dtr = MCR_DTR;
1248 		sc->sc_mcr_rts = MCR_RTS;
1249 		sc->sc_msr_cts = MSR_CTS;
1250 	} else if (ISSET(t->c_cflag, MDMBUF)) {
1251 		/*
1252 		 * For DTR/DCD flow control, make sure we don't toggle DTR for
1253 		 * carrier detection.
1254 		 */
1255 		sc->sc_mcr_dtr = 0;
1256 		sc->sc_mcr_rts = MCR_DTR;
1257 		sc->sc_msr_cts = MSR_DCD;
1258 	} else {
1259 		/*
1260 		 * If no flow control, then always set RTS.  This will make
1261 		 * the other side happy if it mistakenly thinks we're doing
1262 		 * RTS/CTS flow control.
1263 		 */
1264 		sc->sc_mcr_dtr = MCR_DTR | MCR_RTS;
1265 		sc->sc_mcr_rts = 0;
1266 		sc->sc_msr_cts = 0;
1267 		if (ISSET(sc->sc_mcr, MCR_DTR))
1268 			SET(sc->sc_mcr, MCR_RTS);
1269 		else
1270 			CLR(sc->sc_mcr, MCR_RTS);
1271 	}
1272 	sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd;
1273 
1274 #if 0
1275 	if (ospeed == 0)
1276 		CLR(sc->sc_mcr, sc->sc_mcr_dtr);
1277 	else
1278 		SET(sc->sc_mcr, sc->sc_mcr_dtr);
1279 #endif
1280 
1281 	sc->sc_dlbl = ospeed;
1282 	sc->sc_dlbh = ospeed >> 8;
1283 
1284 	/* And copy to tty. */
1285 	tp->t_ispeed = 0;
1286 	tp->t_ospeed = t->c_ospeed;
1287 	tp->t_cflag = t->c_cflag;
1288 
1289 	if (!sc->sc_heldchange) {
1290 		if (sc->sc_tx_busy) {
1291 			sc->sc_heldtbc = sc->sc_tbc;
1292 			sc->sc_tbc = 0;
1293 			sc->sc_heldchange = 1;
1294 		} else
1295 			plcom_loadchannelregs(sc);
1296 	}
1297 
1298 	if (!ISSET(t->c_cflag, CHWFLOW)) {
1299 		/* Disable the high water mark. */
1300 		sc->sc_r_hiwat = 0;
1301 		sc->sc_r_lowat = 0;
1302 		if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
1303 			CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1304 			plcom_schedrx(sc);
1305 		}
1306 		if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) {
1307 			CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED);
1308 			plcom_hwiflow(sc);
1309 		}
1310 	} else {
1311 		sc->sc_r_hiwat = plcom_rbuf_hiwat;
1312 		sc->sc_r_lowat = plcom_rbuf_lowat;
1313 	}
1314 
1315 	PLCOM_UNLOCK(sc);
1316 	splx(s);
1317 
1318 	/*
1319 	 * Update the tty layer's idea of the carrier bit, in case we changed
1320 	 * CLOCAL or MDMBUF.  We don't hang up here; we only do that by
1321 	 * explicit request.
1322 	 */
1323 	(void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD));
1324 
1325 #ifdef PLCOM_DEBUG
1326 	if (plcom_debug)
1327 		plcomstatus(sc, "plcomparam ");
1328 #endif
1329 
1330 	if (!ISSET(t->c_cflag, CHWFLOW)) {
1331 		if (sc->sc_tx_stopped) {
1332 			sc->sc_tx_stopped = 0;
1333 			plcomstart(tp);
1334 		}
1335 	}
1336 
1337 	return 0;
1338 }
1339 
1340 void
1341 plcom_iflush(struct plcom_softc *sc)
1342 {
1343 	bus_space_tag_t iot = sc->sc_iot;
1344 	bus_space_handle_t ioh = sc->sc_ioh;
1345 #ifdef DIAGNOSTIC
1346 	int reg;
1347 #endif
1348 	int timo;
1349 
1350 #ifdef DIAGNOSTIC
1351 	reg = 0xffff;
1352 #endif
1353 	timo = 50000;
1354 	/* flush any pending I/O */
1355 	while (! ISSET(bus_space_read_1(iot, ioh, plcom_fr), FR_RXFE)
1356 	    && --timo)
1357 #ifdef DIAGNOSTIC
1358 		reg =
1359 #else
1360 		    (void)
1361 #endif
1362 		    bus_space_read_1(iot, ioh, plcom_dr);
1363 #ifdef DIAGNOSTIC
1364 	if (!timo)
1365 		printf("%s: plcom_iflush timeout %02x\n", sc->sc_dev.dv_xname,
1366 		       reg);
1367 #endif
1368 }
1369 
1370 void
1371 plcom_loadchannelregs(struct plcom_softc *sc)
1372 {
1373 	bus_space_tag_t iot = sc->sc_iot;
1374 	bus_space_handle_t ioh = sc->sc_ioh;
1375 
1376 	/* XXXXX necessary? */
1377 	plcom_iflush(sc);
1378 
1379 	bus_space_write_1(iot, ioh, plcom_cr, 0);
1380 
1381 	bus_space_write_1(iot, ioh, plcom_dlbl, sc->sc_dlbl);
1382 	bus_space_write_1(iot, ioh, plcom_dlbh, sc->sc_dlbh);
1383 	bus_space_write_1(iot, ioh, plcom_lcr, sc->sc_lcr);
1384 	sc->sc_set_mcr(sc->sc_set_mcr_arg, sc->sc_dev.dv_unit,
1385 	    sc->sc_mcr_active = sc->sc_mcr);
1386 
1387 	bus_space_write_1(iot, ioh, plcom_cr, sc->sc_cr);
1388 }
1389 
1390 int
1391 plcomhwiflow(struct tty *tp, int block)
1392 {
1393 	struct plcom_softc *sc = device_lookup(&plcom_cd, PLCOMUNIT(tp->t_dev));
1394 	int s;
1395 
1396 	if (PLCOM_ISALIVE(sc) == 0)
1397 		return 0;
1398 
1399 	if (sc->sc_mcr_rts == 0)
1400 		return 0;
1401 
1402 	s = splserial();
1403 	PLCOM_LOCK(sc);
1404 
1405 	if (block) {
1406 		if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1407 			SET(sc->sc_rx_flags, RX_TTY_BLOCKED);
1408 			plcom_hwiflow(sc);
1409 		}
1410 	} else {
1411 		if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
1412 			CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1413 			plcom_schedrx(sc);
1414 		}
1415 		if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1416 			CLR(sc->sc_rx_flags, RX_TTY_BLOCKED);
1417 			plcom_hwiflow(sc);
1418 		}
1419 	}
1420 
1421 	PLCOM_UNLOCK(sc);
1422 	splx(s);
1423 	return 1;
1424 }
1425 
1426 /*
1427  * (un)block input via hw flowcontrol
1428  */
1429 void
1430 plcom_hwiflow(struct plcom_softc *sc)
1431 {
1432 	if (sc->sc_mcr_rts == 0)
1433 		return;
1434 
1435 	if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) {
1436 		CLR(sc->sc_mcr, sc->sc_mcr_rts);
1437 		CLR(sc->sc_mcr_active, sc->sc_mcr_rts);
1438 	} else {
1439 		SET(sc->sc_mcr, sc->sc_mcr_rts);
1440 		SET(sc->sc_mcr_active, sc->sc_mcr_rts);
1441 	}
1442 	sc->sc_set_mcr(sc->sc_set_mcr_arg, sc->sc_dev.dv_unit,
1443 	    sc->sc_mcr_active);
1444 }
1445 
1446 
1447 void
1448 plcomstart(struct tty *tp)
1449 {
1450 	struct plcom_softc *sc = device_lookup(&plcom_cd, PLCOMUNIT(tp->t_dev));
1451 	bus_space_tag_t iot = sc->sc_iot;
1452 	bus_space_handle_t ioh = sc->sc_ioh;
1453 	int s;
1454 
1455 	if (PLCOM_ISALIVE(sc) == 0)
1456 		return;
1457 
1458 	s = spltty();
1459 	if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
1460 		goto out;
1461 	if (sc->sc_tx_stopped)
1462 		goto out;
1463 
1464 	if (tp->t_outq.c_cc <= tp->t_lowat) {
1465 		if (ISSET(tp->t_state, TS_ASLEEP)) {
1466 			CLR(tp->t_state, TS_ASLEEP);
1467 			wakeup(&tp->t_outq);
1468 		}
1469 		selwakeup(&tp->t_wsel);
1470 		if (tp->t_outq.c_cc == 0)
1471 			goto out;
1472 	}
1473 
1474 	/* Grab the first contiguous region of buffer space. */
1475 	{
1476 		u_char *tba;
1477 		int tbc;
1478 
1479 		tba = tp->t_outq.c_cf;
1480 		tbc = ndqb(&tp->t_outq, 0);
1481 
1482 		(void)splserial();
1483 		PLCOM_LOCK(sc);
1484 
1485 		sc->sc_tba = tba;
1486 		sc->sc_tbc = tbc;
1487 	}
1488 
1489 	SET(tp->t_state, TS_BUSY);
1490 	sc->sc_tx_busy = 1;
1491 
1492 	/* Enable transmit completion interrupts if necessary. */
1493 	if (!ISSET(sc->sc_cr, CR_TIE)) {
1494 		SET(sc->sc_cr, CR_TIE);
1495 		bus_space_write_1(iot, ioh, plcom_cr, sc->sc_cr);
1496 	}
1497 
1498 	/* Output the first chunk of the contiguous buffer. */
1499 	{
1500 		int n;
1501 
1502 		n = sc->sc_tbc;
1503 		if (n > sc->sc_fifolen)
1504 			n = sc->sc_fifolen;
1505 		bus_space_write_multi_1(iot, ioh, plcom_dr, sc->sc_tba, n);
1506 		sc->sc_tbc -= n;
1507 		sc->sc_tba += n;
1508 	}
1509 	PLCOM_UNLOCK(sc);
1510 out:
1511 	splx(s);
1512 	return;
1513 }
1514 
1515 /*
1516  * Stop output on a line.
1517  */
1518 void
1519 plcomstop(struct tty *tp, int flag)
1520 {
1521 	struct plcom_softc *sc = device_lookup(&plcom_cd, PLCOMUNIT(tp->t_dev));
1522 	int s;
1523 
1524 	s = splserial();
1525 	PLCOM_LOCK(sc);
1526 	if (ISSET(tp->t_state, TS_BUSY)) {
1527 		/* Stop transmitting at the next chunk. */
1528 		sc->sc_tbc = 0;
1529 		sc->sc_heldtbc = 0;
1530 		if (!ISSET(tp->t_state, TS_TTSTOP))
1531 			SET(tp->t_state, TS_FLUSH);
1532 	}
1533 	PLCOM_UNLOCK(sc);
1534 	splx(s);
1535 }
1536 
1537 void
1538 plcomdiag(void *arg)
1539 {
1540 	struct plcom_softc *sc = arg;
1541 	int overflows, floods;
1542 	int s;
1543 
1544 	s = splserial();
1545 	PLCOM_LOCK(sc);
1546 	overflows = sc->sc_overflows;
1547 	sc->sc_overflows = 0;
1548 	floods = sc->sc_floods;
1549 	sc->sc_floods = 0;
1550 	sc->sc_errors = 0;
1551 	PLCOM_UNLOCK(sc);
1552 	splx(s);
1553 
1554 	log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n",
1555 	    sc->sc_dev.dv_xname,
1556 	    overflows, overflows == 1 ? "" : "s",
1557 	    floods, floods == 1 ? "" : "s");
1558 }
1559 
1560 integrate void
1561 plcom_rxsoft(struct plcom_softc *sc, struct tty *tp)
1562 {
1563 	int (*rint) (int, struct tty *) = tp->t_linesw->l_rint;
1564 	u_char *get, *end;
1565 	u_int cc, scc;
1566 	u_char rsr;
1567 	int code;
1568 	int s;
1569 
1570 	end = sc->sc_ebuf;
1571 	get = sc->sc_rbget;
1572 	scc = cc = plcom_rbuf_size - sc->sc_rbavail;
1573 
1574 	if (cc == plcom_rbuf_size) {
1575 		sc->sc_floods++;
1576 		if (sc->sc_errors++ == 0)
1577 			callout_reset(&sc->sc_diag_callout, 60 * hz,
1578 			    plcomdiag, sc);
1579 	}
1580 
1581 	while (cc) {
1582 		code = get[0];
1583 		rsr = get[1];
1584 		if (ISSET(rsr, RSR_OE | RSR_BE | RSR_FE | RSR_PE)) {
1585 			if (ISSET(rsr, RSR_OE)) {
1586 				sc->sc_overflows++;
1587 				if (sc->sc_errors++ == 0)
1588 					callout_reset(&sc->sc_diag_callout,
1589 					    60 * hz, plcomdiag, sc);
1590 			}
1591 			if (ISSET(rsr, RSR_BE | RSR_FE))
1592 				SET(code, TTY_FE);
1593 			if (ISSET(rsr, RSR_PE))
1594 				SET(code, TTY_PE);
1595 		}
1596 		if ((*rint)(code, tp) == -1) {
1597 			/*
1598 			 * The line discipline's buffer is out of space.
1599 			 */
1600 			if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1601 				/*
1602 				 * We're either not using flow control, or the
1603 				 * line discipline didn't tell us to block for
1604 				 * some reason.  Either way, we have no way to
1605 				 * know when there's more space available, so
1606 				 * just drop the rest of the data.
1607 				 */
1608 				get += cc << 1;
1609 				if (get >= end)
1610 					get -= plcom_rbuf_size << 1;
1611 				cc = 0;
1612 			} else {
1613 				/*
1614 				 * Don't schedule any more receive processing
1615 				 * until the line discipline tells us there's
1616 				 * space available (through plcomhwiflow()).
1617 				 * Leave the rest of the data in the input
1618 				 * buffer.
1619 				 */
1620 				SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1621 			}
1622 			break;
1623 		}
1624 		get += 2;
1625 		if (get >= end)
1626 			get = sc->sc_rbuf;
1627 		cc--;
1628 	}
1629 
1630 	if (cc != scc) {
1631 		sc->sc_rbget = get;
1632 		s = splserial();
1633 		PLCOM_LOCK(sc);
1634 
1635 		cc = sc->sc_rbavail += scc - cc;
1636 		/* Buffers should be ok again, release possible block. */
1637 		if (cc >= sc->sc_r_lowat) {
1638 			if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1639 				CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1640 				SET(sc->sc_cr, CR_RIE | CR_RTIE);
1641 				bus_space_write_1(sc->sc_iot, sc->sc_ioh, plcom_cr, sc->sc_cr);
1642 			}
1643 			if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
1644 				CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1645 				plcom_hwiflow(sc);
1646 			}
1647 		}
1648 		PLCOM_UNLOCK(sc);
1649 		splx(s);
1650 	}
1651 }
1652 
1653 integrate void
1654 plcom_txsoft(struct plcom_softc *sc, struct tty *tp)
1655 {
1656 
1657 	CLR(tp->t_state, TS_BUSY);
1658 	if (ISSET(tp->t_state, TS_FLUSH))
1659 		CLR(tp->t_state, TS_FLUSH);
1660 	else
1661 		ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
1662 	(*tp->t_linesw->l_start)(tp);
1663 }
1664 
1665 integrate void
1666 plcom_stsoft(struct plcom_softc *sc, struct tty *tp)
1667 {
1668 	u_char msr, delta;
1669 	int s;
1670 
1671 	s = splserial();
1672 	PLCOM_LOCK(sc);
1673 	msr = sc->sc_msr;
1674 	delta = sc->sc_msr_delta;
1675 	sc->sc_msr_delta = 0;
1676 	PLCOM_UNLOCK(sc);
1677 	splx(s);
1678 
1679 	if (ISSET(delta, sc->sc_msr_dcd)) {
1680 		/*
1681 		 * Inform the tty layer that carrier detect changed.
1682 		 */
1683 		(void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD));
1684 	}
1685 
1686 	if (ISSET(delta, sc->sc_msr_cts)) {
1687 		/* Block or unblock output according to flow control. */
1688 		if (ISSET(msr, sc->sc_msr_cts)) {
1689 			sc->sc_tx_stopped = 0;
1690 			(*tp->t_linesw->l_start)(tp);
1691 		} else {
1692 			sc->sc_tx_stopped = 1;
1693 		}
1694 	}
1695 
1696 #ifdef PLCOM_DEBUG
1697 	if (plcom_debug)
1698 		plcomstatus(sc, "plcom_stsoft");
1699 #endif
1700 }
1701 
1702 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
1703 void
1704 plcomsoft(void *arg)
1705 {
1706 	struct plcom_softc *sc = arg;
1707 	struct tty *tp;
1708 
1709 	if (PLCOM_ISALIVE(sc) == 0)
1710 		return;
1711 
1712 	{
1713 #else
1714 void
1715 #ifndef __NO_SOFT_SERIAL_INTERRUPT
1716 plcomsoft(void)
1717 #else
1718 plcomsoft(void *arg)
1719 #endif
1720 {
1721 	struct plcom_softc	*sc;
1722 	struct tty	*tp;
1723 	int	unit;
1724 #ifdef __NO_SOFT_SERIAL_INTERRUPT
1725 	int s;
1726 
1727 	s = splsoftserial();
1728 	plcom_softintr_scheduled = 0;
1729 #endif
1730 
1731 	for (unit = 0; unit < plcom_cd.cd_ndevs; unit++) {
1732 		sc = device_lookup(&plcom_cd, unit);
1733 		if (sc == NULL || !ISSET(sc->sc_hwflags, PLCOM_HW_DEV_OK))
1734 			continue;
1735 
1736 		if (PLCOM_ISALIVE(sc) == 0)
1737 			continue;
1738 
1739 		tp = sc->sc_tty;
1740 		if (tp == NULL)
1741 			continue;
1742 		if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0)
1743 			continue;
1744 #endif
1745 		tp = sc->sc_tty;
1746 
1747 		if (sc->sc_rx_ready) {
1748 			sc->sc_rx_ready = 0;
1749 			plcom_rxsoft(sc, tp);
1750 		}
1751 
1752 		if (sc->sc_st_check) {
1753 			sc->sc_st_check = 0;
1754 			plcom_stsoft(sc, tp);
1755 		}
1756 
1757 		if (sc->sc_tx_done) {
1758 			sc->sc_tx_done = 0;
1759 			plcom_txsoft(sc, tp);
1760 		}
1761 	}
1762 
1763 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
1764 #ifdef __NO_SOFT_SERIAL_INTERRUPT
1765 	splx(s);
1766 #endif
1767 #endif
1768 }
1769 
1770 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS
1771 	/* there has got to be a better way to do plcomsoft() */
1772 }}
1773 #endif
1774 
1775 int
1776 plcomintr(void *arg)
1777 {
1778 	struct plcom_softc *sc = arg;
1779 	bus_space_tag_t iot = sc->sc_iot;
1780 	bus_space_handle_t ioh = sc->sc_ioh;
1781 	u_char *put, *end;
1782 	u_int cc;
1783 	u_char rsr, iir;
1784 
1785 	if (PLCOM_ISALIVE(sc) == 0)
1786 		return 0;
1787 
1788 	PLCOM_LOCK(sc);
1789 	iir = bus_space_read_1(iot, ioh, plcom_iir);
1790 	if (! ISSET(iir, IIR_IMASK)) {
1791 		PLCOM_UNLOCK(sc);
1792 		return 0;
1793 	}
1794 
1795 	end = sc->sc_ebuf;
1796 	put = sc->sc_rbput;
1797 	cc = sc->sc_rbavail;
1798 
1799 	do {
1800 		u_char	msr, delta, fr;
1801 
1802 		fr = bus_space_read_1(iot, ioh, plcom_fr);
1803 
1804 		if (!ISSET(fr, FR_RXFE) &&
1805 		    !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1806 			while (cc > 0) {
1807 				int cn_trapped = 0;
1808 				put[0] = bus_space_read_1(iot, ioh,
1809 				    plcom_dr);
1810 				rsr = bus_space_read_1(iot, ioh, plcom_rsr);
1811 				/* Clear any error status.  */
1812 				if (ISSET(rsr,
1813 				    (RSR_BE | RSR_OE | RSR_PE | RSR_FE)))
1814 					bus_space_write_1(iot, ioh, plcom_ecr,
1815 					    0);
1816 				if (ISSET(rsr, RSR_BE)) {
1817 					int cn_trapped = 0;
1818 					cn_check_magic(sc->sc_tty->t_dev,
1819 					    CNC_BREAK, plcom_cnm_state);
1820 					if (cn_trapped)
1821 						continue;
1822 #if defined(KGDB)
1823 					if (ISSET(sc->sc_hwflags,
1824 					    PLCOM_HW_KGDB)) {
1825 						kgdb_connect(1);
1826 						continue;
1827 					}
1828 #endif
1829 				}
1830 
1831 				put[1] = rsr;
1832 				cn_check_magic(sc->sc_tty->t_dev,
1833 					       put[0], plcom_cnm_state);
1834 				if (cn_trapped) {
1835 					fr = bus_space_read_1(iot, ioh,
1836 					    plcom_fr);
1837 					if (ISSET(fr, FR_RXFE))
1838 						break;
1839 
1840 					continue;
1841 				}
1842 				put += 2;
1843 				if (put >= end)
1844 					put = sc->sc_rbuf;
1845 				cc--;
1846 
1847 				fr = bus_space_read_1(iot, ioh, plcom_fr);
1848 				if (ISSET(fr, FR_RXFE))
1849 					break;
1850 			}
1851 
1852 			/*
1853 			 * Current string of incoming characters ended because
1854 			 * no more data was available or we ran out of space.
1855 			 * Schedule a receive event if any data was received.
1856 			 * If we're out of space, turn off receive interrupts.
1857 			 */
1858 			sc->sc_rbput = put;
1859 			sc->sc_rbavail = cc;
1860 			if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
1861 				sc->sc_rx_ready = 1;
1862 
1863 			/*
1864 			 * See if we are in danger of overflowing a buffer. If
1865 			 * so, use hardware flow control to ease the pressure.
1866 			 */
1867 			if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) &&
1868 			    cc < sc->sc_r_hiwat) {
1869 				SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1870 				plcom_hwiflow(sc);
1871 			}
1872 
1873 			/*
1874 			 * If we're out of space, disable receive interrupts
1875 			 * until the queue has drained a bit.
1876 			 */
1877 			if (!cc) {
1878 				SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1879 				CLR(sc->sc_cr, CR_RIE | CR_RTIE);
1880 				bus_space_write_1(iot, ioh, plcom_cr,
1881 				    sc->sc_cr);
1882 			}
1883 		} else {
1884 			if (ISSET(iir, IIR_RIS)) {
1885 				bus_space_write_1(iot, ioh, plcom_cr, 0);
1886 				delay(10);
1887 				bus_space_write_1(iot, ioh, plcom_cr,
1888 				    sc->sc_cr);
1889 				continue;
1890 			}
1891 		}
1892 
1893 		msr = bus_space_read_1(iot, ioh, plcom_fr);
1894 		delta = msr ^ sc->sc_msr;
1895 		sc->sc_msr = msr;
1896 		/* Clear any pending modem status interrupt.  */
1897 		if (iir & IIR_MIS)
1898 			bus_space_write_1(iot, ioh, plcom_icr, 0);
1899 		/*
1900 		 * Pulse-per-second (PSS) signals on edge of DCD?
1901 		 * Process these even if line discipline is ignoring DCD.
1902 		 */
1903 		if (delta & sc->sc_ppsmask) {
1904 			struct timeval tv;
1905 		    	if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) {
1906 				/* XXX nanotime() */
1907 				microtime(&tv);
1908 				TIMEVAL_TO_TIMESPEC(&tv,
1909 				    &sc->ppsinfo.assert_timestamp);
1910 				if (sc->ppsparam.mode & PPS_OFFSETASSERT) {
1911 					timespecadd(&sc->ppsinfo.assert_timestamp,
1912 					    &sc->ppsparam.assert_offset,
1913 						    &sc->ppsinfo.assert_timestamp);
1914 				}
1915 
1916 #ifdef PPS_SYNC
1917 				if (sc->ppsparam.mode & PPS_HARDPPSONASSERT)
1918 					hardpps(&tv, tv.tv_usec);
1919 #endif
1920 				sc->ppsinfo.assert_sequence++;
1921 				sc->ppsinfo.current_mode = sc->ppsparam.mode;
1922 
1923 			} else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) {
1924 				/* XXX nanotime() */
1925 				microtime(&tv);
1926 				TIMEVAL_TO_TIMESPEC(&tv,
1927 				    &sc->ppsinfo.clear_timestamp);
1928 				if (sc->ppsparam.mode & PPS_OFFSETCLEAR) {
1929 					timespecadd(&sc->ppsinfo.clear_timestamp,
1930 					    &sc->ppsparam.clear_offset,
1931 					    &sc->ppsinfo.clear_timestamp);
1932 				}
1933 
1934 #ifdef PPS_SYNC
1935 				if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR)
1936 					hardpps(&tv, tv.tv_usec);
1937 #endif
1938 				sc->ppsinfo.clear_sequence++;
1939 				sc->ppsinfo.current_mode = sc->ppsparam.mode;
1940 			}
1941 		}
1942 
1943 		/*
1944 		 * Process normal status changes
1945 		 */
1946 		if (ISSET(delta, sc->sc_msr_mask)) {
1947 			SET(sc->sc_msr_delta, delta);
1948 
1949 			/*
1950 			 * Stop output immediately if we lose the output
1951 			 * flow control signal or carrier detect.
1952 			 */
1953 			if (ISSET(~msr, sc->sc_msr_mask)) {
1954 				sc->sc_tbc = 0;
1955 				sc->sc_heldtbc = 0;
1956 #ifdef PLCOM_DEBUG
1957 				if (plcom_debug)
1958 					plcomstatus(sc, "plcomintr  ");
1959 #endif
1960 			}
1961 
1962 			sc->sc_st_check = 1;
1963 		}
1964 
1965 		/*
1966 		 * Done handling any receive interrupts. See if data
1967 		 * can be * transmitted as well. Schedule tx done
1968 		 * event if no data left * and tty was marked busy.
1969 		 */
1970 		if (ISSET(iir, IIR_TIS)) {
1971 			/*
1972 			 * If we've delayed a parameter change, do it
1973 			 * now, and restart * output.
1974 			 */
1975 			if (sc->sc_heldchange) {
1976 				plcom_loadchannelregs(sc);
1977 				sc->sc_heldchange = 0;
1978 				sc->sc_tbc = sc->sc_heldtbc;
1979 				sc->sc_heldtbc = 0;
1980 			}
1981 
1982 			/*
1983 			 * Output the next chunk of the contiguous
1984 			 * buffer, if any.
1985 			 */
1986 			if (sc->sc_tbc > 0) {
1987 				int n;
1988 
1989 				n = sc->sc_tbc;
1990 				if (n > sc->sc_fifolen)
1991 					n = sc->sc_fifolen;
1992 				bus_space_write_multi_1(iot, ioh, plcom_dr,
1993 				    sc->sc_tba, n);
1994 				sc->sc_tbc -= n;
1995 				sc->sc_tba += n;
1996 			} else {
1997 				/*
1998 				 * Disable transmit plcompletion
1999 				 * interrupts if necessary.
2000 				 */
2001 				if (ISSET(sc->sc_cr, CR_TIE)) {
2002 					CLR(sc->sc_cr, CR_TIE);
2003 					bus_space_write_1(iot, ioh, plcom_cr,
2004 					    sc->sc_cr);
2005 				}
2006 				if (sc->sc_tx_busy) {
2007 					sc->sc_tx_busy = 0;
2008 					sc->sc_tx_done = 1;
2009 				}
2010 			}
2011 		}
2012 	} while (ISSET((iir = bus_space_read_1(iot, ioh, plcom_iir)),
2013 	    IIR_IMASK));
2014 
2015 	PLCOM_UNLOCK(sc);
2016 
2017 	/* Wake up the poller. */
2018 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
2019 	softintr_schedule(sc->sc_si);
2020 #else
2021 #ifndef __NO_SOFT_SERIAL_INTERRUPT
2022 	setsoftserial();
2023 #else
2024 	if (!plcom_softintr_scheduled) {
2025 		plcom_softintr_scheduled = 1;
2026 		callout_reset(&plcomsoft_callout, 1, plcomsoft, NULL);
2027 	}
2028 #endif
2029 #endif
2030 
2031 #if NRND > 0 && defined(RND_COM)
2032 	rnd_add_uint32(&sc->rnd_source, iir | rsr);
2033 #endif
2034 
2035 	return 1;
2036 }
2037 
2038 /*
2039  * The following functions are polled getc and putc routines, shared
2040  * by the console and kgdb glue.
2041  *
2042  * The read-ahead code is so that you can detect pending in-band
2043  * cn_magic in polled mode while doing output rather than having to
2044  * wait until the kernel decides it needs input.
2045  */
2046 
2047 #define MAX_READAHEAD	20
2048 static int plcom_readahead[MAX_READAHEAD];
2049 static int plcom_readaheadcount = 0;
2050 
2051 int
2052 plcom_common_getc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh)
2053 {
2054 	int s = splserial();
2055 	u_char stat, c;
2056 
2057 	/* got a character from reading things earlier */
2058 	if (plcom_readaheadcount > 0) {
2059 		int i;
2060 
2061 		c = plcom_readahead[0];
2062 		for (i = 1; i < plcom_readaheadcount; i++) {
2063 			plcom_readahead[i-1] = plcom_readahead[i];
2064 		}
2065 		plcom_readaheadcount--;
2066 		splx(s);
2067 		return c;
2068 	}
2069 
2070 	/* block until a character becomes available */
2071 	while (ISSET(stat = bus_space_read_1(iot, ioh, plcom_fr), FR_RXFE))
2072 		;
2073 
2074 	c = bus_space_read_1(iot, ioh, plcom_dr);
2075 	stat = bus_space_read_1(iot, ioh, plcom_iir);
2076 	{
2077 		int cn_trapped = 0; /* unused */
2078 #ifdef DDB
2079 		extern int db_active;
2080 		if (!db_active)
2081 #endif
2082 			cn_check_magic(dev, c, plcom_cnm_state);
2083 	}
2084 	splx(s);
2085 	return c;
2086 }
2087 
2088 void
2089 plcom_common_putc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh,
2090     int c)
2091 {
2092 	int s = splserial();
2093 	int timo;
2094 
2095 	int cin, stat;
2096 	if (plcom_readaheadcount < MAX_READAHEAD
2097 	     && !ISSET(stat = bus_space_read_1(iot, ioh, plcom_fr), FR_RXFE)) {
2098 		int cn_trapped = 0;
2099 		cin = bus_space_read_1(iot, ioh, plcom_dr);
2100 		stat = bus_space_read_1(iot, ioh, plcom_iir);
2101 		cn_check_magic(dev, cin, plcom_cnm_state);
2102 		plcom_readahead[plcom_readaheadcount++] = cin;
2103 	}
2104 
2105 	/* wait for any pending transmission to finish */
2106 	timo = 150000;
2107 	while (!ISSET(bus_space_read_1(iot, ioh, plcom_fr), FR_TXFE) && --timo)
2108 		continue;
2109 
2110 	bus_space_write_1(iot, ioh, plcom_dr, c);
2111 	PLCOM_BARRIER(iot, ioh, BR | BW);
2112 
2113 	/* wait for this transmission to complete */
2114 	timo = 1500000;
2115 	while (!ISSET(bus_space_read_1(iot, ioh, plcom_fr), FR_TXFE) && --timo)
2116 		continue;
2117 
2118 	splx(s);
2119 }
2120 
2121 /*
2122  * Initialize UART for use as console or KGDB line.
2123  */
2124 int
2125 plcominit(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency,
2126     tcflag_t cflag, bus_space_handle_t *iohp)
2127 {
2128 	bus_space_handle_t ioh;
2129 
2130 	if (bus_space_map(iot, iobase, PLCOM_UART_SIZE, 0, &ioh))
2131 		return ENOMEM; /* ??? */
2132 
2133 	rate = plcomspeed(rate, frequency);
2134 	bus_space_write_1(iot, ioh, plcom_cr, 0);
2135 	bus_space_write_1(iot, ioh, plcom_dlbl, rate);
2136 	bus_space_write_1(iot, ioh, plcom_dlbh, rate >> 8);
2137 	bus_space_write_1(iot, ioh, plcom_lcr, cflag2lcr(cflag) | LCR_FEN);
2138 	bus_space_write_1(iot, ioh, plcom_cr, CR_UARTEN);
2139 
2140 #if 0
2141 	/* Ought to do something like this, but we have no sc to
2142 	   dereference. */
2143 	sc->sc_set_mcr(sc->sc_set_mcr_arg, sc->sc_dev.dv_unit,
2144 	    MCR_DTR | MCR_RTS);
2145 #endif
2146 
2147 	*iohp = ioh;
2148 	return 0;
2149 }
2150 
2151 /*
2152  * Following are all routines needed for PLCOM to act as console
2153  */
2154 struct consdev plcomcons = {
2155 	NULL, NULL, plcomcngetc, plcomcnputc, plcomcnpollc, NULL,
2156 	NODEV, CN_NORMAL
2157 };
2158 
2159 
2160 int
2161 plcomcnattach(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency,
2162     tcflag_t cflag, int unit)
2163 {
2164 	int res;
2165 
2166 	res = plcominit(iot, iobase, rate, frequency, cflag, &plcomconsioh);
2167 	if (res)
2168 		return res;
2169 
2170 	cn_tab = &plcomcons;
2171 	cn_init_magic(&plcom_cnm_state);
2172 	cn_set_magic("\047\001"); /* default magic is BREAK */
2173 
2174 	plcomconstag = iot;
2175 	plcomconsunit = unit;
2176 	plcomconsrate = rate;
2177 	plcomconscflag = cflag;
2178 
2179 	return 0;
2180 }
2181 
2182 void
2183 plcomcndetach(void)
2184 {
2185 	bus_space_unmap(plcomconstag, plcomconsioh, PLCOM_UART_SIZE);
2186 	plcomconstag = NULL;
2187 
2188 	cn_tab = NULL;
2189 }
2190 
2191 int
2192 plcomcngetc(dev_t dev)
2193 {
2194 	return plcom_common_getc(dev, plcomconstag, plcomconsioh);
2195 }
2196 
2197 /*
2198  * Console kernel output character routine.
2199  */
2200 void
2201 plcomcnputc(dev_t dev, int c)
2202 {
2203 	plcom_common_putc(dev, plcomconstag, plcomconsioh, c);
2204 }
2205 
2206 void
2207 plcomcnpollc(dev_t dev, int on)
2208 {
2209 
2210 }
2211 
2212 #ifdef KGDB
2213 int
2214 plcom_kgdb_attach(bus_space_tag_t iot, bus_addr_t iobase, int rate,
2215    int frequency, tcflag_t cflag, int unit)
2216 {
2217 	int res;
2218 
2219 	if (iot == plcomconstag && iobase == plcomconsunit)
2220 		return EBUSY; /* cannot share with console */
2221 
2222 	res = plcominit(iot, iobase, rate, frequency, cflag, &plcom_kgdb_ioh);
2223 	if (res)
2224 		return res;
2225 
2226 	kgdb_attach(plcom_kgdb_getc, plcom_kgdb_putc, NULL);
2227 	kgdb_dev = 123; /* unneeded, only to satisfy some tests */
2228 
2229 	plcom_kgdb_iot = iot;
2230 	plcom_kgdb_unit = unit;
2231 
2232 	return 0;
2233 }
2234 
2235 /* ARGSUSED */
2236 int
2237 plcom_kgdb_getc(void *arg)
2238 {
2239 	return plcom_common_getc(NODEV, plcom_kgdb_iot, plcom_kgdb_ioh);
2240 }
2241 
2242 /* ARGSUSED */
2243 void
2244 plcom_kgdb_putc(void *arg, int c)
2245 {
2246 	plcom_common_putc(NODEV, plcom_kgdb_iot, plcom_kgdb_ioh, c);
2247 }
2248 #endif /* KGDB */
2249 
2250 /* helper function to identify the plcom ports used by
2251  console or KGDB (and not yet autoconf attached) */
2252 int
2253 plcom_is_console(bus_space_tag_t iot, int unit,
2254     bus_space_handle_t *ioh)
2255 {
2256 	bus_space_handle_t help;
2257 
2258 	if (!plcomconsattached &&
2259 	    iot == plcomconstag && unit == plcomconsunit)
2260 		help = plcomconsioh;
2261 #ifdef KGDB
2262 	else if (!plcom_kgdb_attached &&
2263 	    iot == plcom_kgdb_iot && unit == plcom_kgdb_unit)
2264 		help = plcom_kgdb_ioh;
2265 #endif
2266 	else
2267 		return 0;
2268 
2269 	if (ioh)
2270 		*ioh = help;
2271 	return 1;
2272 }
2273