1 /*	$NetBSD: iq80321_machdep.c,v 1.6 2002/04/12 20:50:27 thorpej Exp $	*/
2 
3 /*
4  * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *	This product includes software developed for the NetBSD Project by
20  *	Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 /*
39  * Copyright (c) 1997,1998 Mark Brinicombe.
40  * Copyright (c) 1997,1998 Causality Limited.
41  * All rights reserved.
42  *
43  * Redistribution and use in source and binary forms, with or without
44  * modification, are permitted provided that the following conditions
45  * are met:
46  * 1. Redistributions of source code must retain the above copyright
47  *    notice, this list of conditions and the following disclaimer.
48  * 2. Redistributions in binary form must reproduce the above copyright
49  *    notice, this list of conditions and the following disclaimer in the
50  *    documentation and/or other materials provided with the distribution.
51  * 3. All advertising materials mentioning features or use of this software
52  *    must display the following acknowledgement:
53  *	This product includes software developed by Mark Brinicombe
54  *	for the NetBSD Project.
55  * 4. The name of the company nor the name of the author may be used to
56  *    endorse or promote products derived from this software without specific
57  *    prior written permission.
58  *
59  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
60  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
61  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
62  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
63  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
64  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
65  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69  * SUCH DAMAGE.
70  *
71  * Machine dependant functions for kernel setup for Intel IQ80321 evaluation
72  * boards using RedBoot firmware.
73  */
74 
75 #include "opt_ddb.h"
76 #include "opt_pmap_debug.h"
77 
78 #include <sys/param.h>
79 #include <sys/device.h>
80 #include <sys/systm.h>
81 #include <sys/kernel.h>
82 #include <sys/exec.h>
83 #include <sys/proc.h>
84 #include <sys/msgbuf.h>
85 #include <sys/reboot.h>
86 #include <sys/termios.h>
87 
88 #include <dev/cons.h>
89 
90 #include <machine/db_machdep.h>
91 #include <ddb/db_sym.h>
92 #include <ddb/db_extern.h>
93 
94 #include <machine/bootconfig.h>
95 #include <machine/bus.h>
96 #include <machine/cpu.h>
97 #include <machine/frame.h>
98 #include <arm/undefined.h>
99 
100 #include <arm/arm32/machdep.h>
101 
102 #include <arm/xscale/i80321reg.h>
103 #include <arm/xscale/i80321var.h>
104 
105 #include <dev/pci/ppbreg.h>
106 
107 #include <evbarm/iq80321/iq80321reg.h>
108 #include <evbarm/iq80321/iq80321var.h>
109 #include <evbarm/iq80321/obiovar.h>
110 
111 #include "opt_ipkdb.h"
112 
113 /*
114  * Address to call from cpu_reset() to reset the machine.
115  * This is machine architecture dependant as it varies depending
116  * on where the ROM appears when you turn the MMU off.
117  *
118  * XXX Not actally used on IQ80321 -- clean up the generic
119  * ARM code.
120  */
121 
122 u_int cpu_reset_address = 0x00000000;
123 
124 /* Define various stack sizes in pages */
125 #define IRQ_STACK_SIZE	1
126 #define ABT_STACK_SIZE	1
127 #ifdef IPKDB
128 #define UND_STACK_SIZE	2
129 #else
130 #define UND_STACK_SIZE	1
131 #endif
132 
133 BootConfig bootconfig;		/* Boot config storage */
134 char *boot_args = NULL;
135 char *boot_file = NULL;
136 
137 vm_offset_t physical_start;
138 vm_offset_t physical_freestart;
139 vm_offset_t physical_freeend;
140 vm_offset_t physical_end;
141 u_int free_pages;
142 vm_offset_t pagetables_start;
143 int physmem = 0;
144 
145 /*int debug_flags;*/
146 #ifndef PMAP_STATIC_L1S
147 int max_processes = 64;			/* Default number */
148 #endif	/* !PMAP_STATIC_L1S */
149 
150 /* Physical and virtual addresses for some global pages */
151 pv_addr_t systempage;
152 pv_addr_t irqstack;
153 pv_addr_t undstack;
154 pv_addr_t abtstack;
155 pv_addr_t kernelstack;
156 pv_addr_t minidataclean;
157 
158 vm_offset_t msgbufphys;
159 
160 extern u_int data_abort_handler_address;
161 extern u_int prefetch_abort_handler_address;
162 extern u_int undefined_handler_address;
163 
164 #ifdef PMAP_DEBUG
165 extern int pmap_debug_level;
166 #endif
167 
168 #define KERNEL_PT_SYS		0	/* L2 table for mapping zero page */
169 
170 #define KERNEL_PT_KERNEL	1	/* L2 table for mapping kernel */
171 #define	KERNEL_PT_KERNEL_NUM	2
172 
173 					/* L2 table for mapping i80321 */
174 #define	KERNEL_PT_IOPXS		(KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
175 
176 					/* L2 tables for mapping kernel VM */
177 #define KERNEL_PT_VMDATA	(KERNEL_PT_IOPXS + 1)
178 #define	KERNEL_PT_VMDATA_NUM	4	/* start with 16MB of KVM */
179 #define NUM_KERNEL_PTS		(KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
180 
181 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
182 
183 struct user *proc0paddr;
184 
185 /* Prototypes */
186 
187 void	consinit(void);
188 
189 #include "com.h"
190 #if NCOM > 0
191 #include <dev/ic/comreg.h>
192 #include <dev/ic/comvar.h>
193 #endif
194 
195 /*
196  * Define the default console speed for the board.  This is generally
197  * what the firmware provided with the board defaults to.
198  */
199 #ifndef CONSPEED
200 #define CONSPEED B115200
201 #endif /* ! CONSPEED */
202 
203 #ifndef CONUNIT
204 #define	CONUNIT	0
205 #endif
206 
207 #ifndef CONMODE
208 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
209 #endif
210 
211 int comcnspeed = CONSPEED;
212 int comcnmode = CONMODE;
213 int comcnunit = CONUNIT;
214 
215 /*
216  * void cpu_reboot(int howto, char *bootstr)
217  *
218  * Reboots the system
219  *
220  * Deal with any syncing, unmounting, dumping and shutdown hooks,
221  * then reset the CPU.
222  */
223 void
224 cpu_reboot(int howto, char *bootstr)
225 {
226 #ifdef DIAGNOSTIC
227 	/* info */
228 	printf("boot: howto=%08x curproc=%p\n", howto, curproc);
229 #endif
230 
231 	/*
232 	 * If we are still cold then hit the air brakes
233 	 * and crash to earth fast
234 	 */
235 	if (cold) {
236 		doshutdownhooks();
237 		printf("The operating system has halted.\n");
238 		printf("Please press any key to reboot.\n\n");
239 		cngetc();
240 		printf("rebooting...\n");
241 		goto reset;
242 	}
243 
244 	/* Disable console buffering */
245 
246 	/*
247 	 * If RB_NOSYNC was not specified sync the discs.
248 	 * Note: Unless cold is set to 1 here, syslogd will die during the
249 	 * unmount.  It looks like syslogd is getting woken up only to find
250 	 * that it cannot page part of the binary in as the filesystem has
251 	 * been unmounted.
252 	 */
253 	if (!(howto & RB_NOSYNC))
254 		bootsync();
255 
256 	/* Say NO to interrupts */
257 	splhigh();
258 
259 	/* Do a dump if requested. */
260 	if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
261 		dumpsys();
262 
263 	/* Run any shutdown hooks */
264 	doshutdownhooks();
265 
266 	/* Make sure IRQ's are disabled */
267 	IRQdisable;
268 
269 	if (howto & RB_HALT) {
270 		iq80321_7seg('.', '.');
271 		printf("The operating system has halted.\n");
272 		printf("Please press any key to reboot.\n\n");
273 		cngetc();
274 	}
275 
276 	printf("rebooting...\n\r");
277  reset:
278 	/*
279 	 * Make really really sure that all interrupts are disabled,
280 	 * and poke the Internal Bus and Peripheral Bus reset lines.
281 	 */
282 	(void) disable_interrupts(I32_bit|F32_bit);
283 	*(__volatile uint32_t *)(IQ80321_80321_VBASE + VERDE_ATU_BASE +
284 	    ATU_PCSR) = PCSR_RIB | PCSR_RPB;
285 
286 	/* ...and if that didn't work, just croak. */
287 	printf("RESET FAILED!\n");
288 	for (;;);
289 }
290 
291 /*
292  * Mapping table for core kernel memory. This memory is mapped at init
293  * time with section mappings.
294  */
295 struct l1_sec_map {
296 	vaddr_t	va;
297 	vaddr_t	pa;
298 	vsize_t	size;
299 	vm_prot_t prot;
300 	int cache;
301 } l1_sec_table[] = {
302     /*
303      * Map the on-board devices VA == PA so that we can access them
304      * with the MMU on or off.
305      */
306     {
307 	IQ80321_OBIO_BASE,
308 	IQ80321_OBIO_BASE,
309 	IQ80321_OBIO_SIZE,
310 	VM_PROT_READ|VM_PROT_WRITE,
311 	PTE_NOCACHE,
312     },
313 
314     {
315 	0,
316 	0,
317 	0,
318 	0,
319 	0,
320     }
321 };
322 
323 static void
324 iq80321_hardclock_hook(void)
325 {
326 	static int snakefreq;
327 
328 	if ((snakefreq++ & 15) == 0)
329 		iq80321_7seg_snake();
330 }
331 
332 /*
333  * u_int initarm(...)
334  *
335  * Initial entry point on startup. This gets called before main() is
336  * entered.
337  * It should be responsible for setting up everything that must be
338  * in place when main is called.
339  * This includes
340  *   Taking a copy of the boot configuration structure.
341  *   Initialising the physical console so characters can be printed.
342  *   Setting up page tables for the kernel
343  *   Relocating the kernel to the bottom of physical memory
344  */
345 u_int
346 initarm(void *arg)
347 {
348 	extern vaddr_t xscale_cache_clean_addr;
349 	extern vsize_t xscale_minidata_clean_size;
350 	int loop;
351 	int loop1;
352 	u_int l1pagetable;
353 	pv_addr_t kernel_l1pt;
354 	pv_addr_t kernel_ptpt;
355 	paddr_t memstart;
356 	psize_t memsize;
357 
358 	/*
359 	 * Clear out the 7-segment display.  Whee, the first visual
360 	 * indication that we're running kernel code.
361 	 */
362 	iq80321_7seg(' ', ' ');
363 
364 	/* Calibrate the delay loop. */
365 	i80321_calibrate_delay();
366 	i80321_hardclock_hook = iq80321_hardclock_hook;
367 
368 	/*
369 	 * Since we map the on-board devices VA==PA, and the kernel
370 	 * is running VA==PA, it's possible for us to initialize
371 	 * the console now.
372 	 */
373 	consinit();
374 
375 	/* Talk to the user */
376 	printf("\nNetBSD/evbarm (IQ80321) booting ...\n");
377 
378 	/*
379 	 * Heads up ... Setup the CPU / MMU / TLB functions
380 	 */
381 	if (set_cpufuncs())
382 		panic("cpu not recognized!");
383 
384 	/*
385 	 * We are currently running with the MMU enabled and the
386 	 * entire address space mapped VA==PA, except for the
387 	 * first 64M of RAM is also double-mapped at 0xc0000000.
388 	 * There is an L1 page table at 0xa0004000.
389 	 */
390 
391 	/*
392 	 * Fetch the SDRAM start/size from the i80321 SDRAM configration
393 	 * registers.
394 	 */
395 	i80321_sdram_bounds(&obio_bs_tag, VERDE_PMMR_BASE + VERDE_MCU_BASE,
396 	    &memstart, &memsize);
397 
398 	printf("initarm: Configuring system ...\n");
399 
400 	/* Fake bootconfig structure for the benefit of pmap.c */
401 	/* XXX must make the memory description h/w independant */
402 	bootconfig.dramblocks = 1;
403 	bootconfig.dram[0].address = memstart;
404 	bootconfig.dram[0].pages = memsize / NBPG;
405 
406 	/*
407 	 * Set up the variables that define the availablilty of
408 	 * physical memory.  For now, we're going to set
409 	 * physical_freestart to 0xa0200000 (where the kernel
410 	 * was loaded), and allocate the memory we need downwards.
411 	 * If we get too close to the L1 table that we set up, we
412 	 * will panic.  We will update physical_freestart and
413 	 * physical_freeend later to reflect what pmap_bootstrap()
414 	 * wants to see.
415 	 *
416 	 * XXX pmap_bootstrap() needs an enema.
417 	 */
418 	physical_start = bootconfig.dram[0].address;
419 	physical_end = physical_start + (bootconfig.dram[0].pages * NBPG);
420 
421 	physical_freestart = 0xa0009000UL;
422 	physical_freeend = 0xa0200000UL;
423 
424 	physmem = (physical_end - physical_start) / NBPG;
425 
426 	/* Tell the user about the memory */
427 	printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
428 	    physical_start, physical_end - 1);
429 
430 	/*
431 	 * Okay, the kernel starts 2MB in from the bottom of physical
432 	 * memory.  We are going to allocate our bootstrap pages downwards
433 	 * from there.
434 	 *
435 	 * We need to allocate some fixed page tables to get the kernel
436 	 * going.  We allocate one page directory and a number of page
437 	 * tables and store the physical addresses in the kernel_pt_table
438 	 * array.
439 	 *
440 	 * The kernel page directory must be on a 16K boundary.  The page
441 	 * tables must be on 4K bounaries.  What we do is allocate the
442 	 * page directory on the first 16K boundary that we encounter, and
443 	 * the page tables on 4K boundaries otherwise.  Since we allocate
444 	 * at least 3 L2 page tables, we are guaranteed to encounter at
445 	 * least one 16K aligned region.
446 	 */
447 
448 #ifdef VERBOSE_INIT_ARM
449 	printf("Allocating page tables\n");
450 #endif
451 
452 	free_pages = (physical_freeend - physical_freestart) / NBPG;
453 
454 #ifdef VERBOSE_INIT_ARM
455 	printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
456 	       physical_freestart, free_pages, free_pages);
457 #endif
458 
459 	/* Define a macro to simplify memory allocation */
460 #define	valloc_pages(var, np)				\
461 	alloc_pages((var).pv_pa, (np));			\
462 	(var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
463 
464 #define alloc_pages(var, np)				\
465 	physical_freeend -= ((np) * NBPG);		\
466 	if (physical_freeend < physical_freestart)	\
467 		panic("initarm: out of memory");	\
468 	(var) = physical_freeend;			\
469 	free_pages -= (np);				\
470 	memset((char *)(var), 0, ((np) * NBPG));
471 
472 	loop1 = 0;
473 	kernel_l1pt.pv_pa = 0;
474 	for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
475 		/* Are we 16KB aligned for an L1 ? */
476 		if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
477 		    && kernel_l1pt.pv_pa == 0) {
478 			valloc_pages(kernel_l1pt, L1_TABLE_SIZE / NBPG);
479 		} else {
480 			alloc_pages(kernel_pt_table[loop1].pv_pa,
481 			    L2_TABLE_SIZE / NBPG);
482 			kernel_pt_table[loop1].pv_va =
483 			    kernel_pt_table[loop1].pv_pa;
484 			++loop1;
485 		}
486 	}
487 
488 	/* This should never be able to happen but better confirm that. */
489 	if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
490 		panic("initarm: Failed to align the kernel page directory\n");
491 
492 	/*
493 	 * Allocate a page for the system page mapped to V0x00000000
494 	 * This page will just contain the system vectors and can be
495 	 * shared by all processes.
496 	 */
497 	alloc_pages(systempage.pv_pa, 1);
498 
499 	/* Allocate a page for the page table to map kernel page tables. */
500 	valloc_pages(kernel_ptpt, L2_TABLE_SIZE / NBPG);
501 
502 	/* Allocate stacks for all modes */
503 	valloc_pages(irqstack, IRQ_STACK_SIZE);
504 	valloc_pages(abtstack, ABT_STACK_SIZE);
505 	valloc_pages(undstack, UND_STACK_SIZE);
506 	valloc_pages(kernelstack, UPAGES);
507 
508 	/* Allocate enough pages for cleaning the Mini-Data cache. */
509 	KASSERT(xscale_minidata_clean_size <= NBPG);
510 	valloc_pages(minidataclean, 1);
511 
512 #ifdef VERBOSE_INIT_ARM
513 	printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
514 	    irqstack.pv_va);
515 	printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
516 	    abtstack.pv_va);
517 	printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
518 	    undstack.pv_va);
519 	printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
520 	    kernelstack.pv_va);
521 #endif
522 
523 	/*
524 	 * XXX Defer this to later so that we can reclaim the memory
525 	 * XXX used by the RedBoot page tables.
526 	 */
527 	alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / NBPG);
528 
529 	/*
530 	 * Ok we have allocated physical pages for the primary kernel
531 	 * page tables
532 	 */
533 
534 #ifdef VERBOSE_INIT_ARM
535 	printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
536 #endif
537 
538 	/*
539 	 * Now we start construction of the L1 page table
540 	 * We start by mapping the L2 page tables into the L1.
541 	 * This means that we can replace L1 mappings later on if necessary
542 	 */
543 	l1pagetable = kernel_l1pt.pv_pa;
544 
545 	/* Map the L2 pages tables in the L1 page table */
546 	pmap_link_l2pt(l1pagetable, 0x00000000,
547 	    &kernel_pt_table[KERNEL_PT_SYS]);
548 	for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
549 		pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
550 		    &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
551 	pmap_link_l2pt(l1pagetable, IQ80321_IOPXS_VBASE,
552 	    &kernel_pt_table[KERNEL_PT_IOPXS]);
553 	for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
554 		pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
555 		    &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
556 	pmap_link_l2pt(l1pagetable, PTE_BASE, &kernel_ptpt);
557 
558 	/* update the top of the kernel VM */
559 	pmap_curmaxkvaddr =
560 	    KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
561 
562 #ifdef VERBOSE_INIT_ARM
563 	printf("Mapping kernel\n");
564 #endif
565 
566 	/* Now we fill in the L2 pagetable for the kernel static code/data */
567 	{
568 		extern char etext[], _end[];
569 		size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
570 		size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
571 		u_int logical;
572 
573 		textsize = (textsize + PGOFSET) & ~PGOFSET;
574 		totalsize = (totalsize + PGOFSET) & ~PGOFSET;
575 
576 		logical = 0x00200000;	/* offset of kernel in RAM */
577 
578 		logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
579 		    physical_start + logical, textsize,
580 		    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
581 		logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
582 		    physical_start + logical, totalsize - textsize,
583 		    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
584 	}
585 
586 #ifdef VERBOSE_INIT_ARM
587 	printf("Constructing L2 page tables\n");
588 #endif
589 
590 	/* Map the stack pages */
591 	pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
592 	    IRQ_STACK_SIZE * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
593 	pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
594 	    ABT_STACK_SIZE * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
595 	pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
596 	    UND_STACK_SIZE * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
597 	pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
598 	    UPAGES * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
599 
600 	pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
601 	    L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
602 
603 	/* Map the Mini-Data cache clean area. */
604 	xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
605 	    minidataclean.pv_pa);
606 
607 	/* Map the page table that maps the kernel pages */
608 	pmap_map_entry(l1pagetable, kernel_ptpt.pv_va, kernel_ptpt.pv_pa,
609 	    VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
610 
611 	/*
612 	 * Map entries in the page table used to map PTE's
613 	 * Basically every kernel page table gets mapped here
614 	 */
615 	/* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */
616 	for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) {
617 		pmap_map_entry(l1pagetable,
618 		    PTE_BASE + ((KERNEL_BASE +
619 		    (loop * 0x00400000)) >> (PGSHIFT-2)),
620 		    kernel_pt_table[KERNEL_PT_KERNEL + loop].pv_pa,
621 		    VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
622 	}
623 	pmap_map_entry(l1pagetable,
624 	    PTE_BASE + (PTE_BASE >> (PGSHIFT-2)),
625 	    kernel_ptpt.pv_pa, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
626 	pmap_map_entry(l1pagetable,
627 	    PTE_BASE + (0x00000000 >> (PGSHIFT-2)),
628 	    kernel_pt_table[KERNEL_PT_SYS].pv_pa,
629 	    VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
630 	for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
631 		pmap_map_entry(l1pagetable,
632 		    PTE_BASE + ((KERNEL_VM_BASE +
633 		    (loop * 0x00400000)) >> (PGSHIFT-2)),
634 		    kernel_pt_table[KERNEL_PT_VMDATA + loop].pv_pa,
635 		    VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
636 
637 	/* Map the vector page. */
638 	pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
639 	    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
640 
641 	/*
642 	 * Map devices we can map w/ section mappings.
643 	 */
644 	loop = 0;
645 	while (l1_sec_table[loop].size) {
646 		vm_size_t sz;
647 
648 #ifdef VERBOSE_INIT_ARM
649 		printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
650 		    l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
651 		    l1_sec_table[loop].va);
652 #endif
653 		for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
654 			pmap_map_section(l1pagetable,
655 			    l1_sec_table[loop].va + sz,
656 			    l1_sec_table[loop].pa + sz,
657 			    l1_sec_table[loop].prot,
658 			    l1_sec_table[loop].cache);
659 		++loop;
660 	}
661 
662 	/*
663 	 * Map the PCI I/O spaces and i80321 registers.  These are too
664 	 * small to be mapped w/ section mappings.
665 	 */
666 #ifdef VERBOSE_INIT_ARM
667 	printf("Mapping IOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
668 	    VERDE_OUT_XLATE_IO_WIN0_BASE,
669 	    VERDE_OUT_XLATE_IO_WIN0_BASE + VERDE_OUT_XLATE_IO_WIN_SIZE - 1,
670 	    IQ80321_IOW_VBASE);
671 #endif
672 	pmap_map_chunk(l1pagetable, IQ80321_IOW_VBASE,
673 	    VERDE_OUT_XLATE_IO_WIN0_BASE, VERDE_OUT_XLATE_IO_WIN_SIZE,
674 	    VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
675 
676 #ifdef VERBOSE_INIT_ARM
677 	printf("Mapping 80321 0x%08lx -> 0x%08lx @ 0x%08lx\n",
678 	    VERDE_PMMR_BASE,
679 	    VERDE_PMMR_BASE + VERDE_PMMR_SIZE - 1,
680 	    IQ80321_80321_VBASE);
681 #endif
682 	pmap_map_chunk(l1pagetable, IQ80321_80321_VBASE,
683 	    VERDE_PMMR_BASE, VERDE_PMMR_SIZE,
684 	    VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
685 
686 	/*
687 	 * Give the XScale global cache clean code an appropriately
688 	 * sized chunk of unmapped VA space starting at 0xff000000
689 	 * (our device mappings end before this address).
690 	 */
691 	xscale_cache_clean_addr = 0xff000000U;
692 
693 	/*
694 	 * Now we have the real page tables in place so we can switch to them.
695 	 * Once this is done we will be running with the REAL kernel page
696 	 * tables.
697 	 */
698 
699 	/*
700 	 * Update the physical_freestart/physical_freeend/free_pages
701 	 * variables.
702 	 */
703 	{
704 		extern char _end[];
705 
706 		physical_freestart = physical_start +
707 		    (((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) -
708 		     KERNEL_BASE);
709 		physical_freeend = physical_end;
710 		free_pages = (physical_freeend - physical_freestart) / NBPG;
711 	}
712 
713 	/* Switch tables */
714 #ifdef VERBOSE_INIT_ARM
715 	printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
716 	       physical_freestart, free_pages, free_pages);
717 	printf("switching to new L1 page table  @%#lx...", kernel_l1pt.pv_pa);
718 #endif
719 	setttb(kernel_l1pt.pv_pa);
720 	cpu_tlb_flushID();
721 
722 #ifdef VERBOSE_INIT_ARM
723 	printf("done!\n");
724 #endif
725 
726 #ifdef VERBOSE_INIT_ARM
727 	printf("bootstrap done.\n");
728 #endif
729 
730 	arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL);
731 
732 	/*
733 	 * Pages were allocated during the secondary bootstrap for the
734 	 * stacks for different CPU modes.
735 	 * We must now set the r13 registers in the different CPU modes to
736 	 * point to these stacks.
737 	 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
738 	 * of the stack memory.
739 	 */
740 	printf("init subsystems: stacks ");
741 
742 	set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * NBPG);
743 	set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * NBPG);
744 	set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * NBPG);
745 
746 	/*
747 	 * Well we should set a data abort handler.
748 	 * Once things get going this will change as we will need a proper
749 	 * handler.
750 	 * Until then we will use a handler that just panics but tells us
751 	 * why.
752 	 * Initialisation of the vectors will just panic on a data abort.
753 	 * This just fills in a slighly better one.
754 	 */
755 	printf("vectors ");
756 	data_abort_handler_address = (u_int)data_abort_handler;
757 	prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
758 	undefined_handler_address = (u_int)undefinedinstruction_bounce;
759 
760 	/* Initialise the undefined instruction handlers */
761 	printf("undefined ");
762 	undefined_init();
763 
764 	/* Boot strap pmap telling it where the kernel page table is */
765 	printf("pmap ");
766 	pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt);
767 
768 	/* Setup the IRQ system */
769 	printf("irq ");
770 	i80321_intr_init();
771 	printf("done.\n");
772 
773 #ifdef IPKDB
774 	/* Initialise ipkdb */
775 	ipkdb_init();
776 	if (boothowto & RB_KDB)
777 		ipkdb_connect(0);
778 #endif
779 
780 #ifdef DDB
781 	db_machine_init();
782 
783 	/* Firmware doesn't load symbols. */
784 	ddb_init(0, NULL, NULL);
785 
786 	if (boothowto & RB_KDB)
787 		Debugger();
788 #endif
789 
790 	/* We return the new stack pointer address */
791 	return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
792 }
793 
794 void
795 consinit(void)
796 {
797 	static const bus_addr_t comcnaddrs[] = {
798 		IQ80321_UART1,		/* com0 */
799 	};
800 	static int consinit_called;
801 
802 	if (consinit_called != 0)
803 		return;
804 
805 	consinit_called = 1;
806 
807 #if NCOM > 0
808 	if (comcnattach(&obio_bs_tag, comcnaddrs[comcnunit], comcnspeed,
809 	    COM_FREQ, comcnmode))
810 		panic("can't init serial console @%lx", comcnaddrs[comcnunit]);
811 #else
812 	panic("serial console @%lx not configured", comcnaddrs[comcnunit]);
813 #endif
814 }
815