xref: /netbsd/sys/arch/evbcf/include/cpu.h (revision e0c5fc4a)
1*e0c5fc4aSad /*	$NetBSD: cpu.h,v 1.5 2019/11/23 19:40:35 ad Exp $	*/
27168dfe8Smatt 
37168dfe8Smatt /*
47168dfe8Smatt  * Copyright (c) 1988 University of Utah.
57168dfe8Smatt  * Copyright (c) 1982, 1990, 1993
67168dfe8Smatt  *	The Regents of the University of California.  All rights reserved.
77168dfe8Smatt  *
87168dfe8Smatt  * This code is derived from software contributed to Berkeley by
97168dfe8Smatt  * the Systems Programming Group of the University of Utah Computer
107168dfe8Smatt  * Science Department.
117168dfe8Smatt  *
127168dfe8Smatt  * Redistribution and use in source and binary forms, with or without
137168dfe8Smatt  * modification, are permitted provided that the following conditions
147168dfe8Smatt  * are met:
157168dfe8Smatt  * 1. Redistributions of source code must retain the above copyright
167168dfe8Smatt  *    notice, this list of conditions and the following disclaimer.
177168dfe8Smatt  * 2. Redistributions in binary form must reproduce the above copyright
187168dfe8Smatt  *    notice, this list of conditions and the following disclaimer in the
197168dfe8Smatt  *    documentation and/or other materials provided with the distribution.
207168dfe8Smatt  * 3. Neither the name of the University nor the names of its contributors
217168dfe8Smatt  *    may be used to endorse or promote products derived from this software
227168dfe8Smatt  *    without specific prior written permission.
237168dfe8Smatt  *
247168dfe8Smatt  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
257168dfe8Smatt  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
267168dfe8Smatt  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
277168dfe8Smatt  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
287168dfe8Smatt  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
297168dfe8Smatt  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
307168dfe8Smatt  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
317168dfe8Smatt  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
327168dfe8Smatt  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
337168dfe8Smatt  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
347168dfe8Smatt  * SUCH DAMAGE.
357168dfe8Smatt  *
367168dfe8Smatt  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
377168dfe8Smatt  *
387168dfe8Smatt  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
397168dfe8Smatt  */
407168dfe8Smatt 
417168dfe8Smatt #ifndef _MACHINE_CPU_H_
427168dfe8Smatt #define _MACHINE_CPU_H_
437168dfe8Smatt 
447168dfe8Smatt #if defined(_KERNEL_OPT)
457168dfe8Smatt #include "opt_lockdebug.h"
467168dfe8Smatt #include "opt_m68k_arch.h"
477168dfe8Smatt #endif
487168dfe8Smatt 
497168dfe8Smatt /*
507168dfe8Smatt  * Get common m68k CPU definitions.
517168dfe8Smatt  */
527168dfe8Smatt #include <m68k/cpu.h>
537168dfe8Smatt 
547168dfe8Smatt #if defined(_KERNEL)
557168dfe8Smatt /*
567168dfe8Smatt  * Exported definitions unique to mvme68k/68k cpu support.
577168dfe8Smatt  */
587168dfe8Smatt #define	M68K_MMU_COLDFIRE
597168dfe8Smatt 
607168dfe8Smatt /*
617168dfe8Smatt  * Arguments to hardclock and gatherstats encapsulate the previous
629a5fd629Sflxd  * machine state in an opaque clockframe.  On the evbcf, we use
637168dfe8Smatt  * what the hardware pushes on an interrupt (frame format 0).
647168dfe8Smatt  */
657168dfe8Smatt struct clockframe {
667168dfe8Smatt 	u_short	sr;		/* sr at time of interrupt */
677168dfe8Smatt 	u_long	pc;		/* pc at time of interrupt */
687168dfe8Smatt 	u_short	fmt:4,
697168dfe8Smatt 		vec:12;		/* vector offset (4-word frame) */
707168dfe8Smatt } __attribute__((packed));
717168dfe8Smatt 
727168dfe8Smatt #define	CLKF_USERMODE(framep)	(((framep)->sr & PSL_S) == 0)
737168dfe8Smatt #define	CLKF_PC(framep)		((framep)->pc)
747168dfe8Smatt 
757168dfe8Smatt /*
767168dfe8Smatt  * The clock interrupt handler can determine if it's a nested
777168dfe8Smatt  * interrupt by checking for interrupt_depth > 1.
787168dfe8Smatt  * (Remember, the clock interrupt handler itself will cause the
797168dfe8Smatt  * depth counter to be incremented).
807168dfe8Smatt  */
817168dfe8Smatt extern volatile unsigned int interrupt_depth;
827168dfe8Smatt #define	CLKF_INTR(framep)	(interrupt_depth > 1)
837168dfe8Smatt 
847168dfe8Smatt 
857168dfe8Smatt /*
867168dfe8Smatt  * Preempt the current process if in interrupt from user mode,
877168dfe8Smatt  * or after the current trap/syscall if in system mode.
887168dfe8Smatt  */
89*e0c5fc4aSad #define	cpu_need_resched(ci,l,flags)	\
90*e0c5fc4aSad 	do { aston(); } while (/* CONSTCOND */0)
917168dfe8Smatt 
927168dfe8Smatt /*
937168dfe8Smatt  * Give a profiling tick to the current process when the user profiling
949a5fd629Sflxd  * buffer pages are invalid.  On the evbcf, request an ast to send us
957168dfe8Smatt  * through trap, marking the proc as needing a profiling tick.
967168dfe8Smatt  */
977168dfe8Smatt #define	cpu_need_proftick(l)	\
987168dfe8Smatt 	do { (l)->l_pflag |= LP_OWEUPC; aston(); } while (/* CONSTCOND */0)
997168dfe8Smatt 
1007168dfe8Smatt /*
1017168dfe8Smatt  * Notify the current process (p) that it has a signal pending,
1027168dfe8Smatt  * process as soon as possible.
1037168dfe8Smatt  */
1047168dfe8Smatt #define	cpu_signotify(l)	aston()
1057168dfe8Smatt 
1067168dfe8Smatt extern int astpending;		/* need to trap before returning to user mode */
1077168dfe8Smatt #define aston() (astpending++)
1087168dfe8Smatt 
1097168dfe8Smatt /*
1107168dfe8Smatt  * Associate MVME models with CPU types.
1117168dfe8Smatt  */
1127168dfe8Smatt #define	MVME68K		1
1137168dfe8Smatt 
1147168dfe8Smatt /*
1157168dfe8Smatt  * MVME-147; 68030 CPU
1167168dfe8Smatt  */
1177168dfe8Smatt #if defined(MVME147) && !defined(M68030)
1187168dfe8Smatt #define M68030
1197168dfe8Smatt #endif
1207168dfe8Smatt 
1217168dfe8Smatt /*
1227168dfe8Smatt  * MVME-162/166/167; 68040 CPU
1237168dfe8Smatt  */
1247168dfe8Smatt #if (defined(MVME162) || defined(MVME167)) && !defined(M68040)
1257168dfe8Smatt #define M68040
1267168dfe8Smatt #endif
1277168dfe8Smatt 
1287168dfe8Smatt /*
1297168dfe8Smatt  * MVME-172/177; 68060 CPU
1307168dfe8Smatt  */
1317168dfe8Smatt #if (defined(MVME172) || defined(MVME177)) && !defined(M68060)
1327168dfe8Smatt #define M68060
1337168dfe8Smatt #endif
1347168dfe8Smatt #endif /* _KERNEL */
1357168dfe8Smatt 
1367168dfe8Smatt /*
1377168dfe8Smatt  * Values for machineid; these match the Bug's values.
1387168dfe8Smatt  */
1397168dfe8Smatt #define	MVME_147	0x147
1407168dfe8Smatt #define	MVME_162	0x162
1417168dfe8Smatt #define	MVME_166	0x166
1427168dfe8Smatt #define	MVME_167	0x167
1437168dfe8Smatt #define	MVME_172	0x172
1447168dfe8Smatt #define	MVME_177	0x177
1457168dfe8Smatt 
1467168dfe8Smatt #ifdef _KERNEL
1477168dfe8Smatt extern	int machineid;
1487168dfe8Smatt extern	int cpuspeed;
1497168dfe8Smatt extern	char *intiobase, *intiolimit;
1507168dfe8Smatt extern	u_int intiobase_phys, intiotop_phys;
1517168dfe8Smatt extern	u_long ether_data_buff_size;
1527168dfe8Smatt extern	u_char mvme_ea[6];
1537168dfe8Smatt 
1547168dfe8Smatt void	doboot(int)
1557168dfe8Smatt 	__attribute__((__noreturn__));
1567168dfe8Smatt int	nmihand(void *);
1577168dfe8Smatt void	mvme68k_abort(const char *);
1587168dfe8Smatt void	*iomap(u_long, size_t);
1597168dfe8Smatt void	iounmap(void *, size_t);
1607168dfe8Smatt void	loadustp(paddr_t);
1617168dfe8Smatt 
1627168dfe8Smatt /* physical memory addresses where mvme147's onboard devices live */
1637168dfe8Smatt #define	INTIOBASE147	(0xfffe0000u)
1647168dfe8Smatt #define	INTIOTOP147	(0xfffe5000u)
1657168dfe8Smatt 
1667168dfe8Smatt /* ditto for mvme1[67][27] */
1677168dfe8Smatt #define	INTIOBASE1xx	(0xfff40000u)
1687168dfe8Smatt #define	INTIOTOP1xx	(0xfffd0000u)
1697168dfe8Smatt 
1707168dfe8Smatt #endif /* _KERNEL */
1717168dfe8Smatt 
1727168dfe8Smatt #endif /* _MACHINE_CPU_H_ */
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