xref: /netbsd/sys/arch/ews4800mips/include/sbdvar.h (revision 6550d01e)
1 /*	$NetBSD: sbdvar.h,v 1.5 2009/12/14 00:46:03 matt Exp $	*/
2 
3 /*-
4  * Copyright (c) 2004, 2005 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by UCHIYAMA Yasushi.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #ifndef _EWS4800MIPS_SBDVAR_H_
33 #define	_EWS4800MIPS_SBDVAR_H_
34 
35 #include <sys/kcore.h>		/* phys_ram_seg_t */
36 
37 #include <machine/autoconf.h>	/* mainbus_attach_args */
38 #include <machine/vmparam.h>	/* VM_PHYSSEG_MAX */
39 #include <machine/sbd.h>	/* enum sbd_machine_type */
40 #include <machine/sbdiovar.h>	/* sbdio_attach_args */
41 
42 /* Software representation of system board */
43 struct sbd {
44 	/* Machine identification */
45 	enum sbd_machine_type machine;
46 	char name[32];
47 	int cpu_clock;
48 
49 	/* mainbus node table */
50 	const char **mainbusdevs;
51 
52 	/* System Board I/O device table */
53 	const struct sbdiodevdesc *sbdiodevs;
54 
55 	/* Memory */
56 	phys_ram_seg_t mem_clseters[VM_PHYSSEG_MAX];
57 	size_t mem_size; /* total size of memory */
58 
59 	void (*mem_init)(void *, void *);
60 
61 	/* Cache configuration (determine L2-cache size) */
62 	void (*cache_config)(void);
63 
64 	/* Write buffer */
65 	void (*wbflush)(void);
66 
67 	/* Interrupt services */
68 	void (*intr_init)(void);
69 	void *(*intr_establish)(int, int (*)(void *), void *);
70 	void (*intr_disestablish)(void *);
71 	void (*intr)(uint32_t, uint32_t, vaddr_t, uint32_t);
72 
73 	/* Interval timer helper routines */
74 	void (*initclocks)(void);
75 
76 	/* Miscellaneous */
77 	void (*consinit)(void);
78 	int (*ipl_bootdev)(void);
79 	void (*reboot)(void);
80 	void (*poweroff)(void);
81 	void (*ether_addr)(uint8_t *);
82 };
83 
84 #define	SBD_DECL(x)							\
85 void x ## _cache_config(void);						\
86 void x ## _wbflush(void);						\
87 void x ## _mem_init(void *, void *);					\
88 void x ## _intr_init(void);						\
89 void *x ## _intr_establish(int, int (*)(void *), void *);		\
90 void x ## _intr_disestablish(void *);					\
91 void x ## _intr(uint32_t, uint32_t, vaddr_t, uint32_t);			\
92 void x ## _initclocks(void);						\
93 void x ## _consinit(void);						\
94 int x ## _ipl_bootdev(void);						\
95 void x ## _reboot(void);						\
96 void x ## _poweroff(void);						\
97 void x ## _ether_addr(uint8_t *);					\
98 extern const uint32_t x ## _sr_bits[]
99 
100 #define	_SBD_OPS_SET(m, x)	platform . x = m ## _ ## x
101 
102 #define	_SBD_OPS_REGISTER_ALL(m)					\
103 	_SBD_OPS_SET(m, cache_config);					\
104 	_SBD_OPS_SET(m, wbflush);					\
105 	_SBD_OPS_SET(m, mem_init);					\
106 	_SBD_OPS_SET(m, intr_init);					\
107 	_SBD_OPS_SET(m, intr_establish);				\
108 	_SBD_OPS_SET(m, intr_disestablish);				\
109 	_SBD_OPS_SET(m, intr);						\
110 	_SBD_OPS_SET(m, initclocks);					\
111 	_SBD_OPS_SET(m, consinit);				       	\
112 	_SBD_OPS_SET(m, ipl_bootdev);					\
113 	_SBD_OPS_SET(m, reboot);					\
114 	_SBD_OPS_SET(m, poweroff);					\
115 	_SBD_OPS_SET(m, ether_addr);					\
116 
117 
118 extern struct sbd platform;
119 
120 extern int mem_cluster_cnt;
121 extern phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
122 
123 void sbd_init(void);
124 void sbd_set_mainfo(uint32_t);
125 
126 void sbd_memcluster_init(uint32_t);
127 void sbd_memcluster_setup(void *, void *);
128 void sbd_memcluster_check(void);
129 
130 void tr2_init(void);
131 void tr2a_init(void);
132 
133 #endif /* !_EWS4800MIPS_SBDVAR_H_ */
134 
135