1 /* $NetBSD: dmareg.h,v 1.12 1997/05/05 21:02:40 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1982, 1990, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by the University of 18 * California, Berkeley and its contributors. 19 * 4. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * @(#)dmareg.h 8.1 (Berkeley) 6/10/93 36 */ 37 38 #include <hp300/dev/iotypes.h> /* XXX */ 39 #include <machine/hp300spu.h> 40 41 /* 42 * Hardware layout for the 98620[ABC]: 43 * 98620A (old 320s?): byte/word DMA in up to 64K chunks 44 * 98620B (320s only): 98620A with programmable IPL 45 * 98620C (all others): byte/word/longword DMA in up to 4Gb chunks 46 */ 47 48 struct dmaBdevice { 49 v_char *dmaB_addr; 50 vu_short dmaB_count; 51 vu_short dmaB_cmd; 52 #define dmaB_stat dmaB_cmd 53 }; 54 55 struct dmadevice { 56 v_char *dma_addr; 57 vu_int dma_count; 58 vu_short dma_cmd; 59 vu_short dma_stat; 60 }; 61 62 struct dmareg { 63 struct dmaBdevice dma_Bchan0; 64 struct dmaBdevice dma_Bchan1; 65 /* the rest are 98620C specific */ 66 v_char dma_id[4]; 67 vu_char dma_cr; 68 char dma_pad1[0xEB]; 69 struct dmadevice dma_chan0; 70 char dma_pad2[0xF4]; 71 struct dmadevice dma_chan1; 72 }; 73 74 /* The hp300 has 2 DMA channels. */ 75 #define NDMACHAN 2 76 77 /* addresses */ 78 #define DMA_BASE IIOV(0x500000) 79 80 /* command bits */ 81 #define DMA_ENAB 0x0001 82 #define DMA_WORD 0x0002 83 #define DMA_WRT 0x0004 84 #define DMA_PRI 0x0008 85 #define DMA_IPL(x) (((x) - 3) << 4) 86 #define DMA_LWORD 0x0100 87 #define DMA_START 0x8000 88 89 /* status bits */ 90 #define DMA_ARMED 0x01 91 #define DMA_INTR 0x02 92 #define DMA_ACC 0x04 93 #define DMA_HALT 0x08 94 #define DMA_BERR 0x10 95 #define DMA_ALIGN 0x20 96 #define DMA_WRAP 0x40 97 98 #ifdef _KERNEL 99 /* 100 * Macros to attempt to hide the HW differences between the 98620B DMA 101 * board and the 1TQ4-0401 DMA chip (68020C "board"). The latter 102 * includes emulation registers for the former but you need to access 103 * the "native-mode" registers directly in order to do 32-bit DMA. 104 * 105 * DMA_CLEAR: Clear interrupt on DMA board. We just use the 106 * emulation registers on the 98620C as that is easiest. 107 * DMA_STAT: Read status register. Again, we always read the 108 * emulation register. Someday we might want to 109 * look at the 98620C status to get the extended bits. 110 * DMA_ARM: Load address, count and kick-off DMA. 111 */ 112 #define DMA_CLEAR(dc) do { \ 113 v_int dmaclr; \ 114 dmaclr = (int)dc->dm_Bhwaddr->dmaB_addr; \ 115 } while (0); 116 #define DMA_STAT(dc) dc->dm_Bhwaddr->dmaB_stat 117 118 #if defined(HP320) 119 #define DMA_ARM(sc, dc) \ 120 if (sc->sc_type == DMA_B) { \ 121 struct dmaBdevice *dma = dc->dm_Bhwaddr; \ 122 dma->dmaB_addr = dc->dm_chain[dc->dm_cur].dc_addr; \ 123 dma->dmaB_count = dc->dm_chain[dc->dm_cur].dc_count - 1; \ 124 dma->dmaB_cmd = dc->dm_cmd; \ 125 } else { \ 126 struct dmadevice *dma = dc->dm_hwaddr; \ 127 dma->dma_addr = dc->dm_chain[dc->dm_cur].dc_addr; \ 128 dma->dma_count = dc->dm_chain[dc->dm_cur].dc_count - 1; \ 129 dma->dma_cmd = dc->dm_cmd; \ 130 } 131 #else 132 #define DMA_ARM(sc, dc) \ 133 { \ 134 struct dmadevice *dma = dc->dm_hwaddr; \ 135 dma->dma_addr = dc->dm_chain[dc->dm_cur].dc_addr; \ 136 dma->dma_count = dc->dm_chain[dc->dm_cur].dc_count - 1; \ 137 dma->dma_cmd = dc->dm_cmd; \ 138 } 139 #endif 140 #endif 141