xref: /netbsd/sys/arch/hp300/dev/if_lereg.h (revision 6550d01e)
1 /*	$NetBSD: if_lereg.h,v 1.11 2005/12/11 12:17:14 christos Exp $	*/
2 
3 /*
4  * Copyright (c) 1982, 1990 The Regents of the University of California.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. Neither the name of the University nor the names of its contributors
16  *    may be used to endorse or promote products derived from this software
17  *    without specific prior written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
23  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29  * SUCH DAMAGE.
30  *
31  *	@(#)if_lereg.h	7.1 (Berkeley) 5/8/90
32  */
33 
34 /*
35  * DIO registers, offsets from lestd[0]
36  */
37 #define	LER0_ID			0x01		/* ID */
38 #define	LER0_STATUS		0x03		/* interrupt enable/status */
39 
40 #define	LER0_SIZE		4
41 
42 /*
43  * Control and status bits -- LER0_STATUS
44  */
45 #define	LE_IE			0x80		/* interrupt enable */
46 #define	LE_IR			0x40		/* interrupt requested */
47 #define	LE_LOCK			0x08		/* lock status register */
48 #define	LE_ACK			0x04		/* ack of lock */
49 #define	LE_JAB			0x02		/* loss of tx clock (???) */
50 
51 /*
52  * LANCE registers, offsets from lestd[1]
53  */
54 #define	LER1_RDP		0x00		/* data port */
55 #define	LER1_RAP		0x02		/* register select port */
56 
57 #define	LER1_SIZE		4
58 
59 /*
60  * LANCE buffer area.
61  */
62 #define	LE_BUFSIZE		16384
63