1 /* $NetBSD: if_lereg.h,v 1.9 1998/01/11 21:57:03 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1982, 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by the University of 18 * California, Berkeley and its contributors. 19 * 4. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * @(#)if_lereg.h 7.1 (Berkeley) 5/8/90 36 */ 37 38 /* 39 * DIO registers, offsets from lestd[0] 40 */ 41 #define LER0_ID 0x01 /* ID */ 42 #define LER0_STATUS 0x03 /* interrupt enable/status */ 43 44 #define LER0_SIZE 4 45 46 /* 47 * Control and status bits -- LER0_STATUS 48 */ 49 #define LE_IE 0x80 /* interrupt enable */ 50 #define LE_IR 0x40 /* interrupt requested */ 51 #define LE_LOCK 0x08 /* lock status register */ 52 #define LE_ACK 0x04 /* ack of lock */ 53 #define LE_JAB 0x02 /* loss of tx clock (???) */ 54 55 /* 56 * LANCE registers, offsets from lestd[1] 57 */ 58 #define LER1_RDP 0x00 /* data port */ 59 #define LER1_RAP 0x02 /* register select port */ 60 61 #define LER1_SIZE 4 62 63 /* 64 * LANCE buffer area. 65 */ 66 #define LE_BUFSIZE 16384 67