xref: /netbsd/sys/arch/hp300/hp300/vectors.s (revision bf9ec67e)
1|	$NetBSD: vectors.s,v 1.16 2001/11/17 23:29:08 gmcgarry Exp $
2
3| Copyright (c) 1997 Jason R. Thorpe.  All rights reserved.
4| Copyright (c) 1988 University of Utah
5| Copyright (c) 1990, 1993
6|	The Regents of the University of California.  All rights reserved.
7|
8| Redistribution and use in source and binary forms, with or without
9| modification, are permitted provided that the following conditions
10| are met:
11| 1. Redistributions of source code must retain the above copyright
12|    notice, this list of conditions and the following disclaimer.
13| 2. Redistributions in binary form must reproduce the above copyright
14|    notice, this list of conditions and the following disclaimer in the
15|    documentation and/or other materials provided with the distribution.
16| 3. All advertising materials mentioning features or use of this software
17|    must display the following acknowledgement:
18|	This product includes software developed by the University of
19|	California, Berkeley and its contributors.
20| 4. Neither the name of the University nor the names of its contributors
21|    may be used to endorse or promote products derived from this software
22|    without specific prior written permission.
23|
24| THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25| ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26| IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27| ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28| FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29| DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30| OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31| HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32| LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33| OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34| SUCH DAMAGE.
35|
36|	@(#)vectors.s	8.2 (Berkeley) 1/21/94
37|
38
39#define	BADTRAP16	\
40	VECTOR(badtrap) ; VECTOR(badtrap) ; \
41	VECTOR(badtrap) ; VECTOR(badtrap) ; \
42	VECTOR(badtrap) ; VECTOR(badtrap) ; \
43	VECTOR(badtrap) ; VECTOR(badtrap) ; \
44	VECTOR(badtrap) ; VECTOR(badtrap) ; \
45	VECTOR(badtrap) ; VECTOR(badtrap) ; \
46	VECTOR(badtrap) ; VECTOR(badtrap) ; \
47	VECTOR(badtrap) ; VECTOR(badtrap)
48
49	/*
50	 * bus error and address error vectors are initialized
51	 * in locore.s once we know our CPU type.
52	 */
53
54	.text
55GLOBAL(vectab)
56	VECTOR_UNUSED		/* 0: NOT USED (reset SSP) */
57	VECTOR_UNUSED		/* 1: NOT USED (reset PC) */
58	VECTOR_UNUSED		/* 2: bus error */
59	VECTOR_UNUSED		/* 3: address error */
60	VECTOR(illinst)		/* 4: illegal instruction */
61	VECTOR(zerodiv)		/* 5: zero divide */
62	VECTOR(chkinst)		/* 6: CHK instruction */
63	VECTOR(trapvinst)	/* 7: TRAPV instruction */
64	VECTOR(privinst)	/* 8: privilege violation */
65	VECTOR(trace)		/* 9: trace */
66	VECTOR(illinst)		/* 10: line 1010 emulator */
67	VECTOR(fpfline)		/* 11: line 1111 emulator */
68	VECTOR(badtrap)		/* 12: unassigned, reserved */
69	VECTOR(coperr)		/* 13: coprocessor protocol violation */
70	VECTOR(fmterr)		/* 14: format error */
71	VECTOR(badtrap)		/* 15: uninitialized interrupt vector */
72	VECTOR(badtrap)		/* 16: unassigned, reserved */
73	VECTOR(badtrap)		/* 17: unassigned, reserved */
74	VECTOR(badtrap)		/* 18: unassigned, reserved */
75	VECTOR(badtrap)		/* 19: unassigned, reserved */
76	VECTOR(badtrap)		/* 20: unassigned, reserved */
77	VECTOR(badtrap)		/* 21: unassigned, reserved */
78	VECTOR(badtrap)		/* 22: unassigned, reserved */
79	VECTOR(badtrap)		/* 23: unassigned, reserved */
80	VECTOR(spurintr)	/* 24: spurious interrupt */
81	VECTOR(intrhand)	/* 25: level 1 interrupt autovector */
82	VECTOR(intrhand)	/* 26: level 2 interrupt autovector */
83	VECTOR(intrhand)	/* 27: level 3 interrupt autovector */
84	VECTOR(intrhand)	/* 28: level 4 interrupt autovector */
85	VECTOR(intrhand)	/* 29: level 5 interrupt autovector */
86	VECTOR(lev6intr)	/* 30: level 6 interrupt autovector */
87	VECTOR(lev7intr)	/* 31: level 7 interrupt autovector */
88	VECTOR(trap0)		/* 32: syscalls */
89#ifdef COMPAT_13
90	VECTOR(trap1)		/* 33: compat_13_sigreturn */
91#else
92	VECTOR(illinst)
93#endif
94	VECTOR(trap2)		/* 34: trace */
95	VECTOR(trap3)		/* 35: sigreturn special syscall */
96	VECTOR(illinst)		/* 36: TRAP instruction vector */
97	VECTOR(illinst)		/* 37: TRAP instruction vector */
98	VECTOR(illinst)		/* 38: TRAP instruction vector */
99	VECTOR(illinst)		/* 39: TRAP instruction vector */
100	VECTOR(illinst)		/* 40: TRAP instruction vector */
101	VECTOR(illinst)		/* 41: TRAP instruction vector */
102	VECTOR(illinst)		/* 42: TRAP instruction vector */
103	VECTOR(illinst)		/* 43: TRAP instruction vector */
104	VECTOR(trap12)		/* 44: TRAP instruction vector */
105	VECTOR(illinst)		/* 45: TRAP instruction vector */
106	VECTOR(illinst)		/* 46: TRAP instruction vector */
107	VECTOR(trap15)		/* 47: TRAP instruction vector */
108#ifdef FPSP
109 	ASVECTOR(bsun)		/* 48: FPCP branch/set on unordered cond */
110 	ASVECTOR(inex)		/* 49: FPCP inexact result */
111 	ASVECTOR(dz)		/* 50: FPCP divide by zero */
112 	ASVECTOR(unfl)		/* 51: FPCP underflow */
113 	ASVECTOR(operr)		/* 52: FPCP operand error */
114 	ASVECTOR(ovfl)		/* 53: FPCP overflow */
115 	ASVECTOR(snan)		/* 54: FPCP signalling NAN */
116#else
117 	VECTOR(fpfault)		/* 48: FPCP branch/set on unordered cond */
118 	VECTOR(fpfault)		/* 49: FPCP inexact result */
119 	VECTOR(fpfault)		/* 50: FPCP divide by zero */
120 	VECTOR(fpfault)		/* 51: FPCP underflow */
121 	VECTOR(fpfault)		/* 52: FPCP operand error */
122 	VECTOR(fpfault)		/* 53: FPCP overflow */
123 	VECTOR(fpfault)		/* 54: FPCP signalling NAN */
124#endif
125
126	VECTOR(fpunsupp)	/* 55: FPCP unimplemented data type */
127	VECTOR(badtrap)		/* 56: unassigned, reserved */
128	VECTOR(badtrap)		/* 57: unassigned, reserved */
129	VECTOR(badtrap)		/* 58: unassigned, reserved */
130	VECTOR(badtrap)		/* 59: unassigned, reserved */
131	VECTOR(badtrap)		/* 60: unassigned, reserved */
132	VECTOR(badtrap)		/* 61: unassigned, reserved */
133	VECTOR(badtrap)		/* 62: unassigned, reserved */
134	VECTOR(badtrap)		/* 63: unassigned, reserved */
135
136	BADTRAP16		/* 64-255: user interrupt vectors */
137	BADTRAP16		/* 64-255: user interrupt vectors */
138	BADTRAP16		/* 64-255: user interrupt vectors */
139	BADTRAP16		/* 64-255: user interrupt vectors */
140	BADTRAP16		/* 64-255: user interrupt vectors */
141	BADTRAP16		/* 64-255: user interrupt vectors */
142	BADTRAP16		/* 64-255: user interrupt vectors */
143	BADTRAP16		/* 64-255: user interrupt vectors */
144	BADTRAP16		/* 64-255: user interrupt vectors */
145	BADTRAP16		/* 64-255: user interrupt vectors */
146	BADTRAP16		/* 64-255: user interrupt vectors */
147	BADTRAP16		/* 64-255: user interrupt vectors */
148