xref: /netbsd/sys/arch/hp300/include/cpu.h (revision bf9ec67e)
1 /*	$NetBSD: cpu.h,v 1.38 2001/05/30 12:28:42 mrg Exp $	*/
2 
3 /*
4  * Copyright (c) 1988 University of Utah.
5  * Copyright (c) 1982, 1990, 1993
6  *	The Regents of the University of California.  All rights reserved.
7  *
8  * This code is derived from software contributed to Berkeley by
9  * the Systems Programming Group of the University of Utah Computer
10  * Science Department.
11  *
12  * Redistribution and use in source and binary forms, with or without
13  * modification, are permitted provided that the following conditions
14  * are met:
15  * 1. Redistributions of source code must retain the above copyright
16  *    notice, this list of conditions and the following disclaimer.
17  * 2. Redistributions in binary form must reproduce the above copyright
18  *    notice, this list of conditions and the following disclaimer in the
19  *    documentation and/or other materials provided with the distribution.
20  * 3. All advertising materials mentioning features or use of this software
21  *    must display the following acknowledgement:
22  *	This product includes software developed by the University of
23  *	California, Berkeley and its contributors.
24  * 4. Neither the name of the University nor the names of its contributors
25  *    may be used to endorse or promote products derived from this software
26  *    without specific prior written permission.
27  *
28  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38  * SUCH DAMAGE.
39  *
40  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
41  *
42  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
43  */
44 
45 #ifndef _HP300_CPU_H_
46 #define	_HP300_CPU_H_
47 
48 #if defined(_KERNEL_OPT)
49 #include "opt_lockdebug.h"
50 #endif
51 
52 /*
53  * Exported definitions unique to hp300/68k cpu support.
54  */
55 
56 /*
57  * Get common m68k CPU definitions.
58  */
59 #include <m68k/cpu.h>
60 
61 /*
62  * Get interrupt glue.
63  */
64 #include <machine/intr.h>
65 
66 #include <sys/sched.h>
67 struct cpu_info {
68 	struct schedstate_percpu ci_schedstate; /* scheduler state */
69 #if defined(DIAGNOSTIC) || defined(LOCKDEBUG)
70 	u_long ci_spin_locks;		/* # of spin locks held */
71 	u_long ci_simple_locks;		/* # of simple locks held */
72 #endif
73 };
74 
75 #ifdef _KERNEL
76 extern struct cpu_info cpu_info_store;
77 
78 #define	curcpu()	(&cpu_info_store)
79 
80 /*
81  * definitions of cpu-dependent requirements
82  * referenced in generic code
83  */
84 #define	cpu_swapin(p)			/* nothing */
85 #define	cpu_wait(p)			/* nothing */
86 #define	cpu_swapout(p)			/* nothing */
87 #define	cpu_number()			0
88 
89 /*
90  * Arguments to hardclock and gatherstats encapsulate the previous
91  * machine state in an opaque clockframe.  One the hp300, we use
92  * what the hardware pushes on an interrupt (frame format 0).
93  */
94 struct clockframe {
95 	u_short	sr;		/* sr at time of interrupt */
96 	u_long	pc;		/* pc at time of interrupt */
97 	u_short	vo;		/* vector offset (4-word frame) */
98 };
99 
100 #define	CLKF_USERMODE(framep)	(((framep)->sr & PSL_S) == 0)
101 #define	CLKF_BASEPRI(framep)	(((framep)->sr & PSL_IPL) == 0)
102 #define	CLKF_PC(framep)		((framep)->pc)
103 #if 0
104 /* We would like to do it this way... */
105 #define	CLKF_INTR(framep)	(((framep)->sr & PSL_M) == 0)
106 #else
107 /* but until we start using PSL_M, we have to do this instead */
108 #define	CLKF_INTR(framep)	(0)	/* XXX */
109 #endif
110 
111 
112 /*
113  * Preempt the current process if in interrupt from user mode,
114  * or after the current trap/syscall if in system mode.
115  */
116 extern int want_resched;	/* resched() was called */
117 #define	need_resched(ci)	{ want_resched++; aston(); }
118 
119 /*
120  * Give a profiling tick to the current process when the user profiling
121  * buffer pages are invalid.  On the hp300, request an ast to send us
122  * through trap, marking the proc as needing a profiling tick.
123  */
124 #define	need_proftick(p)	{ (p)->p_flag |= P_OWEUPC; aston(); }
125 
126 /*
127  * Notify the current process (p) that it has a signal pending,
128  * process as soon as possible.
129  */
130 #define	signotify(p)	aston()
131 
132 extern int astpending;		/* need to trap before returning to user mode */
133 #define aston() (astpending++)
134 
135 #endif /* _KERNEL */
136 
137 /*
138  * CTL_MACHDEP definitions.
139  */
140 #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
141 #define	CPU_MAXID		2	/* number of valid machdep ids */
142 
143 #define CTL_MACHDEP_NAMES { \
144 	{ 0, 0 }, \
145 	{ "console_device", CTLTYPE_STRUCT }, \
146 }
147 
148 /*
149  * The rest of this should probably be moved to <machine/hp300spu.h>,
150  * although some of it could probably be put into generic 68k headers.
151  */
152 
153 #ifdef _KERNEL
154 extern	char *intiobase, *intiolimit;
155 extern	void (*vectab[]) __P((void));
156 
157 struct frame;
158 struct fpframe;
159 struct pcb;
160 
161 /* locore.s functions */
162 void	m68881_save __P((struct fpframe *));
163 void	m68881_restore __P((struct fpframe *));
164 void	DCIA __P((void));
165 void	DCIS __P((void));
166 void	DCIU __P((void));
167 void	ICIA __P((void));
168 void	ICPA __P((void));
169 void	PCIA __P((void));
170 void	TBIA __P((void));
171 void	TBIS __P((vaddr_t));
172 void	TBIAS __P((void));
173 void	TBIAU __P((void));
174 #if defined(M68040)
175 void	DCFA __P((void));
176 void	DCFP __P((paddr_t));
177 void	DCFL __P((paddr_t));
178 void	DCPL __P((paddr_t));
179 void	DCPP __P((paddr_t));
180 void	ICPL __P((paddr_t));
181 void	ICPP __P((paddr_t));
182 #endif
183 int	suline __P((caddr_t, caddr_t));
184 void	savectx __P((struct pcb *));
185 void	switch_exit __P((struct proc *));
186 void	proc_trampoline __P((void));
187 void	loadustp __P((int));
188 
189 void	doboot __P((void))
190 	__attribute__((__noreturn__));
191 void	ecacheon __P((void));
192 void	ecacheoff __P((void));
193 
194 /* clock.c functions */
195 void	hp300_calibrate_delay __P((void));
196 
197 /* machdep.c functions */
198 int	badaddr __P((caddr_t));
199 int	badbaddr __P((caddr_t));
200 
201 /* sys_machdep.c functions */
202 int	cachectl1 __P((unsigned long, vaddr_t, size_t, struct proc *));
203 
204 /* vm_machdep.c functions */
205 void	physaccess __P((caddr_t, caddr_t, int, int));
206 void	physunaccess __P((caddr_t, int));
207 int	kvtop __P((caddr_t));
208 
209 /* what is this supposed to do? i.e. how is it different than startrtclock? */
210 #define	enablertclock()
211 
212 #endif
213 
214 /* physical memory sections */
215 #define	ROMBASE		(0x00000000)
216 #define	INTIOBASE	(0x00400000)
217 #define	INTIOTOP	(0x00600000)
218 #define	EXTIOBASE	(0x00600000)
219 #define	EXTIOTOP	(0x20000000)
220 #define	MAXADDR		(0xFFFFF000)
221 
222 /*
223  * Internal IO space:
224  *
225  * Ranges from 0x400000 to 0x600000 (IIOMAPSIZE).
226  *
227  * Internal IO space is mapped in the kernel from ``intiobase'' to
228  * ``intiolimit'' (defined in locore.s).  Since it is always mapped,
229  * conversion between physical and kernel virtual addresses is easy.
230  */
231 #define	ISIIOVA(va) \
232 	((char *)(va) >= intiobase && (char *)(va) < intiolimit)
233 #define	IIOV(pa)	((int)(pa)-INTIOBASE+(int)intiobase)
234 #define	IIOP(va)	((int)(va)-(int)intiobase+INTIOBASE)
235 #define	IIOPOFF(pa)	((int)(pa)-INTIOBASE)
236 #define	IIOMAPSIZE	btoc(INTIOTOP-INTIOBASE)	/* 2mb */
237 
238 /*
239  * External IO space:
240  *
241  * DIO ranges from select codes 0-63 at physical addresses given by:
242  *	0x600000 + (sc - 32) * 0x10000
243  * DIO cards are addressed in the range 0-31 [0x600000-0x800000) for
244  * their control space and the remaining areas, [0x200000-0x400000) and
245  * [0x800000-0x1000000), are for additional space required by a card;
246  * e.g. a display framebuffer.
247  *
248  * DIO-II ranges from select codes 132-255 at physical addresses given by:
249  *	0x1000000 + (sc - 132) * 0x400000
250  * The address range of DIO-II space is thus [0x1000000-0x20000000).
251  *
252  * DIO/DIO-II space is too large to map in its entirety, instead devices
253  * are mapped into kernel virtual address space allocated from a range
254  * of EIOMAPSIZE pages (vmparam.h) starting at ``extiobase''.
255  */
256 #define	DIOBASE		(0x600000)
257 #define	DIOTOP		(0x1000000)
258 #define	DIOCSIZE	(0x10000)
259 #define	DIOIIBASE	(0x01000000)
260 #define	DIOIITOP	(0x20000000)
261 #define	DIOIICSIZE	(0x00400000)
262 
263 /*
264  * HP MMU
265  */
266 #define	MMUBASE		IIOPOFF(0x5F4000)
267 #define	MMUSSTP		0x0
268 #define	MMUUSTP		0x4
269 #define	MMUTBINVAL	0x8
270 #define	MMUSTAT		0xC
271 #define	MMUCMD		MMUSTAT
272 
273 #define	MMU_UMEN	0x0001	/* enable user mapping */
274 #define	MMU_SMEN	0x0002	/* enable supervisor mapping */
275 #define	MMU_CEN		0x0004	/* enable data cache */
276 #define	MMU_BERR	0x0008	/* bus error */
277 #define	MMU_IEN		0x0020	/* enable instruction cache */
278 #define	MMU_FPE		0x0040	/* enable 68881 FP coprocessor */
279 #define	MMU_WPF		0x2000	/* write protect fault */
280 #define	MMU_PF		0x4000	/* page fault */
281 #define	MMU_PTF		0x8000	/* page table fault */
282 
283 #define	MMU_FAULT	(MMU_PTF|MMU_PF|MMU_WPF|MMU_BERR)
284 #define	MMU_ENAB	(MMU_UMEN|MMU_SMEN|MMU_IEN|MMU_FPE)
285 
286 #endif /* _HP300_CPU_H_ */
287