1 /* -*-C++-*- $NetBSD: mips_tx39.h,v 1.1 2001/02/09 18:35:07 uch Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <hpcboot.h> 40 #include <mips/mips_arch.h> 41 42 class TX39XX : public MIPSArchitecture { 43 private: 44 45 public: 46 TX39XX(Console *&, MemoryManager *&, enum ArchitectureOps); 47 ~TX39XX(void); 48 49 virtual BOOL init(void); 50 virtual void systemInfo(void); 51 virtual void cacheFlush(void); 52 static void boot_func(struct BootArgs *, struct PageTag *); 53 }; 54 55 #define MIPS_TX39XX_CACHE_FLUSH() \ 56 __asm( \ 57 ".set noreorder;" \ 58 "li t1, 16384;" \ 59 "li t2, 8192;" \ 60 \ 61 /* Disable I-cache */ \ 62 "li t5, ~0x00000020;" \ 63 "mfc0 t6, $3;" \ 64 "and t5, t5, t6;" \ 65 "nop;" \ 66 "mtc0 t5, $3;" \ 67 \ 68 /* Stop streaming */ \ 69 "beq zero, zero, 1f;" \ 70 "nop;" \ 71 "1:" \ 72 /* Flush I-cache */ \ 73 "li t0, 0x80000000;" \ 74 "addu t1, t0, t1;" \ 75 "subu t1, t1, 128;" \ 76 "2:" \ 77 "cache 0x0, 0($0);" \ 78 "cache 0x0, 16(t0);" \ 79 "cache 0x0, 32(t0);" \ 80 "cache 0x0, 48(t0);" \ 81 "cache 0x0, 64(t0);" \ 82 "cache 0x0, 80(t0);" \ 83 "cache 0x0, 96(t0);" \ 84 "cache 0x0, 112(t0);" \ 85 "bne t0, t1, 2b;" \ 86 "addu t0, t0, 128;" \ 87 \ 88 /* Flush D-cache */ \ 89 "li t0, 0x80000000;" \ 90 "addu t1, t0, t2;" \ 91 \ 92 "3:" \ 93 "lw t2, 0(t0);" \ 94 "bne t1, t0, 3b;" \ 95 "addiu t0, t0, 4;" \ 96 \ 97 /* Enable I-cache */ \ 98 "nop;" \ 99 "mtc0 t6, $3;" \ 100 "nop;" \ 101 ".set reorder;" \ 102 ) 103