xref: /netbsd/sys/arch/hpc/stand/hpcboot/sh3/cpu/7750.h (revision bf9ec67e)
1 /*	$NetBSD: 7750.h,v 1.1 2002/02/11 17:08:57 uch Exp $	*/
2 
3 /*-
4  * Copyright (c) 2002 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by UCHIYAMA Yasushi.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *        This product includes software developed by the NetBSD
21  *        Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 #ifndef _HPCBOOT_SH_CPU_7750_H_
40 #define _HPCBOOT_SH_CPU_7750_H_
41 
42 #define SH7750_CACHE_FLUSH()						\
43 __BEGIN_MACRO								\
44 	u_int32_t __e, __a;						\
45 									\
46 	/* D-cache */							\
47 	for (__e = 0; __e < (SH4_DCACHE_SIZE / SH4_CACHE_LINESZ); __e++) {\
48 		__a = SH4REG_CCDA | (__e << CCDA_ENTRY_SHIFT);		\
49 		VOLATILE_REF(__a) &= ~(CCDA_U | CCDA_V);		\
50 	}								\
51 	/* I-cache  */							\
52 	for (__e = 0; __e < (SH4_ICACHE_SIZE / SH4_CACHE_LINESZ); __e++) {\
53 		__a = SH4REG_CCIA | (__e << CCIA_ENTRY_SHIFT);		\
54 		VOLATILE_REF(__a) &= ~(CCIA_V);				\
55 	}								\
56 __END_MACRO
57 
58 #define SH7750_MMU_DISABLE	SH4_MMU_DISABLE
59 
60 #endif // _HPCBOOT_SH_CPU_7750_H_
61