xref: /netbsd/sys/arch/hpcarm/dev/ipaq_atmelgpio.c (revision 6550d01e)
1 /*	$NetBSD: ipaq_atmelgpio.c,v 1.15 2009/05/29 14:15:44 rjs Exp $	*/
2 
3 /*-
4  * Copyright (c) 2001 The NetBSD Foundation, Inc.  All rights reserved.
5  *
6  * This code is derived from software contributed to The NetBSD Foundation
7  * by Ichiro FUKUHARA (ichiro@ichiro.org).
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
19  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
22  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28  * POSSIBILITY OF SUCH DAMAGE.
29  */
30 /*
31  * iPAQ uses Atmel microcontroller to service a few of peripheral devices.
32  * This controller connect to UART1 of SA11x0.
33  */
34 
35 #include <sys/cdefs.h>
36 __KERNEL_RCSID(0, "$NetBSD: ipaq_atmelgpio.c,v 1.15 2009/05/29 14:15:44 rjs Exp $");
37 
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/types.h>
41 #include <sys/conf.h>
42 #include <sys/file.h>
43 #include <sys/device.h>
44 #include <sys/kernel.h>
45 #include <sys/kthread.h>
46 #include <sys/malloc.h>
47 
48 #include <machine/bus.h>
49 
50 #include <hpcarm/dev/ipaq_saipvar.h>
51 #include <hpcarm/dev/ipaq_gpioreg.h>
52 #include <hpcarm/dev/ipaq_atmel.h>
53 #include <hpcarm/dev/ipaq_atmelvar.h>
54 
55 #include <arm/sa11x0/sa11x0_gpioreg.h>
56 #include <arm/sa11x0/sa11x0_comreg.h>
57 #include <arm/sa11x0/sa11x0_reg.h>
58 
59 #ifdef ATMEL_DEBUG
60 #define DPRINTF(x) aprint_normal x
61 #else
62 #define DPRINTF(x)
63 #endif
64 
65 static	int	atmelgpio_match(device_t, cfdata_t, void *);
66 static	void	atmelgpio_attach(device_t, device_t, void *);
67 static	int	atmelgpio_print(void *, const char *);
68 static	int	atmelgpio_search(device_t, cfdata_t, const int *, void *);
69 static	void	atmelgpio_init(struct atmelgpio_softc *);
70 
71 static	void	rxtx_data(struct atmelgpio_softc *, int, int,
72 			 uint8_t *, struct atmel_rx *);
73 
74 CFATTACH_DECL_NEW(atmelgpio, sizeof(struct atmelgpio_softc),
75     atmelgpio_match, atmelgpio_attach, NULL, NULL);
76 
77 static int
78 atmelgpio_match(device_t parent, cfdata_t cf, void *aux)
79 {
80 	return (1);
81 }
82 
83 static void
84 atmelgpio_attach(device_t parent, device_t self, void *aux)
85 {
86 	struct atmelgpio_softc *sc = device_private(self);
87 	struct ipaq_softc *psc = device_private(parent);
88 
89 	struct atmel_rx rxbuf;
90 
91 	aprint_normal("\n");
92 	aprint_normal_dev(self, "Atmel microcontroller GPIO\n");
93 
94 	sc->sc_iot = psc->sc_iot;
95 	sc->sc_ioh = psc->sc_ioh;
96 	sc->sc_parent = psc;
97 
98 	if (bus_space_map(sc->sc_iot, SACOM1_BASE, SACOM_NPORTS, 0,
99                         &sc->sc_ioh)) {
100                 aprint_normal_dev(self, "unable to map of UART1 registers\n");
101                 return;
102         }
103 
104 	atmelgpio_init(sc);
105 
106 	rxbuf.idx = 0;
107 	rxbuf.len = 0;
108 
109 #if 1  /* this is sample */
110 	rxtx_data(sc, STATUS_BATTERY, 0, NULL, &rxbuf);
111 
112 	aprint_normal("ac_status          = %x\n", rxbuf.data[0]);
113 	aprint_normal("Battery kind       = %x\n", rxbuf.data[1]);
114 	aprint_normal("Voltage            = %d mV\n",
115 		1000 * (rxbuf.data[3] << 8 | rxbuf.data[2]) /228);
116 	aprint_normal("Battery Status     = %x\n", rxbuf.data[4]);
117 	aprint_normal("Battery percentage = %d\n",
118 		425 * (rxbuf.data[3] << 8 | rxbuf.data[2]) /1000 - 298);
119 #endif
120 
121 	rxtx_data(sc, READ_IIC, 0, NULL, &rxbuf);
122 
123 	/*
124 	 *  Attach each devices
125 	 */
126 
127 	config_search_ia(atmelgpio_search, self, "atmelgpioif", NULL);
128 }
129 
130 static int
131 atmelgpio_search(device_t parent, cfdata_t cf, const int *ldesc,
132 		 void *aux)
133 {
134 	if (config_match(parent, cf, NULL) > 0)
135 		config_attach(parent, cf, NULL, atmelgpio_print);
136 	return 0;
137 }
138 
139 
140 static int
141 atmelgpio_print(void *aux, const char *name)
142 {
143 	return (UNCONF);
144 }
145 
146 static void
147 atmelgpio_init(struct atmelgpio_softc *sc)
148 {
149 	/* 8 bits no parity 1 stop bit */
150 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR0, CR0_DSS);
151 
152 	/* Set baud rate 115k */
153 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR1, 0);
154 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR2, SACOMSPEED(115200));
155 
156 	/* RX/TX enable, RX/TX FIFO interrupt enable */
157 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR3,
158 			 (CR3_RXE | CR3_TXE | CR3_RIE | CR3_TIE));
159 }
160 
161 static void
162 rxtx_data(struct atmelgpio_softc  *sc, int id, int size, uint8_t *buf,
163 	  struct atmel_rx *rxbuf)
164 {
165 	int 		i, checksum, length, rx_data;
166 	uint8_t		data[MAX_SENDSIZE];
167 
168 	length = size + FRAME_OVERHEAD_SIZE;
169 
170 	while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR0) & SR0_TFS))
171 		;
172 
173 		data[0] = (uint8_t)FRAME_SOF;
174 		data[1] = (uint8_t)((id << 4) | size);
175 		checksum = data[1];
176 		i = 2;
177 		while (size--)	{
178 			data[i++] = *buf;
179 			checksum += (uint8_t)(*buf++);
180 		}
181 		data[length-1] = checksum;
182 
183 	while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR1) & SR1_TNF))
184 		;
185 		i = 0;
186 		while (i < length)
187 			bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_DR, data[i++]);
188 
189 	delay(10000);
190 #if 0
191 	while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR0) &
192 		 (SR0_RID | SR0_RFS)))
193 #endif
194 	rxbuf->state = STATE_SOF;
195 	while (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR1) & SR1_RNE) {
196 
197 		rx_data = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_DR);
198 			DPRINTF(("DATA = %x\n", rx_data));
199 
200 		switch (rxbuf->state) {
201 		case STATE_SOF:
202 			if (rx_data == FRAME_SOF)
203 				rxbuf->state = STATE_ID;
204 			break;
205 		case STATE_ID:
206 			rxbuf->id = (rx_data & 0xf0) >> 4;
207 			rxbuf->len = rx_data & 0x0f;
208 			rxbuf->idx = 0;
209 			rxbuf->checksum = rx_data;
210 			rxbuf->state = (rxbuf->len > 0 ) ? STATE_DATA : STATE_EOF;
211 			break;
212 		case STATE_DATA:
213 			rxbuf->checksum += rx_data;
214 			rxbuf->data[rxbuf->idx] = rx_data;
215 			if (++rxbuf->idx == rxbuf->len)
216 				rxbuf->state = STATE_EOF;
217 			break;
218 		case STATE_EOF:
219 			rxbuf->state = STATE_SOF;
220 			if (rx_data == FRAME_EOF || rx_data == rxbuf->checksum)
221 				DPRINTF(("frame EOF\n"));
222 			else
223 				DPRINTF(("BadFrame\n"));
224 			break;
225 		default:
226 			break;
227 		}
228 	}
229 }
230