1 /* $NetBSD: ipaq_atmelgpio.c,v 1.5 2002/10/02 05:18:51 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Ichiro FUKUHARA (ichiro@ichiro.org). 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the NetBSD 20 * Foundation, Inc. and its contributors. 21 * 4. Neither the name of The NetBSD Foundation nor the names of its 22 * contributors may be used to endorse or promote products derived 23 * from this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 26 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 /* 38 * iPAQ uses Atmel microcontroller to service a few of peripheral devices. 39 * This controller connect to UART1 of SA11x0. 40 */ 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/types.h> 45 #include <sys/conf.h> 46 #include <sys/file.h> 47 #include <sys/device.h> 48 #include <sys/kernel.h> 49 #include <sys/kthread.h> 50 #include <sys/malloc.h> 51 52 #include <machine/bus.h> 53 54 #include <hpcarm/dev/ipaq_saipvar.h> 55 #include <hpcarm/dev/ipaq_gpioreg.h> 56 #include <hpcarm/dev/ipaq_atmel.h> 57 #include <hpcarm/dev/ipaq_atmelvar.h> 58 #include <hpcarm/sa11x0/sa11x0_gpioreg.h> 59 #include <hpcarm/sa11x0/sa11x0_comreg.h> 60 #include <hpcarm/sa11x0/sa11x0_reg.h> 61 62 #ifdef ATMEL_DEBUG 63 #define DPRINTF(x) printf x 64 #else 65 #define DPRINTF(x) 66 #endif 67 68 static int atmelgpio_match(struct device *, struct cfdata *, void *); 69 static void atmelgpio_attach(struct device *, struct device *, void *); 70 static int atmelgpio_print(void *, const char *); 71 static int atmelgpio_search(struct device *, struct cfdata *, void *); 72 static void atmelgpio_init(struct atmelgpio_softc *); 73 74 static void rxtx_data(struct atmelgpio_softc *, int, int, 75 u_int8_t *, struct atmel_rx *); 76 77 CFATTACH_DECL(atmelgpio, sizeof(struct atmelgpio_softc), 78 atmelgpio_match, atmelgpio_attach, NULL, NULL); 79 80 static int 81 atmelgpio_match(parent, cf, aux) 82 struct device *parent; 83 struct cfdata *cf; 84 void *aux; 85 { 86 return (1); 87 } 88 89 static void 90 atmelgpio_attach(parent, self, aux) 91 struct device *parent; 92 struct device *self; 93 void *aux; 94 { 95 struct atmelgpio_softc *sc = (struct atmelgpio_softc *)self; 96 struct ipaq_softc *psc = (struct ipaq_softc *)parent; 97 98 struct atmel_rx *rxbuf; 99 100 printf("\n"); 101 printf("%s: Atmel microcontroller GPIO\n", sc->sc_dev.dv_xname); 102 103 sc->sc_iot = psc->sc_iot; 104 sc->sc_ioh = psc->sc_ioh; 105 sc->sc_parent = (struct ipaq_softc *)parent; 106 107 if (bus_space_map(sc->sc_iot, SACOM1_BASE, SACOM_NPORTS, 0, 108 &sc->sc_ioh)) { 109 printf("%s: unable to map of UART1 registers\n", sc->sc_dev.dv_xname); 110 return; 111 } 112 113 atmelgpio_init(sc); 114 115 #if 1 /* this is sample */ 116 rxtx_data(sc, STATUS_BATTERY, 0, NULL, rxbuf); 117 118 printf("ac_status = %x\n", rxbuf->data[0]); 119 printf("Battery kind = %x\n", rxbuf->data[1]); 120 printf("Voltage = %d mV\n", 121 1000 * (rxbuf->data[3] << 8 | rxbuf->data[2]) /228); 122 printf("Battery Status = %x\n", rxbuf->data[4]); 123 printf("Battery percentage = %d\n", 124 425 * (rxbuf->data[3] << 8 | rxbuf->data[2]) /1000 - 298); 125 #endif 126 127 /* 128 * Attach each devices 129 */ 130 131 config_search(atmelgpio_search, self, NULL); 132 } 133 134 static int 135 atmelgpio_search(parent, cf, aux) 136 struct device *parent; 137 struct cfdata *cf; 138 void *aux; 139 { 140 if (config_match(parent, cf, NULL) > 0) 141 config_attach(parent, cf, NULL, atmelgpio_print); 142 return 0; 143 } 144 145 146 static int 147 atmelgpio_print(aux, name) 148 void *aux; 149 const char *name; 150 { 151 return (UNCONF); 152 } 153 154 static void 155 atmelgpio_init(sc) 156 struct atmelgpio_softc *sc; 157 { 158 /* 8 bits no parity 1 stop bit */ 159 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR0, CR0_DSS); 160 161 /* Set baud rate 115k */ 162 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR1, 0); 163 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR2, SACOMSPEED(115200)); 164 165 /* RX/TX enable, RX/TX FIFO interrupt enable */ 166 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR3, 167 (CR3_RXE | CR3_TXE | CR3_RIE | CR3_TIE)); 168 } 169 170 static void 171 rxtx_data(sc, id, size, buf, rxbuf) 172 struct atmelgpio_softc *sc; 173 int id, size; 174 u_int8_t *buf; 175 struct atmel_rx *rxbuf; 176 { 177 int i, checksum, length, rx_data; 178 u_int8_t data[MAX_SENDSIZE]; 179 180 length = size + FRAME_OVERHEAD_SIZE; 181 182 while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR0) & SR0_TFS)) 183 ; 184 185 data[0] = (u_int8_t)FRAME_SOF; 186 data[1] = (u_int8_t)((id << 4) | size); 187 checksum = data[1]; 188 i = 2; 189 while (size--) { 190 data[i++] = *buf; 191 checksum += (u_int8_t)(*buf++); 192 } 193 data[length-1] = checksum; 194 195 while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR1) & SR1_TNF)) 196 ; 197 i = 0; 198 while (i < length) 199 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_DR, data[i++]); 200 201 delay(10000); 202 #if 0 203 while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR0) & 204 (SR0_RID | SR0_RFS))) 205 #endif 206 rxbuf->state = STATE_SOF; 207 while (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR1) & SR1_RNE) { 208 209 rx_data = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_DR); 210 DPRINTF(("DATA = %x\n", rx_data)); 211 212 switch (rxbuf->state) { 213 case STATE_SOF: 214 if (rx_data == FRAME_SOF) 215 rxbuf->state = STATE_ID; 216 break; 217 case STATE_ID: 218 rxbuf->id = (rx_data & 0xf0) >> 4; 219 rxbuf->len = rx_data & 0x0f; 220 rxbuf->idx = 0; 221 rxbuf->checksum = rx_data; 222 rxbuf->state = (rxbuf->len > 0 ) ? STATE_DATA : STATE_EOF; 223 break; 224 case STATE_DATA: 225 rxbuf->checksum += rx_data; 226 rxbuf->data[rxbuf->idx] = rx_data; 227 if (++rxbuf->idx == rxbuf->len) 228 rxbuf->state = STATE_EOF; 229 break; 230 case STATE_EOF: 231 rxbuf->state = STATE_SOF; 232 if (rx_data == FRAME_EOF || rx_data == rxbuf->checksum) 233 DPRINTF(("frame EOF\n")); 234 else 235 DPRINTF(("BadFrame\n")); 236 break; 237 default: 238 break; 239 } 240 } 241 } 242