1 /* $NetBSD: ipaq_pcic.c,v 1.6 2001/08/01 13:18:44 ichiro Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Ichiro FUKUHARA (ichiro@ichiro.org). 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/types.h> 42 #include <sys/conf.h> 43 #include <sys/file.h> 44 #include <sys/device.h> 45 #include <sys/kernel.h> 46 #include <sys/kthread.h> 47 #include <sys/malloc.h> 48 49 #include <machine/bus.h> 50 #include <dev/pcmcia/pcmciachip.h> 51 #include <dev/pcmcia/pcmciavar.h> 52 53 #include <hpcarm/dev/ipaq_saipvar.h> 54 #include <hpcarm/dev/ipaq_pcicreg.h> 55 #include <hpcarm/dev/ipaq_gpioreg.h> 56 #include <hpcarm/sa11x0/sa11x0_gpioreg.h> 57 #include <hpcarm/sa11x0/sa11x0_var.h> 58 #include <hpcarm/sa11x0/sa11xx_pcicvar.h> 59 60 #include "ipaqpcic.h" 61 62 static int ipaqpcic_match(struct device *, struct cfdata *, void *); 63 static void ipaqpcic_attach(struct device *, struct device *, void *); 64 static int ipaqpcic_print(void *, const char *); 65 static int ipaqpcic_submatch(struct device *, struct cfdata *, void *); 66 67 static int ipaqpcic_read(struct sapcic_socket *, int); 68 static void ipaqpcic_write(struct sapcic_socket *, int, int); 69 static void ipaqpcic_set_power(struct sapcic_socket *, int); 70 static void ipaqpcic_clear_intr(int); 71 static void *ipaqpcic_intr_establish(struct sapcic_socket *, int, 72 int (*)(void *), void *); 73 static void ipaqpcic_intr_disestablish(struct sapcic_socket *, void *); 74 75 struct ipaqpcic_softc { 76 struct sapcic_softc sc_pc; 77 bus_space_handle_t sc_ioh; 78 struct ipaq_softc *sc_parent; 79 struct sapcic_socket sc_socket[2]; 80 }; 81 82 static void ipaqpcic_init(struct ipaqpcic_softc *); 83 84 static struct sapcic_tag ipaqpcic_functions = { 85 ipaqpcic_read, 86 ipaqpcic_write, 87 ipaqpcic_set_power, 88 ipaqpcic_clear_intr, 89 ipaqpcic_intr_establish, 90 ipaqpcic_intr_disestablish 91 }; 92 93 struct cfattach ipaqpcic_ca = { 94 sizeof(struct ipaqpcic_softc), ipaqpcic_match, ipaqpcic_attach 95 }; 96 97 static int 98 ipaqpcic_match(parent, cf, aux) 99 struct device *parent; 100 struct cfdata *cf; 101 void *aux; 102 { 103 return (1); 104 } 105 106 static void 107 ipaqpcic_attach(parent, self, aux) 108 struct device *parent; 109 struct device *self; 110 void *aux; 111 { 112 int i; 113 struct pcmciabus_attach_args paa; 114 struct ipaqpcic_softc *sc = (struct ipaqpcic_softc *)self; 115 struct ipaq_softc *psc = (struct ipaq_softc *)parent; 116 117 printf("\n"); 118 119 sc->sc_pc.sc_iot = psc->sc_iot; 120 sc->sc_ioh = psc->sc_ioh; 121 sc->sc_parent = (struct ipaq_softc *)parent; 122 123 ipaqpcic_init(sc); 124 125 for(i = 0; i < 2; i++) { 126 sc->sc_socket[i].sc = (struct sapcic_softc *)sc; 127 sc->sc_socket[i].socket = i; 128 sc->sc_socket[i].pcictag_cookie = psc; 129 sc->sc_socket[i].pcictag = &ipaqpcic_functions; 130 sc->sc_socket[i].event_thread = NULL; 131 sc->sc_socket[i].event = 0; 132 sc->sc_socket[i].laststatus = SAPCIC_CARD_INVALID; 133 sc->sc_socket[i].shutdown = 0; 134 135 paa.paa_busname = "pcmcia"; 136 paa.pct = (pcmcia_chipset_tag_t)&sa11x0_pcmcia_functions; 137 paa.pch = (pcmcia_chipset_handle_t)&sc->sc_socket[i]; 138 paa.iobase = 0; 139 paa.iosize = 0x4000000; 140 141 sc->sc_socket[i].pcmcia = 142 (struct device *)config_found_sm(&sc->sc_pc.sc_dev, 143 &paa, ipaqpcic_print, ipaqpcic_submatch); 144 145 sa11x0_intr_establish((sa11x0_chipset_tag_t)psc, 146 i ? IRQ_CD1 : IRQ_CD0, 147 1, IPL_BIO, sapcic_intr, 148 &sc->sc_socket[i]); 149 150 /* schedule kthread creation */ 151 kthread_create(sapcic_kthread_create, &sc->sc_socket[i]); 152 153 #if 0 /* XXX */ 154 /* establish_intr should be after creating the kthread */ 155 config_interrupt(&sc->sc_socket[i], ipaqpcic_config_intr); 156 #endif 157 } 158 } 159 160 static int 161 ipaqpcic_print(aux, name) 162 void *aux; 163 const char *name; 164 { 165 return (UNCONF); 166 } 167 168 static int 169 ipaqpcic_submatch(parent, cf, aux) 170 struct device *parent; 171 struct cfdata *cf; 172 void *aux; 173 { 174 return (*cf->cf_attach->ca_match)(parent, cf, aux); 175 } 176 177 static void 178 ipaqpcic_init(sc) 179 struct ipaqpcic_softc *sc; 180 { 181 int cr; 182 183 /* All those are inputs */ 184 cr = bus_space_read_4(sc->sc_pc.sc_iot, sc->sc_parent->sc_gpioh, SAGPIO_PDR); 185 cr &= ~(GPIO_H3600_PCMCIA_CD0 | GPIO_H3600_PCMCIA_CD1 | GPIO_H3600_PCMCIA_IRQ0 | 186 GPIO_H3600_PCMCIA_IRQ1); 187 bus_space_write_4(sc->sc_pc.sc_iot, sc->sc_parent->sc_gpioh, SAGPIO_PDR, cr); 188 189 sc->sc_parent->ipaq_egpio |= 190 EGPIO_H3600_OPT_NVRAM_ON | EGPIO_H3600_OPT_ON ; 191 sc->sc_parent->ipaq_egpio &= 192 ~(EGPIO_H3600_CARD_RESET | EGPIO_H3600_OPT_RESET); 193 bus_space_write_2(sc->sc_pc.sc_iot, sc->sc_parent->sc_egpioh, 194 0, sc->sc_parent->ipaq_egpio); 195 } 196 197 static int 198 ipaqpcic_read(so, reg) 199 struct sapcic_socket *so; 200 int reg; 201 { 202 int cr, bit; 203 struct ipaqpcic_softc *sc = (struct ipaqpcic_softc *)so->sc; 204 205 cr = bus_space_read_4(sc->sc_pc.sc_iot, sc->sc_parent->sc_gpioh, SAGPIO_PLR); 206 207 switch (reg) { 208 case SAPCIC_STATUS_CARD: 209 bit = (so->socket ? GPIO_H3600_PCMCIA_CD0 : 210 GPIO_H3600_PCMCIA_CD1) & cr; 211 if (!bit) 212 return SAPCIC_CARD_INVALID; 213 else 214 return SAPCIC_CARD_VALID; 215 case SAPCIC_STATUS_VS1: 216 case SAPCIC_STATUS_VS2: 217 case SAPCIC_STATUS_READY: 218 bit = (so->socket ? GPIO_H3600_PCMCIA_IRQ0: 219 GPIO_H3600_PCMCIA_IRQ1); 220 return (bit & cr); 221 default: 222 panic("ipaqpcic_read: bogus register\n"); 223 } 224 } 225 226 static void 227 ipaqpcic_write(so, reg, arg) 228 struct sapcic_socket *so; 229 int reg; 230 int arg; 231 { 232 int s; 233 struct ipaqpcic_softc *sc = (struct ipaqpcic_softc *)so->sc; 234 235 s = splhigh(); 236 switch (reg) { 237 case SAPCIC_CONTROL_RESET: 238 sc->sc_parent->ipaq_egpio |= EGPIO_H3600_CARD_RESET; 239 break; 240 case SAPCIC_CONTROL_LINEENABLE: 241 case SAPCIC_CONTROL_WAITENABLE: 242 case SAPCIC_CONTROL_POWERSELECT: 243 break; 244 245 default: 246 splx(s); 247 panic("ipaqpcic_write: bogus register"); 248 } 249 bus_space_write_2(sc->sc_pc.sc_iot, sc->sc_parent->sc_egpioh, 0, 250 sc->sc_parent->ipaq_egpio); 251 splx(s); 252 } 253 254 static void 255 ipaqpcic_set_power(so, arg) 256 struct sapcic_socket *so; 257 int arg; 258 { 259 int s; 260 struct ipaqpcic_softc *sc = (struct ipaqpcic_softc *)so->sc; 261 262 s = splbio(); 263 switch (arg) { 264 case SAPCIC_POWER_OFF: 265 sc->sc_parent->ipaq_egpio &= 266 ~(EGPIO_H3600_OPT_NVRAM_ON | EGPIO_H3600_OPT_ON); 267 break; 268 case SAPCIC_POWER_3V: 269 case SAPCIC_POWER_5V: 270 sc->sc_parent->ipaq_egpio |= 271 EGPIO_H3600_OPT_NVRAM_ON | EGPIO_H3600_OPT_ON; 272 break; 273 default: 274 panic("ipaqpcic_set_power: bogus arg\n"); 275 } 276 bus_space_write_2(sc->sc_pc.sc_iot, sc->sc_parent->sc_egpioh, 277 0, sc->sc_parent->ipaq_egpio); 278 splx(s); 279 } 280 281 static void 282 ipaqpcic_clear_intr(arg) 283 { 284 } 285 286 static void * 287 ipaqpcic_intr_establish(so, level, ih_fun, ih_arg) 288 struct sapcic_socket *so; 289 int level; 290 int (*ih_fun)(void *); 291 void *ih_arg; 292 { 293 int irq; 294 295 irq = so->socket ? IRQ_IRQ0 : IRQ_IRQ1; 296 return (sa11x0_intr_establish((sa11x0_chipset_tag_t)so->pcictag_cookie, 297 irq-16, 1, level, ih_fun, ih_arg)); 298 } 299 300 static void 301 ipaqpcic_intr_disestablish(so, ih) 302 struct sapcic_socket *so; 303 void *ih; 304 { 305 sa11x0_intr_disestablish((sa11x0_chipset_tag_t)so->pcictag_cookie, ih); 306 } 307