1 /* $NetBSD: uda1341.h,v 1.2 2001/07/15 20:19:32 ichiro Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Ichiro FUKUHARA (ichiro@ichiro.org). 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the NetBSD 20 * Foundation, Inc. and its contributors. 21 * 4. Neither the name of The NetBSD Foundation nor the names of its 22 * contributors may be used to endorse or promote products derived 23 * from this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 26 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /* 39 * Philips UDA1341 L3 type 40 */ 41 42 /* 43 * Microcontroller L3-interface timing (MIN) 44 * expressed in micro-second 45 */ 46 #define L3_DATA_SETUP 1 /* 190 nsec */ 47 #define L3_DATA_HOLD 1 /* 30 nsec */ 48 #define L3_MODE_SETUP 1 /* 190 nsec */ 49 #define L3_MODE_HOLD 1 /* 190 nsec */ 50 #define L3_CLK_HIGH 1 /* 250 nsec */ 51 #define L3_CLK_LOW 1 /* 250 nsec */ 52 #define L3_HALT 1 /* 190 nsec */ 53 54 /* 55 * Philips UDA1341 L3 address and command types 56 */ 57 #define L3_ADDRESS_COM 5 58 #define L3_ADDRESS_DATA0 0 59 #define L3_ADDRESS_DATA1 1 60 #define L3_ADDRESS_STATUS 2 61 62 /* 63 * Philips UDA1341 Status control 64 */ 65 #define STATUS0_RST (1<<0) /* UDA1341 Reset */ 66 #define STATUS0_SC_512 (0<<4) /* System clock freq. 67 512fs */ 68 #define STATUS0_SC_384 (1<<4) /* 384fs */ 69 #define STATUS0_SC_256 (2<<4) /* 256fs */ 70 #define STATUS0_IF_I2S (0<<1) /* Data Input format 71 I2C */ 72 #define STATUS0_IF_LSB16 (1<<1) /* LSB 16 bits */ 73 #define STATUS0_IF_LSB18 (2<<1) /* LSB 18 bits */ 74 #define STATUS0_IF_LSB20 (3<<1) /* LSB 20 bits */ 75 #define STATUS0_IF_MSB (4<<1) /* MSB */ 76 #define STATUS0_IF_MSB16 (5<<1) /* LSB 16 bits and MSB-output */ 77 #define STATUS0_IF_MSB18 (6<<1) /* LSB 18 bits and MSB-output */ 78 #define STATUS0_IF_MSB20 (7<<1) /* LSB 20 bits and MSB-output */ 79 #define STATUS0_DC (1<<0) /* UDA1341 DC-filter ON */ 80 81 #define STATUS1_OGS (1<<6) /* UDA1341 DAC Gain switch */ 82 #define STATUS1_IGS (1<<5) /* UDA1341 ADC Gain switch */ 83 #define STATUS1_PAD (1<<4) /* Polarity of ADC is inverting */ 84 #define STATUS1_PDA (1<<3) /* Polarity of DAC is inverting */ 85 #define STATUS1_DS (1<<2) /* double speed playback */ 86 #define STATUS1_PC_OFF (0<<0) /* ADC:off DAC:off */ 87 #define STATUS1_PC_DAC (1<<0) /* ADC:off DAC:on */ 88 #define STATUS1_PC_ADC (2<<0) /* ADC:on DAC:off */ 89 #define STATUS1_PC_ON (3<<0) /* ADC:on DAC:on */ 90 91 /* 92 * Philips UDA1341 DATA0 control 93 */ 94 /* Data0 direct programming registers (8 bits) */ 95 #define DATA0_VC(val) (63 - (((val)+1) * 63) / 100) 96 /* Volume control val=(0<->100) */ 97 #define DATA0_COMMON (0<<6) /* DATA0_0 common bits(6-7) */ 98 99 #define DATA1_BB(val) (((((val)+1) * 15) / 100) << 3) 100 /* Bass Boost control val=(0<->100) */ 101 #define DATA1_TR(val) ((((val)+1) * 3) / 100) 102 /* Treble control val=(0<->100) */ 103 #define DATA1_COMMON (1<<6) /* DATA0_1 common bits(6-7) */ 104 105 #define DATA2_MODE_FLAT (0<<0) /* Mode filter is flat */ 106 #define DATA2_MODE_MIN (2<<0) /* Mode filter is minimum */ 107 #define DATA2_MODE_MAX (3<<0) /* Mode filter is maximum */ 108 #define DATA2_MUTE (1<<2) /* Mute on */ 109 #define DATA2_PP (1<<5) /* Peak Detection */ 110 #define DATA2_COMMON (2<<6) /* DATA0_2 common bits(6-7) */ 111 112 /* Data0 extended programming registers (16 bits) */ 113 #define EXT_ADDR_COMMON (3<<6) /* Extended Address Common bits */ 114 # define EXT_ADDR_E0 0 /* Extended Address of E0 */ 115 # define EXT_ADDR_E1 1 /* Extended Address of E1 */ 116 # define EXT_ADDR_E2 2 /* Extended Address of E2 */ 117 # define EXT_ADDR_E3 4 /* Extended Address of E3 */ 118 # define EXT_ADDR_E4 5 /* Extended Address of E4 */ 119 # define EXT_ADDR_E5 6 /* Extended Address of E5 */ 120 121 #define EXT_DATA_COMMN (7<<5) /* Extended Data Common bits */ 122 #define DATA_E0_MA(val) ((((val) + 1) * 31) / 100) 123 /* mixer gain control val=(0<->100) */ 124 #define DATA_E1_MB(val) ((((val) + 1) * 31) / 100) 125 /* mixer gain control val=(0<->100) */ 126 #define DATA_E2_MS(val) (((((val) + 1) * 6) / 100) << 3) 127 /* MIC sensitivity control val=(0<->100) */ 128 #define DATA_E2_MM0 0 /* Double differential mode */ 129 #define DATA_E2_MM1 1 /* input channel 1 select */ 130 #define DATA_E2_MM2 2 /* input channel 2 select */ 131 #define DATA_E2_MM3 3 /* digital mixer mode */ 132 133 #define DATA_E3_AG (1<<4) /* AGC control ON */ 134 #define DATA_E3_IG_L(val) (((val * 127) / 100) & 3) 135 /* Input AMP-Gain control (low 2 bits) */ 136 #define DATA_E4_IG_H(val) (((val * 127) / 100) >> 2) 137 /* Input AMP-Gain control (high 5 bits) */ 138 #define DATA_E5_AL(val) (((val + 1) * 3) / 100) 139 /* AGC output level val=(0<->100) */ 140 /* end of uda1341.h */ 141