1/* $NetBSD: locore.S,v 1.5 2002/01/25 19:19:30 thorpej Exp $ */ 2 3/* 4 * Copyright (C) 1994-1997 Mark Brinicombe 5 * Copyright (C) 1994 Brini 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Brini. 19 * 4. The name of Brini may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL BRINI BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 27 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 28 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 29 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 30 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 31 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34#include "opt_ipkdb.h" 35#include "assym.h" 36#include <sys/syscall.h> 37#include <sys/errno.h> 38#include <machine/asm.h> 39#include <machine/cpu.h> 40#include <machine/frame.h> 41#include <machine/param.h> 42 43/* What size should this really be ? It is only used by init_arm() */ 44#define INIT_ARM_STACK_SIZE 2048 45 46/* 47 * This is for kvm_mkdb, and should be the address of the beginning 48 * of the kernel text segment (not necessarily the same as kernbase). 49 */ 50 51ENTRY_NP(kernel_text) 52 53ASENTRY_NP(start) 54 /* Put the processer in SVC mode */ 55 mov r5, sp 56 mrs r4, cpsr_all 57 bic r4, r4, #31 58 orr r4, r4, #(PSR_SVC32_MODE) 59 msr cpsr_all, r4 60 mov sp, r5 61 62 /* Disable PID virtual address mapping */ 63 mov r4, #0 64 mcr 15, 0, r4, c13, c0, 0 65 66 mov fp, #0x00000000 /* trace back starts here */ 67 bl _C_LABEL(initarm) /* Off we go */ 68 69 /* init arm will return the new stack pointer. */ 70 mov sp, r0 71 72 mov fp, #0x00000000 /* trace back starts here */ 73 mov ip, sp 74 stmfd sp!, {fp, ip, lr, pc} 75 sub fp, ip, #4 76 77 /* Setup an initial trap frame for start_init to use */ 78 79 PUSHFRAME 80 81 mov r0, sp /* parameter to main is trap frame */ 82 83 bl _C_LABEL(main) /* Lets light the flame and start her up */ 84 85 PULLFRAME /* Pull the trap frame, now valid */ 86 87 movs pc, lr /* Exit to user process */ 88 89 /* Never gets here */ 90 91 b . 92 93 .text 94 .align 0 95 96Lcpufuncs: 97 .word _C_LABEL(cpufuncs) 98 99ENTRY_NP(cpu_reset) 100 mrs r2, cpsr 101 bic r2, r2, #(PSR_MODE) 102 orr r2, r2, #(PSR_SVC32_MODE) 103 orr r2, r2, #(I32_bit | F32_bit) 104 msr cpsr, r2 105 106 ldr r4, Lcpu_reset_address 107 ldr r4, [r4] 108 109 ldr r0, Lcpufuncs 110 add lr, pc, #Lboot_cache_purged - . - 8 111 ldr pc, [r0, #CF_IDCACHE_WBINV_ALL] 112 113Lboot_cache_purged: 114 115 /* 116 * MMU & IDC off, 32 bit program & data space 117 * Hurl ourselves into the ROM 118 */ 119 mov r0, #(CPU_CONTROL_32BP_ENABLE | CPU_CONTROL_32BD_ENABLE) 120 mcr 15, 0, r0, c1, c0, 0 121 mcr 15, 0, r0, c8, c7, 0 122 mov pc, r4 123 124 /* 125 * _cpu_reset_address contains the address to branch to, to complete 126 * the cpu reset after turning the MMU off 127 * This variable is provided by the hardware specific code 128 */ 129 130Lcpu_reset_address: 131 .word _C_LABEL(cpu_reset_address) 132 133#ifdef IPKDB 134/* 135 * Execute(inst, psr, args, sp) 136 * 137 * Execute INSTruction with PSR and ARGS[0] - ARGS[3] making 138 * available stack at SP for next undefined instruction trap. 139 * 140 * Move the instruction onto the stack and jump to it. 141 */ 142ENTRY_NP(Execute) 143 mov ip, sp 144 stmfd sp!, {r2, r4-r7, fp, ip, lr, pc} 145 sub fp, ip, #4 146 mov ip, r3 147 ldr r7, return 148 stmfd sp!, {r0, r7} 149 add r7, pc, #LExec - . - 8 150 mov r5, r1 151 mrs r4, cpsr 152 ldmia r2, {r0-r3} 153 mov r6, sp 154 mov sp, ip 155 msr cpsr, r5 156 mov pc, r6 157LExec: 158 mrs r5, cpsr 159/* XXX Cannot switch thus easily back from user mode */ 160 msr cpsr, r4 161 add sp, r6, #8 162 ldmfd sp!, {r6} 163 stmia r6, {r0-r3} 164 mov r0, r5 165 ldmdb fp, {r4-r7, fp, sp, pc} 166return: 167 mov pc, r7 168#endif 169 170/* 171 * setjump + longjmp 172 */ 173ENTRY(setjmp) 174 stmia r0, {r4-r14} 175 mov r0, #0x00000000 176 mov pc, lr 177 178ENTRY(longjmp) 179 ldmia r0, {r4-r14} 180 mov r0, #0x00000001 181 mov pc, lr 182 183 .data 184 .global _C_LABEL(esym) 185_C_LABEL(esym): .word _C_LABEL(end) 186 187ENTRY_NP(abort) 188 b _C_LABEL(abort) 189 190 191/* 192 * Atomic bit set and clear functions 193 */ 194 195ENTRY(atomic_set_bit) 196 mrs r2, cpsr 197 orr r3, r2, #(I32_bit) 198 msr cpsr, r3 199 200 ldr r3, [r0] 201 orr r3, r3, r1 202 str r3, [r0] 203 204 msr cpsr, r2 205 mov pc, lr 206 207 208ENTRY(atomic_clear_bit) 209 mrs r2, cpsr 210 orr r3, r2, #(I32_bit) 211 msr cpsr, r3 212 213 ldr r3, [r0] 214 bic r3, r3, r1 215 str r3, [r0] 216 217 msr cpsr, r2 218 mov pc, lr 219 220/* End of locore.S */ 221