1 /* $NetBSD: it8368reg.h,v 1.4 2001/09/15 12:47:05 uch Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * ITE IT8368E PCMCIA/GPIO Buffer Chip 41 * http://www.ite.com/tw/mobile/it8368v07.pdf 42 */ 43 #define IT8368_GPIODATAOUT_REG 0x00 44 #define IT8368_MFIODATAOUT_REG 0x02 45 #define IT8368_GPIODIR_REG 0x04 46 #define IT8368_MFIODIR_REG 0x06 47 #define IT8368_MFIOSEL_REG 0x0a 48 #define IT8368_GPIODATAIN_REG 0x0c 49 #define IT8368_MFIODATAIN_REG 0x0e 50 #define IT8368_GPIOPOSINTEN_REG 0x10 51 #define IT8368_MFIOPOSINTEN_REG 0x12 52 #define IT8368_GPIONEGINTEN_REG 0x14 53 #define IT8368_MFIONEGINTEN_REG 0x16 54 #define IT8368_GPIOPOSINTSTAT_REG 0x18 55 #define IT8368_MFIOPOSINTSTAT_REG 0x1a 56 #define IT8368_GPIONEGINTSTAT_REG 0x1c 57 #define IT8368_MFIONEGINTSTAT_REG 0x1e 58 #define IT8368_CTRL_REG 0x20 59 60 #define IT8368_GPIO_MAX 12 61 #define IT8368_MFIO_MAX 10 62 63 #define IT8368_GPIODATAOUT_MASK 0x1fff 64 #define IT8368_MFIODATAOUT_MASK 0x07ff 65 #define IT8368_GPIODIR_MASK 0x1fff 66 #define IT8368_MFIODIR_MASK 0x07ff 67 68 #define IT8368_MFIOSEL_VGAEN 0x0800 69 #define IT8368_MFIOSEL_MASK 0x07ff 70 #define IT8368_GPIODATAIN_MASK 0x1fff 71 #define IT8368_MFIODATAIN_MASK 0x07ff 72 #define IT8368_GPIOPOSINTEN_MASK 0x1fff 73 #define IT8368_MFIOPOSINTEN_MASK 0x07ff 74 #define IT8368_GPIONEGINTEN_MASK 0x1fff 75 #define IT8368_MFIONEGINTEN_MASK 0x07ff 76 #define IT8368_GPIOPOSINTSTAT_MASK 0x1fff 77 #define IT8368_MFIOPOSINTSTAT_MASK 0x07ff 78 #define IT8368_GPIONEGINTSTAT_MASK 0x1fff 79 #define IT8368_MFIONEGINTSTAT_MASK 0x07ff 80 81 82 #define IT8368_CTRL_FIXATTRIO 0x8000 83 #define IT8368_FIXATTR_OFFSET 0x02000000 84 #define IT8368_FIXIO_OFFSET 0x0 85 #define IT8368_FIXIOATTR_SIZE 0x02000000 86 87 #define IT8368_CTRL_ADDRSEL 0x0010 88 #define IT8368_CTRL_BYTESWAP 0x0008 89 #define IT8368_CTRL_CARDEN 0x0004 90 #define IT8368_CTRL_GLOBALEN 0x0002 91 #define IT8368_CTRL_INTTRIEN 0x0001 92 93 #define IT8368_PIN_CRDSW 0x1000 94 #define IT8368_PIN_CRDDET2 0x0800 95 #define IT8368_PIN_CRDDET1 0x0400 96 #define IT8368_PIN_CRDSENSE2 0x0200 97 #define IT8368_PIN_CRDSENSE1 0x0100 98 #define IT8368_PIN_CRDVCCON1 0x0080 99 #define IT8368_PIN_CRDVCCON0 0x0040 100 #define IT8368_PIN_CRDVPPON1 0x0020 101 #define IT8368_PIN_CRDVPPON0 0x0010 102 #define IT8368_PIN_BCRDWP 0x0008 103 #define IT8368_PIN_BCRDRDY 0x0004 104 #define IT8368_PIN_BCRBVD2 0x0002 105 #define IT8368_PIN_BCRDRST 0x0001 106 107 #define IT8368_PIN_CRDVCCMASK 0x00c0 108 #define IT8368_PIN_CRDVPPMASK 0x0030 109 #define IT8368_PIN_CRDVCC_0V 0x0000 110 #define IT8368_PIN_CRDVCC_3V IT8368_PIN_CRDVCCON0 111 #define IT8368_PIN_CRDVCC_5V IT8368_PIN_CRDVCCON1 112 #define IT8368_PIN_CRDVPP_0V 0x0000 113 #define IT8368_PIN_CRDVPP_CRDVCC IT8368_PIN_CRDVPPON0 114 #define IT8368_PIN_CRDVCC_12V IT8368_PIN_CRDVPPON1 115 #define IT8368_PIN_CRDVCC_HIZ (IT8368_PIN_CRDVPPON0 | \ 116 IT8368_PIN_CRDVPPON1) 117