xref: /netbsd/sys/arch/hpcmips/tx/tx39ioreg.h (revision bf9ec67e)
1 /*	$NetBSD: tx39ioreg.h,v 1.3 2000/10/22 10:42:32 uch Exp $ */
2 
3 /*-
4  * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by UCHIYAMA Yasushi.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *        This product includes software developed by the NetBSD
21  *        Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 /*
39  * TOSHIBA TX3912/TX3922 IO module
40  */
41 
42 #ifndef __TX39IO_PRIVATE
43 #error "don't include this file"
44 #else /* !__TX39IO_PRIVATE */
45 #define	TX39_IOCTRL_REG			0x180
46 #define	TX39_IOMFIODATAOUT_REG		0x184
47 #define	TX39_IOMFIODATADIR_REG		0x188
48 #define	TX39_IOMFIODATAIN_REG		0x18c
49 #define	TX39_IOMFIODATASEL_REG		0x190
50 #define	TX39_IOIOPOWERDWN_REG		0x194
51 #define	TX39_IOMFIOPOWERDWN_REG		0x198
52 #ifdef TX392X
53 #define TX392X_IODATAINOUT_REG		0x19c
54 #endif /* TX392X */
55 
56 #define TX39_IO_MFIO_MAX		32
57 #ifdef TX391X
58 #define TX391X_IO_IO_MAX		7
59 #endif /* TX391X */
60 #ifdef TX392X
61 #define TX392X_IO_IO_MAX		16
62 #endif /* TX392X */
63 
64 /*
65  *	IO Control Register
66  */
67 #ifdef TX391X
68 #define TX391X_IOCTRL_IODEBSEL_SHIFT	24
69 #define TX391X_IOCTRL_IODEBSEL_MASK	0x7f
70 #define TX391X_IOCTRL_IODEBSEL(cr)					\
71 	(((cr) >> TX391X_IOCTRL_IODEBSEL_SHIFT) &			\
72 	TX391X_IOCTRL_IODEBSEL_MASK)
73 #define TX391X_IOCTRL_IODEBSEL_SET(cr, val)				\
74 	((cr) | (((val) << TX391X_IOCTRL_IODEBSEL_SHIFT) &		\
75 	(TX391X_IOCTRL_IODEBSEL_MASK << TX391X_IOCTRL_IODEBSEL_SHIFT)))
76 
77 #define TX391X_IOCTRL_IODIREC_SHIFT	16
78 #define TX391X_IOCTRL_IODIREC_MASK	0x7f
79 #define TX391X_IOCTRL_IODIREC(cr)					\
80 	(((cr) >> TX391X_IOCTRL_IODIREC_SHIFT) &			\
81 	TX391X_IOCTRL_IODIREC_MASK)
82 #define TX391X_IOCTRL_IODIREC_SET(cr, val)				\
83 	((cr) | (((val) << TX391X_IOCTRL_IODIREC_SHIFT) &		\
84 	(TX391X_IOCTRL_IODIREC_MASK << TX391X_IOCTRL_IODIREC_SHIFT)))
85 
86 #define TX391X_IOCTRL_IODOUT_SHIFT	8
87 #define TX391X_IOCTRL_IODOUT_MASK	0x7f
88 #define TX391X_IOCTRL_IODOUT(cr)					\
89 	(((cr) >> TX391X_IOCTRL_IODOUT_SHIFT) &				\
90 	TX391X_IOCTRL_IODOUT_MASK)
91 #define TX391X_IOCTRL_IODOUT_CLR(cr)					\
92 	((cr) &= ~(TX391X_IOCTRL_IODOUT_MASK << TX391X_IOCTRL_IODOUT_SHIFT))
93 #define TX391X_IOCTRL_IODOUT_SET(cr, val)				\
94 	((cr) | (((val) << TX391X_IOCTRL_IODOUT_SHIFT) &		\
95 	(TX391X_IOCTRL_IODOUT_MASK << TX391X_IOCTRL_IODOUT_SHIFT)))
96 
97 #define TX391X_IOCTRL_IODIN_SHIFT	0
98 #define TX391X_IOCTRL_IODIN_MASK	0x7f
99 #define TX391X_IOCTRL_IODIN(cr)						\
100 	(((cr) >> TX391X_IOCTRL_IODIN_SHIFT) &				\
101 	TX391X_IOCTRL_IODIN_MASK)
102 #endif /* TX391X */
103 
104 #ifdef TX392X
105 #define TX392X_IOCTRL_IODEBSEL_SHIFT	16
106 #define TX392X_IOCTRL_IODEBSEL_MASK	0xffff
107 #define TX392X_IOCTRL_IODEBSEL(cr)					\
108 	(((cr) >> TX392X_IOCTRL_IODEBSEL_SHIFT) &			\
109 	TX392X_IOCTRL_IODEBSEL_MASK)
110 #define TX392X_IOCTRL_IODEBSEL_SET(cr, val)				\
111 	((cr) | (((val) << TX392X_IOCTRL_IODEBSEL_SHIFT) &		\
112 	(TX392X_IOCTRL_IODEBSEL_MASK << TX392X_IOCTRL_IODEBSEL_SHIFT)))
113 
114 #define TX392X_IOCTRL_IODIREC_SHIFT	0
115 #define TX392X_IOCTRL_IODIREC_MASK	0xffff
116 #define TX392X_IOCTRL_IODIREC(cr)					\
117 	(((cr) >> TX392X_IOCTRL_IODIREC_SHIFT) &			\
118 	TX392X_IOCTRL_IODIREC_MASK)
119 #define TX392X_IOCTRL_IODIREC_SET(cr, val)				\
120 	((cr) | (((val) << TX392X_IOCTRL_IODIREC_SHIFT) &		\
121 	(TX392X_IOCTRL_IODIREC_MASK << TX392X_IOCTRL_IODIREC_SHIFT)))
122 
123 #define TX392X_IODATAINOUT_DOUT_SHIFT	16
124 #define TX392X_IODATAINOUT_DOUT_MASK	0xffff
125 #define TX392X_IODATAINOUT_DOUT(cr)					\
126 	(((cr) >> TX392X_IODATAINOUT_DOUT_SHIFT) &			\
127 	TX392X_IODATAINOUT_DOUT_MASK)
128 #define TX392X_IODATAINOUT_DOUT_SET(cr, val)				\
129 	((cr) | (((val) << TX392X_IODATAINOUT_DOUT_SHIFT) &		\
130 	(TX392X_IODATAINOUT_DOUT_MASK << TX392X_IODATAINOUT_DOUT_SHIFT)))
131 #define TX392X_IODATAINOUT_DOUT_CLR(cr)				\
132 	((cr) &= ~(TX392X_IODATAINOUT_DOUT_MASK <<			\
133 		   TX392X_IODATAINOUT_DOUT_SHIFT))
134 
135 #define TX392X_IODATAINOUT_DIN_SHIFT	0
136 #define TX392X_IODATAINOUT_DIN_MASK	0xffff
137 #define TX392X_IODATAINOUT_DIN(cr)					\
138 	(((cr) >> TX392X_IODATAINOUT_DIN_SHIFT) &			\
139 	TX392X_IODATAINOUT_DIN_MASK)
140 #define TX392X_IODATAINOUT_DIN_SET(cr, val)				\
141 	((cr) | (((val) << TX392X_IODATAINOUT_DIN_SHIFT) &		\
142 	(TX392X_IODATAINOUT_DIN_MASK << TX392X_IODATAINOUT_DIN_SHIFT)))
143 #endif /* TX392X */
144 /*
145  *	MFIO Data Output Register
146  */
147 #define TX39_IOMFIODATAOUT_MFIODOUT	0
148 
149 /*
150  *	MFIO Data Direction Register
151  */
152 #define TX39_IOMFIODATADIR_MFIODIREC	0
153 
154 /*
155  *	MFIO Data Input Register
156  */
157 #define TX39_IOMFIODATAIN_MFIODIN	0
158 
159 /*
160  *	MFIO Data Select Register
161  */
162 #define TX39_IOMFIODATASEL_MFIOSEL		0
163 #define TX39_IOMFIODATASEL_MFIOSEL_RESET	0xf20f0fff
164 
165 /*
166  *	IO Power Down Register
167  */
168 #ifdef TX391X
169 #define TX391X_IOIOPOWERDWN_IOPD_SHIFT	0
170 #define TX391X_IOIOPOWERDWN_IOPD_MASK	0x7f
171 #define TX391X_IOIOPOWERDWN_IOPD_RESET	0x7f
172 #define TX391X_IOIOPOWERDWN_IOPD(cr)					\
173 	(((cr) >> TX391X_IOIOPOWERDWN_IOPD_SHIFT) &			\
174 	TX391X_IOIOPOWERDWN_IOPD_MASK)
175 #define TX391X_IOIOPOWERDWN_IOPD_SET(cr, val)				\
176 	((cr) | (((val) << TX391X_IOIOPOWERDWN_IOPD_SHIFT) &		\
177 	(TX391X_IOIOPOWERDWN_IOPD_MASK << TX391X_IOIOPOWERDOWN_IOPD_SHIFT)))
178 #endif /* TX391X */
179 #ifdef TX392X
180 #define TX392X_IOIOPOWERDWN_IOPD_SHIFT	0
181 #define TX392X_IOIOPOWERDWN_IOPD_MASK	0xffff
182 #define TX392X_IOIOPOWERDWN_IOPD_RESET	0x0fff
183 #define TX392X_IOIOPOWERDWN_IOPD(cr)					\
184 	(((cr) >> TX392X_IOIOPOWERDWN_IOPD_SHIFT) &			\
185 	TX392X_IOIOPOWERDWN_IOPD_MASK)
186 #define TX392X_IOIOPOWERDWN_IOPD_SET(cr, val)				\
187 	((cr) | (((val) << TX392X_IOIOPOWERDWN_IOPD_SHIFT) &		\
188 	(TX392X_IOIOPOWERDWN_IOPD_MASK << TX392X_IOIOPOWERDOWN_IOPD_SHIFT)))
189 #endif /* TX392X */
190 
191 
192 /*
193  *	MFIO Power Down Register
194  */
195 #define	TX39_IOMFIOPOWERDWN_MFIOPD		0
196 #define	TX39_IOMFIOPOWERDWN_MFIOPD_RESET	0xfaf03ffc
197 
198 /*
199  *	MFIO mapping
200  */
201 struct tx39io_mfio_map {
202 	char *std_pin_name;
203 	int  std_type;
204 #define STD_IN		1
205 #define STD_OUT		2
206 #define STD_INOUT	3
207 };
208 
209 #ifdef TX391X
210 static const struct tx39io_mfio_map
211 tx391x_mfio_map[TX39_IO_MFIO_MAX] = {
212   [31] = {"CHIFS",	STD_INOUT},
213   [30] = {"CHICLK",	STD_INOUT},
214   [29] = {"CHIDOUT",	STD_OUT},
215   [28] = {"CHIDIN",	STD_IN},
216   [27] = {"DREQ",	STD_IN},
217   [26] = {"DGRINT",	STD_OUT},
218   [25] = {"BC32K",	STD_OUT},
219   [24] = {"TXD",	STD_OUT},
220   [23] = {"RXD",	STD_IN},
221   [22] = {"CS1",	STD_OUT},
222   [21] = {"CS2",	STD_OUT},
223   [20] = {"CS3",	STD_OUT},
224   [19] = {"MCS0",	STD_OUT},
225   [18] = {"MCS1",	STD_OUT},
226   [17] = {"MCS2",	STD_OUT},
227   [16] = {"MCS3",	STD_OUT},
228   [15] = {"SPICLK",	STD_OUT},
229   [14] = {"SPIOUT",	STD_OUT},
230   [13] = {"SPIN",	STD_IN},
231   [12] = {"SIBMCLK",	STD_INOUT},
232   [11] = {"CARDREG",	STD_OUT},
233   [10] = {"CARDIOWR",	STD_OUT},
234    [9] = {"CARDIORD",	STD_OUT},
235    [8] = {"CARD1CSL",	STD_OUT},
236    [7] = {"CARD1CSH",	STD_OUT},
237    [6] = {"CARD2CSL",	STD_OUT},
238    [5] = {"CARD2CSH",	STD_OUT},
239    [4] = {"CARD1WAIT",	STD_IN},
240    [3] = {"CARD2WAIT",	STD_IN},
241    [2] = {"CARDDIR",	STD_OUT},
242    [1] = {"MFIO[1]",	0},
243    [0] = {"MFIO[0]",	0}
244 };
245 #endif /* TX391X */
246 
247 #ifdef TX392X
248 static const struct tx39io_mfio_map
249 tx392x_mfio_map[TX39_IO_MFIO_MAX] = {
250   [31] = {"CHIFS",	STD_INOUT},
251   [30] = {"CHICLK",	STD_INOUT},
252   [29] = {"CHIDOUT",	STD_OUT},
253   [28] = {"CHIDIN",	STD_IN},
254   [27] = {"DREQ",	STD_IN},
255   [26] = {"DGRINT",	STD_OUT},
256   [25] = {"BC32K",	STD_OUT},
257   [24] = {"TXD",	STD_OUT},
258   [23] = {"RXD",	STD_IN},
259   [22] = {"CS1",	STD_OUT},
260   [21] = {"CS2",	STD_OUT},
261   [20] = {"CS3",	STD_OUT},
262   [19] = {"MCS0",	STD_OUT},
263   [18] = {"MCS1",	STD_OUT},
264   [17] = {"RXPWR",	STD_OUT},
265   [16] = {"IROUT",	STD_OUT},
266   [15] = {"SPICLK",	STD_OUT},
267   [14] = {"SPIOUT",	STD_OUT},
268   [13] = {"SPIN",	STD_IN},
269   [12] = {"SIBMCLK",	STD_INOUT},
270   [11] = {"CARDREG",	STD_OUT},
271   [10] = {"CARDIOWR",	STD_OUT},
272    [9] = {"CARDIORD",	STD_OUT},
273    [8] = {"CARD1CSL",	STD_OUT},
274    [7] = {"CARD1CSH",	STD_OUT},
275    [6] = {"CARD2CSL",	STD_OUT},
276    [5] = {"CARD2CSH",	STD_OUT},
277    [4] = {"CARD1WAIT",	STD_IN},
278    [3] = {"CARD2WAIT",	STD_IN},
279    [2] = {"CARDDIR",	STD_OUT},
280    [1] = {"MCS1WAIT",	0},
281    [0] = {"MCS0WAIT",	0}
282 };
283 #endif /* TX392X */
284 
285 #if defined TX391X && defined TX392X
286 #define tx39io_get_mfio_map(c)						\
287 	(IS_TX391X(c) ? tx391x_mfio_map : tx392x_mfio_map)
288 #define tx39io_get_io_max(c)						\
289 	(IS_TX391X(c) ? TX391X_IO_IO_MAX : TX392X_IO_IO_MAX)
290 #elif defined TX391X
291 #define tx39io_get_mfio_map(c)		tx391x_mfio_map
292 #define tx39io_get_io_max(c)		TX391X_IO_IO_MAX
293 #elif defined TX392X
294 #define tx39io_get_mfio_map(c)		tx392x_mfio_map
295 #define tx39io_get_io_max(c)		TX392X_IO_IO_MAX
296 #endif
297 
298 #endif /* !__TX39IO_PRIVATE */
299 
300