1 /* $NetBSD: tx39irreg.h,v 1.2 2001/06/14 11:09:56 uch Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 /* 39 * Toshiba TX3912 IR module 40 */ 41 42 #define TX39_IRCTRL1_REG 0x0a0 /* R/W */ 43 #define TX39_IRCTRL2_REG 0x0a4 /* W */ 44 #define TX39_IRTXHOLD_REG 0x0a8 /* W */ 45 46 /* 47 * IR control 1 register 48 */ 49 #define TX39_IRCTRL1_CARDET 0x01000000 50 51 #define TX39_IRCTRL1_BAUDVAL_SHIFT 16 52 #define TX39_IRCTRL1_BAUDVAL_MASK 0xff 53 #define TX39_IRCTRL1_BAUDVAL(cr) \ 54 (((cr) >> TX39_IRCTRL1_BAUDVAL_SHIFT) & \ 55 TX39_IRCTRL1_BAUDVAL_MASK) 56 #define TX39_IRCTRL1_BAUDVAL_SET(cr, val) \ 57 ((cr) | (((val) << TX39_IRCTRL1_BAUDVAL_SHIFT) & \ 58 (TX39_IRCTRL1_BAUDVAL_MASK << TX39_IRCTRL1_BAUDVAL_SHIFT))) 59 #define TX39_IRCTRL1_BAUDVAL_CLR(cr) \ 60 ((cr) &= ~(TX39_IRCTRL1_BAUDVAL_MASK << TX39_IRCTRL1_BAUDVAL_SHIFT)) 61 62 #define TX39_IRCTRL1_TESTIR 0x00000010 /* don't set */ 63 #define TX39_IRCTRL1_DTINVERT 0x00000008 64 #define TX39_IRCTRL1_RXPWR 0x00000004 65 #define TX39_IRCTRL1_ENSTATE 0x00000002 66 #define TX39_IRCTRL1_ENCOMSM 0x00000001 67 68 /* 69 * IR control 2 register 70 */ 71 /* 72 * period = (PER + 1) * (BAUDVAL + 1) * (1/3.6864MHz) 73 */ 74 #define TX39_IRCTRL2_PER_SHIFT 24 75 #define TX39_IRCTRL2_PER_MASK 0xff 76 #define TX39_IRCTRL2_PER_SET(cr, val) \ 77 ((cr) | (((val) << TX39_IRCTRL2_PER_SHIFT) & \ 78 (TX39_IRCTRL2_PER_MASK << TX39_IRCTRL2_PER_SHIFT))) 79 #define TX39_IRCTRL2_PER_CLR(cr) \ 80 ((cr) &= ~(TX39_IRCTRL2_PER_MASK << TX39_IRCTRL2_PER_SHIFT)) 81 82 /* 83 * on time = ONTIME * (BAUDVAL + 1) * (1/3.6864MHz) 84 */ 85 #define TX39_IRCTRL2_ONTIME_SHIFT 16 86 #define TX39_IRCTRL2_ONTIME_MASK 0xff 87 #define TX39_IRCTRL2_ONTIME_SET(cr, val) \ 88 ((cr) | (((val) << TX39_IRCTRL2_ONTIME_SHIFT) & \ 89 (TX39_IRCTRL2_ONTIME_MASK << TX39_IRCTRL2_ONTIME_SHIFT))) 90 #define TX39_IRCTRL2_ONTIME_CLR(cr) \ 91 ((cr) &= ~(TX39_IRCTRL2_ONTIME_MASK << TX39_IRCTRL2_ONTIME_SHIFT)) 92 93 /* 94 * delay time = (DELAYVAL + 1) * 7.8ms 95 */ 96 #define TX39_IRCTRL2_DELAYVAL_SHIFT 8 97 #define TX39_IRCTRL2_DELAYVAL_MASK 0xff 98 #define TX39_IRCTRL2_DELAYVAL_SET(cr, val) \ 99 ((cr) | (((val) << TX39_IRCTRL2_DELAYVAL_SHIFT) & \ 100 (TX39_IRCTRL2_DELAYVAL_MASK << TX39_IRCTRL2_DELAYVAL_SHIFT))) 101 #define TX39_IRCTRL2_DELAYVAL_CLR(cr) \ 102 ((cr) &= ~(TX39_IRCTRL2_DELAYVAL_MASK << TX39_IRCTRL2_DELAYVAL_SHIFT)) 103 104 /* 105 * wait time = (DELAYVAL + 1) * (WAITVAL + 1) * 7.8ms 106 */ 107 #define TX39_IRCTRL2_WAITVAL_SHIFT 0 108 #define TX39_IRCTRL2_WAITVAL_MASK 0xff 109 #define TX39_IRCTRL2_WAITVAL_SET(cr, val) \ 110 ((cr) | (((val) << TX39_IRCTRL2_WAITVAL_SHIFT) & \ 111 (TX39_IRCTRL2_WAITVAL_MASK << TX39_IRCTRL2_WAITVAL_SHIFT))) 112 #define TX39_IRCTRL2_WAITVAL_CLR(cr) \ 113 ((cr) &= ~(TX39_IRCTRL2_WAITVAL_MASK << TX39_IRCTRL2_WAITVAL_SHIFT)) 114