xref: /netbsd/sys/arch/hpcmips/tx/tx39power.c (revision bf9ec67e)
1 /*	$NetBSD: tx39power.c,v 1.10 2002/01/29 18:53:17 uch Exp $ */
2 
3 /*-
4  * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by UCHIYAMA Yasushi.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *        This product includes software developed by the NetBSD
21  *        Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 #include "opt_tx39power_debug.h"
40 #define TX39POWERDEBUG
41 
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 #include <sys/device.h>
45 
46 #include <machine/bus.h>
47 #include <machine/intr.h>
48 #include <machine/config_hook.h>
49 
50 #include <hpcmips/tx/tx39var.h>
51 #include <hpcmips/tx/tx39icureg.h>
52 #include <hpcmips/tx/tx39powerreg.h>
53 
54 #ifdef	TX39POWER_DEBUG
55 #define DPRINTF_ENABLE
56 #define DPRINTF_DEBUG	tx39power_debug
57 #endif
58 #include <machine/debug.h>
59 
60 #ifdef TX39POWER_DEBUG
61 #define DUMP_REGS(x)		__tx39power_dump(x)
62 #else
63 #define DUMP_REGS(x)		((void)0)
64 #endif
65 
66 #define ISSET(x, v)		((x) & (v))
67 #define ISSETPRINT(r, m)	dbg_bitmask_print(r, TX39_POWERCTRL_##m, #m)
68 
69 int	tx39power_match(struct device *, struct cfdata *, void *);
70 void	tx39power_attach(struct device *, struct device *, void *);
71 
72 struct tx39power_softc {
73 	struct	device sc_dev;
74 	tx_chipset_tag_t sc_tc;
75 
76 	/* save interrupt status for resume */
77 	txreg_t sc_icu_state[TX39_INTRSET_MAX + 1];
78 };
79 
80 struct cfattach tx39power_ca = {
81 	sizeof(struct tx39power_softc), tx39power_match, tx39power_attach
82 };
83 
84 void tx39power_suspend_cpu(void); /* automatic hardware resume */
85 
86 static int tx39power_intr_p(void *);
87 static int tx39power_intr_n(void *);
88 static int tx39power_ok_intr_p(void *);
89 static int tx39power_ok_intr_n(void *);
90 static int tx39power_button_intr_p(void *);
91 static int tx39power_button_intr_n(void *);
92 #ifdef TX39POWER_DEBUG
93 static void __tx39power_dump(struct tx39power_softc *);
94 #endif
95 
96 int
97 tx39power_match(struct device *parent, struct cfdata *cf, void *aux)
98 {
99 	return (ATTACH_FIRST);
100 }
101 
102 void
103 tx39power_attach(struct device *parent, struct device *self, void *aux)
104 {
105 	struct txsim_attach_args *ta = aux;
106 	struct tx39power_softc *sc = (void*)self;
107 	tx_chipset_tag_t tc;
108 	txreg_t reg;
109 
110 	tc = sc->sc_tc = ta->ta_tc;
111 	tx_conf_register_power(tc, self);
112 
113 	printf("\n");
114 	DUMP_REGS(sc);
115 
116 	/* power button setting */
117 	reg = tx_conf_read(tc, TX39_POWERCTRL_REG);
118 	reg |= TX39_POWERCTRL_DBNCONBUTN;
119 	tx_conf_write(tc, TX39_POWERCTRL_REG, reg);
120 
121 	/* enable stop timer */
122 	reg = tx_conf_read(tc, TX39_POWERCTRL_REG);
123 	reg &= ~(TX39_POWERCTRL_STPTIMERVAL_MASK <<
124 	    TX39_POWERCTRL_STPTIMERVAL_SHIFT);
125 	reg = TX39_POWERCTRL_STPTIMERVAL_SET(reg,
126 	    TX39_POWERCTRL_STPTIMERVAL_MAX);
127 	reg |= TX39_POWERCTRL_ENSTPTIMER;
128 	tx_conf_write(tc, TX39_POWERCTRL_REG, reg);
129 
130 	/* install power event handler */
131 	/* low priority */
132 	tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_POSPWRINT),
133 	    IST_EDGE, IPL_CLOCK,
134 	    tx39power_intr_p, sc);
135 	tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_NEGPWRINT),
136 	    IST_EDGE, IPL_CLOCK,
137 	    tx39power_intr_n, sc);
138 	/* high priority */
139 	tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_POSPWROKINT),
140 	    IST_EDGE, IPL_CLOCK,
141 	    tx39power_ok_intr_p, sc);
142 	tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_NEGPWROKINT),
143 	    IST_EDGE, IPL_CLOCK,
144 	    tx39power_ok_intr_n, sc);
145 	/* user driven event */
146 	tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_POSONBUTNINT),
147 	    IST_EDGE, IPL_CLOCK,
148 	    tx39power_button_intr_p, sc);
149 	tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_NEGONBUTNINT),
150 	    IST_EDGE, IPL_CLOCK,
151 	    tx39power_button_intr_n, sc);
152 }
153 
154 void
155 tx39power_suspend_cpu() /* I assume already splhigh */
156 {
157 	tx_chipset_tag_t tc = tx_conf_get_tag();
158 	struct tx39power_softc *sc = tc->tc_powert;
159 	txreg_t reg, *iregs = sc->sc_icu_state;
160 
161 	printf ("%s: CPU sleep\n", sc->sc_dev.dv_xname);
162 	__asm__ __volatile__(".set noreorder");
163 	reg = tx_conf_read(tc, TX39_POWERCTRL_REG);
164 	reg |= TX39_POWERCTRL_STOPCPU;
165 	/* save interrupt state */
166 	iregs[0] = tx_conf_read(tc, TX39_INTRENABLE6_REG);
167 	iregs[1] = tx_conf_read(tc, TX39_INTRENABLE1_REG);
168 	iregs[2] = tx_conf_read(tc, TX39_INTRENABLE2_REG);
169 	iregs[3] = tx_conf_read(tc, TX39_INTRENABLE3_REG);
170 	iregs[4] = tx_conf_read(tc, TX39_INTRENABLE4_REG);
171 	iregs[5] = tx_conf_read(tc, TX39_INTRENABLE5_REG);
172 #ifdef TX392X
173 	iregs[7] = tx_conf_read(tc, TX39_INTRENABLE7_REG);
174 	iregs[8] = tx_conf_read(tc, TX39_INTRENABLE8_REG);
175 #endif
176 	/* disable all interrupt (don't disable GLOBALEN) */
177 	tx_conf_write(tc, TX39_INTRENABLE6_REG, TX39_INTRENABLE6_GLOBALEN);
178 	tx_conf_write(tc, TX39_INTRENABLE1_REG, 0);
179 	tx_conf_write(tc, TX39_INTRENABLE2_REG, 0);
180 	tx_conf_write(tc, TX39_INTRENABLE3_REG, 0);
181 	tx_conf_write(tc, TX39_INTRENABLE4_REG, 0);
182 	tx_conf_write(tc, TX39_INTRENABLE5_REG, 0);
183 #ifdef TX392X
184 	tx_conf_write(tc, TX39_INTRENABLE7_REG, 0);
185 	tx_conf_write(tc, TX39_INTRENABLE8_REG, 0);
186 #endif
187 	/* enable power button interrupt only */
188 	tx_conf_write(tc, TX39_INTRCLEAR5_REG, TX39_INTRSTATUS5_NEGONBUTNINT);
189 	tx_conf_write(tc, TX39_INTRENABLE5_REG, TX39_INTRSTATUS5_NEGONBUTNINT);
190 	__asm__ __volatile__("sync");
191 
192 	/* stop CPU clock */
193 	tx_conf_write(tc, TX39_POWERCTRL_REG, reg);
194 	__asm__ __volatile__("sync");
195 	/* wait until power button pressed */
196 	/* clear interrupt */
197 	tx_conf_write(tc, TX39_INTRCLEAR5_REG, TX39_INTRSTATUS5_NEGONBUTNINT);
198 #ifdef TX392X
199 	/* Clear WARMSTART bit to reset vector(0xbfc00000) work correctly */
200 	reg = tx_conf_read(tc, TX39_POWERCTRL_REG);
201 	reg &= ~TX39_POWERCTRL_WARMSTART;
202 	tx_conf_write(tc, TX39_POWERCTRL_REG, reg);
203 #endif
204 
205 	/* restore interrupt state */
206 	tx_conf_write(tc, TX39_INTRENABLE6_REG, iregs[0]);
207 	tx_conf_write(tc, TX39_INTRENABLE1_REG, iregs[1]);
208 	tx_conf_write(tc, TX39_INTRENABLE2_REG, iregs[2]);
209 	tx_conf_write(tc, TX39_INTRENABLE3_REG, iregs[3]);
210 	tx_conf_write(tc, TX39_INTRENABLE4_REG, iregs[4]);
211 	tx_conf_write(tc, TX39_INTRENABLE5_REG, iregs[5]);
212 #ifdef TX392X
213 	tx_conf_write(tc, TX39_INTRENABLE7_REG, iregs[7]);
214 	tx_conf_write(tc, TX39_INTRENABLE8_REG, iregs[8]);
215 #endif
216 	__asm__ __volatile__(".set reorder");
217 
218 	printf ("%s: CPU wakeup\n", sc->sc_dev.dv_xname);
219 }
220 
221 static int
222 tx39power_button_intr_p(void *arg)
223 {
224 	config_hook_call(CONFIG_HOOK_BUTTONEVENT,
225 	    CONFIG_HOOK_BUTTONEVENT_POWER,
226 	    (void *)1 /* on */);
227 
228 	return (0);
229 }
230 
231 static int
232 tx39power_button_intr_n(void *arg)
233 {
234 	config_hook_call(CONFIG_HOOK_BUTTONEVENT,
235 	    CONFIG_HOOK_BUTTONEVENT_POWER,
236 	    (void *)0 /* off */);
237 	DUMP_REGS(arg);
238 
239 	return (0);
240 }
241 
242 int
243 tx39power_intr_p(void *arg)
244 {
245 	/* low priority event */
246 	printf("power_p\n");
247 	DUMP_REGS(arg);
248 
249 	return (0);
250 }
251 
252 static int
253 tx39power_intr_n(void *arg)
254 {
255 	/* low priority event */
256 	printf("power_n\n");
257 	DUMP_REGS(arg);
258 
259 	return (0);
260 }
261 
262 static int
263 tx39power_ok_intr_p(void *arg)
264 {
265 	/* high priority event */
266 	printf("power NG\n");
267 	DUMP_REGS(arg);
268 	config_hook_call(CONFIG_HOOK_PMEVENT,
269 	    CONFIG_HOOK_PMEVENT_SUSPENDREQ, NULL);
270 
271 	return (0);
272 }
273 
274 static int
275 tx39power_ok_intr_n(void *arg)
276 {
277 	/* high priority event */
278 	printf("power OK\n");
279 	DUMP_REGS(arg);
280 
281 	return (0);
282 }
283 
284 #ifdef TX39POWER_DEBUG
285 static void
286 __tx39power_dump (struct tx39power_softc *sc)
287 {
288 	tx_chipset_tag_t tc = sc->sc_tc;
289 	txreg_t reg;
290 
291 	reg = tx_conf_read(tc, TX39_POWERCTRL_REG);
292 	ISSETPRINT(reg, ONBUTN);
293 	ISSETPRINT(reg, PWRINT);
294 	ISSETPRINT(reg, PWROK);
295 #ifdef TX392X
296 	ISSETPRINT(reg, PWROKNMI);
297 #endif /* TX392X */
298 	ISSETPRINT(reg, SLOWBUS);
299 #ifdef TX391X
300 	ISSETPRINT(reg, DIVMOD);
301 #endif /* TX391X */
302 	ISSETPRINT(reg, ENSTPTIMER);
303 	ISSETPRINT(reg, ENFORCESHUTDWN);
304 	ISSETPRINT(reg, FORCESHUTDWN);
305 	ISSETPRINT(reg, FORCESHUTDWNOCC);
306 	ISSETPRINT(reg, SELC2MS);
307 #ifdef TX392X
308 	ISSETPRINT(reg, WARMSTART);
309 #endif /* TX392X */
310 	ISSETPRINT(reg, BPDBVCC3);
311 	ISSETPRINT(reg, STOPCPU);
312 	ISSETPRINT(reg, DBNCONBUTN);
313 	ISSETPRINT(reg, COLDSTART);
314 	ISSETPRINT(reg, PWRCS);
315 	ISSETPRINT(reg, VCCON);
316 #ifdef TX391X
317 	printf("VIDRF=%d ", TX39_POWERCTRL_VIDRF(reg));
318 #endif /* TX391X */
319 	printf("STPTIMERVAL=%d ", TX39_POWERCTRL_STPTIMERVAL(reg));
320 	printf("\n");
321 }
322 #endif /* TX39POWER_DEBUG */
323