1 /* $NetBSD: txcom.c,v 1.16 2002/03/17 19:40:40 atatat Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include "opt_tx39uart_debug.h" 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/kernel.h> 44 #include <sys/device.h> 45 #include <sys/malloc.h> 46 47 #include <sys/proc.h> /* tsleep/wakeup */ 48 49 #include <sys/ioctl.h> 50 #include <sys/select.h> 51 #include <sys/file.h> 52 53 #include <sys/tty.h> 54 #include <sys/conf.h> 55 #include <dev/cons.h> /* consdev */ 56 57 #include <machine/bus.h> 58 #include <machine/config_hook.h> 59 60 #include <hpcmips/tx/tx39var.h> 61 #include <hpcmips/tx/tx39icureg.h> 62 #include <hpcmips/tx/tx39uartvar.h> 63 #include <hpcmips/tx/tx39uartreg.h> 64 65 #include <hpcmips/tx/tx39irvar.h> 66 67 #include <hpcmips/tx/tx39clockreg.h> /* XXX */ 68 69 #define SET(t, f) (t) |= (f) 70 #define CLR(t, f) (t) &= ~(f) 71 #define ISSET(t, f) ((t) & (f)) 72 /* 73 * UARTA channel has DTR, DSR, RTS, CTS lines. and they wired to MFIO/IO port. 74 */ 75 #define IS_COM0(s) ((s) == 0) 76 #define IS_COM1(s) ((s) == 1) 77 #define ON ((void *)1) 78 #define OFF ((void *)0) 79 80 #ifdef TX39UART_DEBUG 81 #define DPRINTF_ENABLE 82 #define DPRINTF_DEBUG tx39uart_debug 83 #endif 84 #include <machine/debug.h> 85 86 #define TXCOM_HW_CONSOLE 0x40 87 #define TXCOM_RING_SIZE 256 /* must be a power of two! */ 88 #define TXCOM_RING_MASK (TXCOM_RING_SIZE - 1) 89 90 struct txcom_chip { 91 tx_chipset_tag_t sc_tc; 92 int sc_slot; /* UARTA or UARTB */ 93 int sc_cflag; 94 int sc_speed; 95 int sc_swflags; 96 int sc_hwflags; 97 98 int sc_dcd; 99 int sc_msr_cts; 100 int sc_tx_stopped; 101 }; 102 103 struct txcom_softc { 104 struct device sc_dev; 105 struct tty *sc_tty; 106 struct txcom_chip *sc_chip; 107 108 struct callout sc_txsoft_ch; 109 struct callout sc_rxsoft_ch; 110 111 u_int8_t *sc_tba; /* transmit buffer address */ 112 int sc_tbc; /* transmit byte count */ 113 int sc_heldtbc; 114 u_int8_t *sc_rbuf; /* receive buffer address */ 115 int sc_rbput; /* receive byte count */ 116 int sc_rbget; 117 }; 118 119 extern struct cfdriver txcom_cd; 120 121 int txcom_match(struct device *, struct cfdata *, void *); 122 void txcom_attach(struct device *, struct device *, void *); 123 int txcom_print(void*, const char *); 124 125 int txcom_txintr(void *); 126 int txcom_rxintr(void *); 127 int txcom_frameerr_intr(void *); 128 int txcom_parityerr_intr(void *); 129 int txcom_break_intr(void *); 130 131 void txcom_rxsoft(void *); 132 void txcom_txsoft(void *); 133 134 int txcom_stsoft(void *); 135 int txcom_stsoft2(void *); 136 int txcom_stsoft3(void *); 137 int txcom_stsoft4(void *); 138 139 140 void txcom_shutdown(struct txcom_softc *); 141 void txcom_break(struct txcom_softc *, int); 142 void txcom_modem(struct txcom_softc *, int); 143 void txcomstart(struct tty *); 144 int txcomparam(struct tty *, struct termios *); 145 146 void txcom_reset (struct txcom_chip *); 147 int txcom_enable (struct txcom_chip *); 148 void txcom_disable (struct txcom_chip *); 149 void txcom_setmode (struct txcom_chip *); 150 void txcom_setbaudrate(struct txcom_chip *); 151 int txcom_cngetc (dev_t); 152 void txcom_cnputc (dev_t, int); 153 void txcom_cnpollc (dev_t, int); 154 155 int txcom_dcd_hook(void *, int, long, void *); 156 int txcom_cts_hook(void *, int, long, void *); 157 158 159 __inline__ int __txcom_txbufready(struct txcom_chip *, int); 160 const char *__txcom_slotname(int); 161 162 #ifdef TX39UARTDEBUG 163 void txcom_dump(struct txcom_chip *); 164 #endif 165 166 cdev_decl(txcom); 167 168 struct consdev txcomcons = { 169 NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc, 170 NULL, NODEV, CN_NORMAL 171 }; 172 173 /* Serial console */ 174 struct txcom_chip txcom_chip; 175 176 struct cfattach txcom_ca = { 177 sizeof(struct txcom_softc), txcom_match, txcom_attach 178 }; 179 180 int 181 txcom_match(parent, cf, aux) 182 struct device *parent; 183 struct cfdata *cf; 184 void *aux; 185 { 186 /* if the autoconfiguration got this far, there's a slot here */ 187 return 1; 188 } 189 190 void 191 txcom_attach(struct device *parent, struct device *self, void *aux) 192 { 193 struct tx39uart_attach_args *ua = aux; 194 struct txcom_softc *sc = (void*)self; 195 tx_chipset_tag_t tc; 196 struct tty *tp; 197 struct txcom_chip *chip; 198 int slot, console; 199 200 /* Check this slot used as serial console */ 201 console = (ua->ua_slot == txcom_chip.sc_slot) && 202 (txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE); 203 204 if (console) { 205 sc->sc_chip = &txcom_chip; 206 } else { 207 if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip), 208 M_DEVBUF, M_WAITOK))) { 209 printf(": can't allocate chip\n"); 210 return; 211 } 212 memset(sc->sc_chip, 0, sizeof(struct txcom_chip)); 213 } 214 215 chip = sc->sc_chip; 216 tc = chip->sc_tc = ua->ua_tc; 217 slot = chip->sc_slot = ua->ua_slot; 218 219 #ifdef TX39UARTDEBUG 220 txcom_dump(chip); 221 #endif 222 if (!console) 223 txcom_reset(chip); 224 225 if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) { 226 printf(": can't allocate buffer.\n"); 227 return; 228 } 229 memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE); 230 231 tp = ttymalloc(); 232 tp->t_oproc = txcomstart; 233 tp->t_param = txcomparam; 234 tp->t_hwiflow = NULL; 235 sc->sc_tty = tp; 236 tty_attach(tp); 237 238 if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 239 int maj; 240 /* locate the major number */ 241 for (maj = 0; maj < nchrdev; maj++) 242 if (cdevsw[maj].d_open == txcomopen) 243 break; 244 245 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 246 247 printf(": console"); 248 } 249 250 printf("\n"); 251 252 /* 253 * Enable interrupt 254 */ 255 #define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s)) 256 257 tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY, 258 txcom_rxintr, sc); 259 tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY, 260 txcom_txintr, sc); 261 tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY, 262 txcom_rxintr, sc); 263 tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY, 264 txcom_txintr, sc); 265 tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY, 266 txcom_frameerr_intr, sc); 267 tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY, 268 txcom_parityerr_intr, sc); 269 tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY, 270 txcom_break_intr, sc); 271 272 /* 273 * UARTA has external signal line. (its wiring is platform dependent) 274 */ 275 if (IS_COM0(slot)) { 276 /* install DCD, CTS hooks. */ 277 config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_DCD, 278 CONFIG_HOOK_EXCLUSIVE, txcom_dcd_hook, sc); 279 config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_CTS, 280 CONFIG_HOOK_EXCLUSIVE, txcom_cts_hook, sc); 281 } 282 283 /* 284 * UARTB can connect IR module 285 */ 286 if (IS_COM1(slot)) { 287 struct txcom_attach_args tca; 288 tca.tca_tc = tc; 289 tca.tca_parent = self; 290 config_found(self, &tca, txcom_print); 291 } 292 } 293 294 int 295 txcom_print(void *aux, const char *pnp) 296 { 297 return pnp ? QUIET : UNCONF; 298 } 299 300 void 301 txcom_reset(struct txcom_chip *chip) 302 { 303 tx_chipset_tag_t tc; 304 int slot, ofs; 305 txreg_t reg; 306 307 tc = chip->sc_tc; 308 slot = chip->sc_slot; 309 ofs = TX39_UARTCTRL1_REG(slot); 310 311 /* Supply clock */ 312 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 313 reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 314 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 315 316 /* reset UART module */ 317 tx_conf_write(tc, ofs, 0); 318 } 319 320 int 321 txcom_enable(struct txcom_chip *chip) 322 { 323 tx_chipset_tag_t tc; 324 txreg_t reg; 325 int slot, ofs, timeout; 326 327 tc = chip->sc_tc; 328 slot = chip->sc_slot; 329 ofs = TX39_UARTCTRL1_REG(slot); 330 331 /* External power supply (if any) */ 332 config_hook_call(CONFIG_HOOK_POWERCONTROL, 333 CONFIG_HOOK_POWERCONTROL_COM0, PWCTL_ON); 334 delay(3); 335 336 /* Supply clock */ 337 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 338 reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 339 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 340 341 /* 342 * XXX Disable DMA (DMA not coded yet) 343 */ 344 reg = tx_conf_read(tc, ofs); 345 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 346 tx_conf_write(tc, ofs, reg); 347 348 /* enable */ 349 reg = tx_conf_read(tc, ofs); 350 reg |= TX39_UARTCTRL1_ENUART; 351 reg &= ~TX39_UARTCTRL1_ENBREAHALT; 352 tx_conf_write(tc, ofs, reg); 353 354 timeout = 100000; 355 356 while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) && 357 --timeout > 0) 358 ; 359 360 if (timeout == 0 && !cold) { 361 printf("%s never power up\n", __txcom_slotname(slot)); 362 return 1; 363 } 364 365 return 0; 366 } 367 368 void 369 txcom_disable(struct txcom_chip *chip) 370 { 371 tx_chipset_tag_t tc; 372 txreg_t reg; 373 int slot; 374 375 tc = chip->sc_tc; 376 slot = chip->sc_slot; 377 378 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 379 /* DMA */ 380 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 381 382 /* disable module */ 383 reg &= ~TX39_UARTCTRL1_ENUART; 384 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 385 386 /* Clock */ 387 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 388 reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 389 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 390 391 } 392 393 __inline__ int 394 __txcom_txbufready(struct txcom_chip *chip, int retry) 395 { 396 tx_chipset_tag_t tc = chip->sc_tc; 397 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 398 399 do { 400 if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY) 401 return 1; 402 } while(--retry != 0); 403 404 return 0; 405 } 406 407 void 408 txcom_pulse_mode(struct device *dev) 409 { 410 struct txcom_softc *sc = (void*)dev; 411 struct txcom_chip *chip = sc->sc_chip; 412 tx_chipset_tag_t tc = chip->sc_tc; 413 int ofs; 414 txreg_t reg; 415 416 ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 417 418 reg = tx_conf_read(tc, ofs); 419 /* WindowsCE use this setting */ 420 reg |= TX39_UARTCTRL1_PULSEOPT1; 421 reg &= ~TX39_UARTCTRL1_PULSEOPT2; 422 reg |= TX39_UARTCTRL1_DTINVERT; 423 424 tx_conf_write(tc, ofs, reg); 425 } 426 427 /* 428 * console 429 */ 430 int 431 txcom_cngetc(dev_t dev) 432 { 433 tx_chipset_tag_t tc; 434 int ofs, c, s; 435 436 s = spltty(); 437 438 tc = txcom_chip.sc_tc; 439 ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot); 440 441 while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs))) 442 ; 443 444 c = TX39_UARTRXHOLD_RXDATA( 445 tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot))); 446 447 if (c == '\r') 448 c = '\n'; 449 450 splx(s); 451 452 return c; 453 } 454 455 void 456 txcom_cnputc(dev_t dev, int c) 457 { 458 struct txcom_chip *chip = &txcom_chip; 459 tx_chipset_tag_t tc = chip->sc_tc; 460 int s; 461 462 s = spltty(); 463 464 /* Wait for transmitter to empty */ 465 __txcom_txbufready(chip, -1); 466 467 tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 468 (c & TX39_UARTTXHOLD_TXDATA_MASK)); 469 470 __txcom_txbufready(chip, -1); 471 472 splx(s); 473 } 474 475 void 476 txcom_cnpollc(dev_t dev, int on) 477 { 478 } 479 480 void 481 txcom_setmode(struct txcom_chip *chip) 482 { 483 tcflag_t cflag = chip->sc_cflag; 484 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 485 txreg_t reg; 486 487 reg = tx_conf_read(chip->sc_tc, ofs); 488 reg &= ~TX39_UARTCTRL1_ENUART; 489 tx_conf_write(chip->sc_tc, ofs, reg); 490 491 switch (ISSET(cflag, CSIZE)) { 492 default: 493 printf("txcom_setmode: CS7, CS8 only. use CS7"); 494 /* FALL THROUGH */ 495 case CS7: 496 reg |= TX39_UARTCTRL1_BIT7; 497 break; 498 case CS8: 499 reg &= ~TX39_UARTCTRL1_BIT7; 500 break; 501 } 502 503 if (ISSET(cflag, PARENB)) { 504 reg |= TX39_UARTCTRL1_ENPARITY; 505 if (ISSET(cflag, PARODD)) { 506 reg &= ~TX39_UARTCTRL1_EVENPARITY; 507 } else { 508 reg |= TX39_UARTCTRL1_EVENPARITY; 509 } 510 } else { 511 reg &= ~TX39_UARTCTRL1_ENPARITY; 512 } 513 514 if (ISSET(cflag, CSTOPB)) 515 reg |= TX39_UARTCTRL1_TWOSTOP; 516 else 517 reg &= ~TX39_UARTCTRL1_TWOSTOP; 518 519 reg |= TX39_UARTCTRL1_ENUART; 520 tx_conf_write(chip->sc_tc, ofs, reg); 521 } 522 523 void 524 txcom_setbaudrate(struct txcom_chip *chip) 525 { 526 int baudrate; 527 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 528 txreg_t reg, reg1; 529 530 if (chip->sc_speed == 0) 531 return; 532 533 if (!cold) 534 DPRINTF("%d\n", chip->sc_speed); 535 536 reg1 = tx_conf_read(chip->sc_tc, ofs); 537 reg1 &= ~TX39_UARTCTRL1_ENUART; 538 tx_conf_write(chip->sc_tc, ofs, reg1); 539 540 baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1; 541 reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate); 542 543 tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg); 544 545 reg1 |= TX39_UARTCTRL1_ENUART; 546 tx_conf_write(chip->sc_tc, ofs, reg1); 547 } 548 549 int 550 txcom_cnattach(int slot, int speed, int cflag) 551 { 552 cn_tab = &txcomcons; 553 554 txcom_chip.sc_tc = tx_conf_get_tag(); 555 txcom_chip.sc_slot = slot; 556 txcom_chip.sc_cflag = cflag; 557 txcom_chip.sc_speed = speed; 558 txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE; 559 #if notyet 560 txcom_reset(&txcom_chip); 561 #endif 562 txcom_setmode(&txcom_chip); 563 txcom_setbaudrate(&txcom_chip); 564 565 if (txcom_enable(&txcom_chip)) 566 return 1; 567 568 return 0; 569 } 570 571 /* 572 * tty 573 */ 574 void 575 txcom_break(struct txcom_softc *sc, int on) 576 { 577 struct txcom_chip *chip = sc->sc_chip; 578 579 tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 580 on ? TX39_UARTTXHOLD_BREAK : 0); 581 } 582 583 void 584 txcom_modem(struct txcom_softc *sc, int on) 585 { 586 struct txcom_chip *chip = sc->sc_chip; 587 tx_chipset_tag_t tc = chip->sc_tc; 588 int slot = chip->sc_slot; 589 txreg_t reg; 590 591 /* assert DTR */ 592 if (IS_COM0(slot)) { 593 config_hook_call(CONFIG_HOOK_SET, 594 CONFIG_HOOK_COM0_DTR, 595 (void *)on); 596 } 597 598 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 599 reg &= ~TX39_UARTCTRL1_ENUART; 600 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 601 602 if (on) { 603 reg &= ~TX39_UARTCTRL1_DISTXD; 604 } else { 605 reg |= TX39_UARTCTRL1_DISTXD; /* low UARTTXD */ 606 } 607 608 reg |= TX39_UARTCTRL1_ENUART; 609 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 610 } 611 612 void 613 txcom_shutdown(struct txcom_softc *sc) 614 { 615 struct tty *tp = sc->sc_tty; 616 int s = spltty(); 617 618 /* Clear any break condition set with TIOCSBRK. */ 619 txcom_break(sc, 0); 620 621 /* 622 * Hang up if necessary. Wait a bit, so the other side has time to 623 * notice even if we immediately open the port again. 624 */ 625 if (ISSET(tp->t_cflag, HUPCL)) { 626 txcom_modem(sc, 0); 627 (void) tsleep(sc, TTIPRI, ttclos, hz); 628 } 629 630 631 /* Turn off interrupts if not the console. */ 632 if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 633 txcom_disable(sc->sc_chip); 634 } 635 636 splx(s); 637 } 638 639 const char * 640 __txcom_slotname(int slot) 641 { 642 static const char *slotname[] = {"UARTA", "UARTB", "unknown"}; 643 644 if (slot != 0 && slot != 1) 645 return slotname[2]; 646 647 return slotname[slot]; 648 } 649 650 int 651 txcom_frameerr_intr(void *arg) 652 { 653 struct txcom_softc *sc = arg; 654 655 printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot)); 656 657 return 0; 658 } 659 660 int 661 txcom_parityerr_intr(void *arg) 662 { 663 struct txcom_softc *sc = arg; 664 665 printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot)); 666 667 return 0; 668 } 669 670 int 671 txcom_break_intr(void *arg) 672 { 673 struct txcom_softc *sc = arg; 674 675 printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot)); 676 677 return 0; 678 } 679 680 int 681 txcom_rxintr(void *arg) 682 { 683 struct txcom_softc *sc = arg; 684 struct txcom_chip *chip = sc->sc_chip; 685 u_int8_t c; 686 687 c = TX39_UARTRXHOLD_RXDATA( 688 tx_conf_read(chip->sc_tc, 689 TX39_UARTRXHOLD_REG(chip->sc_slot))); 690 691 sc->sc_rbuf[sc->sc_rbput] = c; 692 sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK; 693 694 callout_reset(&sc->sc_rxsoft_ch, 1, txcom_rxsoft, sc); 695 696 return 0; 697 } 698 699 void 700 txcom_rxsoft(void *arg) 701 { 702 struct txcom_softc *sc = arg; 703 struct tty *tp = sc->sc_tty; 704 int (*rint)(int, struct tty *); 705 int code; 706 int s, end, get; 707 708 rint = tp->t_linesw->l_rint; 709 710 s = spltty(); 711 end = sc->sc_rbput; 712 get = sc->sc_rbget; 713 714 while (get != end) { 715 code = sc->sc_rbuf[get]; 716 717 if ((*rint)(code, tp) == -1) { 718 /* 719 * The line discipline's buffer is out of space. 720 */ 721 } 722 get = (get + 1) % TXCOM_RING_MASK; 723 } 724 sc->sc_rbget = get; 725 726 splx(s); 727 } 728 729 int 730 txcom_txintr(void *arg) 731 { 732 struct txcom_softc *sc = arg; 733 struct txcom_chip *chip = sc->sc_chip; 734 tx_chipset_tag_t tc = chip->sc_tc; 735 736 if (sc->sc_tbc > 0) { 737 tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 738 (*sc->sc_tba & 739 TX39_UARTTXHOLD_TXDATA_MASK)); 740 sc->sc_tbc--; 741 sc->sc_tba++; 742 } else { 743 callout_reset(&sc->sc_rxsoft_ch, 1, txcom_txsoft, sc); 744 } 745 746 return 0; 747 } 748 749 void 750 txcom_txsoft(void *arg) 751 { 752 struct txcom_softc *sc = arg; 753 struct tty *tp = sc->sc_tty; 754 int s = spltty(); 755 756 CLR(tp->t_state, TS_BUSY); 757 if (ISSET(tp->t_state, TS_FLUSH)) { 758 CLR(tp->t_state, TS_FLUSH); 759 } else { 760 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 761 } 762 763 (*tp->t_linesw->l_start)(tp); 764 765 splx(s); 766 } 767 768 int 769 txcomopen(dev_t dev, int flag, int mode, struct proc *p) 770 { 771 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 772 struct txcom_chip *chip; 773 struct tty *tp; 774 int s, err; 775 776 if (!sc) 777 return ENXIO; 778 779 chip = sc->sc_chip; 780 tp = sc->sc_tty; 781 782 if (ISSET(tp->t_state, TS_ISOPEN) && 783 ISSET(tp->t_state, TS_XCLUDE) && 784 p->p_ucred->cr_uid != 0) 785 return (EBUSY); 786 787 s = spltty(); 788 789 if (txcom_enable(sc->sc_chip)) { 790 splx(s); 791 goto out; 792 } 793 /* 794 * Do the following iff this is a first open. 795 */ 796 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 797 struct termios t; 798 799 tp->t_dev = dev; 800 801 t.c_ispeed = 0; 802 if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 803 t.c_ospeed = chip->sc_speed; 804 t.c_cflag = chip->sc_cflag; 805 } else { 806 t.c_ospeed = TTYDEF_SPEED; 807 t.c_cflag = TTYDEF_CFLAG; 808 } 809 810 if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL)) 811 SET(t.c_cflag, CLOCAL); 812 if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS)) 813 SET(t.c_cflag, CRTSCTS); 814 if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF)) 815 SET(t.c_cflag, MDMBUF); 816 817 /* Make sure txcomparam() will do something. */ 818 tp->t_ospeed = 0; 819 txcomparam(tp, &t); 820 821 tp->t_iflag = TTYDEF_IFLAG; 822 tp->t_oflag = TTYDEF_OFLAG; 823 tp->t_lflag = TTYDEF_LFLAG; 824 825 ttychars(tp); 826 ttsetwater(tp); 827 828 /* 829 * Turn on DTR. We must always do this, even if carrier is not 830 * present, because otherwise we'd have to use TIOCSDTR 831 * immediately after setting CLOCAL, which applications do not 832 * expect. We always assert DTR while the device is open 833 * unless explicitly requested to deassert it. 834 */ 835 txcom_modem(sc, 1); 836 837 /* Clear the input ring, and unblock. */ 838 sc->sc_rbget = sc->sc_rbput = 0; 839 } 840 841 splx(s); 842 #define TXCOMDIALOUT(x) (minor(x) & 0x80000) 843 if ((err = ttyopen(tp, TXCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)))) { 844 DPRINTF("ttyopen failed\n"); 845 goto out; 846 } 847 if ((err = (*tp->t_linesw->l_open)(dev, tp))) { 848 DPRINTF("line dicipline open failed\n"); 849 goto out; 850 } 851 852 return err; 853 854 out: 855 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 856 /* 857 * We failed to open the device, and nobody else had it opened. 858 * Clean up the state as appropriate. 859 */ 860 txcom_shutdown(sc); 861 } 862 863 return err; 864 865 } 866 867 int 868 txcomclose(dev_t dev, int flag, int mode, struct proc *p) 869 { 870 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 871 struct tty *tp = sc->sc_tty; 872 873 /* XXX This is for cons.c. */ 874 if (!ISSET(tp->t_state, TS_ISOPEN)) 875 return 0; 876 877 (*tp->t_linesw->l_close)(tp, flag); 878 ttyclose(tp); 879 880 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 881 /* 882 * Although we got a last close, the device may still be in 883 * use; e.g. if this was the dialout node, and there are still 884 * processes waiting for carrier on the non-dialout node. 885 */ 886 txcom_shutdown(sc); 887 } 888 889 return 0; 890 } 891 892 int 893 txcomread(dev_t dev, struct uio *uio, int flag) 894 { 895 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 896 struct tty *tp = sc->sc_tty; 897 898 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 899 } 900 901 int 902 txcomwrite(dev_t dev, struct uio *uio, int flag) 903 { 904 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 905 struct tty *tp = sc->sc_tty; 906 907 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 908 } 909 910 int 911 txcompoll(dev_t dev, int events, struct proc *p) 912 { 913 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 914 struct tty *tp = sc->sc_tty; 915 916 return ((*tp->t_linesw->l_poll)(tp, events, p)); 917 } 918 919 struct tty * 920 txcomtty(dev_t dev) 921 { 922 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 923 924 return sc->sc_tty; 925 } 926 927 int 928 txcomioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p) 929 { 930 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 931 struct tty *tp = sc->sc_tty; 932 int s, err; 933 934 err = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 935 if (err != EPASSTHROUGH) { 936 return err; 937 } 938 939 err = ttioctl(tp, cmd, data, flag, p); 940 if (err != EPASSTHROUGH) { 941 return err; 942 } 943 944 err = 0; 945 946 s = spltty(); 947 948 switch (cmd) { 949 default: 950 err = EPASSTHROUGH; 951 break; 952 953 case TIOCSBRK: 954 txcom_break(sc, 1); 955 break; 956 957 case TIOCCBRK: 958 txcom_break(sc, 0); 959 break; 960 961 case TIOCSDTR: 962 txcom_modem(sc, 1); 963 break; 964 965 case TIOCCDTR: 966 txcom_modem(sc, 0); 967 break; 968 969 case TIOCGFLAGS: 970 *(int *)data = sc->sc_chip->sc_swflags; 971 break; 972 973 case TIOCSFLAGS: 974 err = suser(p->p_ucred, &p->p_acflag); 975 if (err) { 976 break; 977 } 978 sc->sc_chip->sc_swflags = *(int *)data; 979 break; 980 981 } 982 983 splx(s); 984 985 return err; 986 } 987 988 void 989 txcomstop(struct tty *tp, int flag) 990 { 991 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 992 int s; 993 994 s = spltty(); 995 996 if (ISSET(tp->t_state, TS_BUSY)) { 997 /* Stop transmitting at the next chunk. */ 998 sc->sc_tbc = 0; 999 sc->sc_heldtbc = 0; 1000 if (!ISSET(tp->t_state, TS_TTSTOP)) 1001 SET(tp->t_state, TS_FLUSH); 1002 } 1003 1004 splx(s); 1005 } 1006 1007 void 1008 txcomstart(struct tty *tp) 1009 { 1010 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 1011 struct txcom_chip *chip = sc->sc_chip; 1012 tx_chipset_tag_t tc = chip->sc_tc; 1013 int slot = chip->sc_slot; 1014 int s; 1015 1016 s = spltty(); 1017 1018 if (!__txcom_txbufready(chip, 0) || 1019 ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1020 goto out; 1021 1022 if (tp->t_outq.c_cc <= tp->t_lowat) { 1023 if (ISSET(tp->t_state, TS_ASLEEP)) { 1024 CLR(tp->t_state, TS_ASLEEP); 1025 wakeup(&tp->t_outq); 1026 } 1027 selwakeup(&tp->t_wsel); 1028 if (tp->t_outq.c_cc == 0) 1029 goto out; 1030 } 1031 1032 sc->sc_tba = tp->t_outq.c_cf; 1033 sc->sc_tbc = ndqb(&tp->t_outq, 0); 1034 SET(tp->t_state, TS_BUSY); 1035 1036 /* Output the first character of the contiguous buffer. */ 1037 tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot), 1038 (*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK)); 1039 1040 sc->sc_tbc--; 1041 sc->sc_tba++; 1042 1043 out: 1044 splx(s); 1045 } 1046 1047 /* 1048 * Set TXcom tty parameters from termios. 1049 */ 1050 int 1051 txcomparam(struct tty *tp, struct termios *t) 1052 { 1053 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 1054 struct txcom_chip *chip; 1055 int ospeed; 1056 int s; 1057 1058 if (!sc) 1059 return ENXIO; 1060 1061 ospeed = t->c_ospeed; 1062 1063 /* Check requested parameters. */ 1064 if (ospeed < 0) { 1065 return EINVAL; 1066 } 1067 if (t->c_ispeed && t->c_ispeed != ospeed) { 1068 return EINVAL; 1069 } 1070 1071 s = spltty(); 1072 chip = sc->sc_chip; 1073 /* 1074 * For the console, always force CLOCAL and !HUPCL, so that the port 1075 * is always active. 1076 */ 1077 if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) || 1078 ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 1079 SET(t->c_cflag, CLOCAL); 1080 CLR(t->c_cflag, HUPCL); 1081 } 1082 splx(s); 1083 1084 /* 1085 * If we're not in a mode that assumes a connection is present, then 1086 * ignore carrier changes. 1087 */ 1088 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1089 chip->sc_dcd = 0; 1090 else 1091 chip->sc_dcd = 1; 1092 1093 /* 1094 * Only whack the UART when params change. 1095 * Some callers need to clear tp->t_ospeed 1096 * to make sure initialization gets done. 1097 */ 1098 if (tp->t_ospeed == ospeed && tp->t_cflag == t->c_cflag) { 1099 return 0; 1100 } 1101 1102 s = spltty(); 1103 chip = sc->sc_chip; 1104 chip->sc_speed = ospeed; 1105 chip->sc_cflag = t->c_cflag; 1106 1107 txcom_setmode(chip); 1108 txcom_setbaudrate(chip); 1109 1110 /* And copy to tty. */ 1111 tp->t_ispeed = 0; 1112 tp->t_ospeed = chip->sc_speed; 1113 tp->t_cflag = chip->sc_cflag; 1114 1115 /* 1116 * Update the tty layer's idea of the carrier bit, in case we changed 1117 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1118 * explicit request. 1119 */ 1120 (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd); 1121 1122 /* 1123 * If hardware flow control is disabled, unblock any hard flow 1124 * control state. 1125 */ 1126 if (!ISSET(chip->sc_cflag, CHWFLOW)) { 1127 txcomstart(tp); 1128 } 1129 1130 splx(s); 1131 1132 return 0; 1133 } 1134 1135 int 1136 txcom_dcd_hook(void *arg, int type, long id, void *msg) 1137 { 1138 struct txcom_softc *sc = arg; 1139 struct tty *tp = sc->sc_tty; 1140 struct txcom_chip *chip = sc->sc_chip; 1141 int modem = !(int)msg; /* p-edge 1, n-edge 0 */ 1142 1143 DPRINTF("DCD %s\n", modem ? "ON" : "OFF"); 1144 1145 if (modem && chip->sc_dcd) 1146 (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd); 1147 1148 return 0; 1149 } 1150 1151 int 1152 txcom_cts_hook(void *arg, int type, long id, void *msg) 1153 { 1154 struct txcom_softc *sc = arg; 1155 struct tty *tp = sc->sc_tty; 1156 struct txcom_chip *chip = sc->sc_chip; 1157 int clear = !(int)msg; /* p-edge 1, n-edge 0 */ 1158 1159 DPRINTF("CTS %s\n", clear ? "ON" : "OFF"); 1160 1161 if (chip->sc_msr_cts) { 1162 if (!clear) { 1163 chip->sc_tx_stopped = 1; 1164 } else { 1165 chip->sc_tx_stopped = 0; 1166 (*tp->t_linesw->l_start)(tp); 1167 } 1168 } 1169 1170 return 0; 1171 } 1172 1173 #ifdef TX39UARTDEBUG 1174 void 1175 txcom_dump(struct txcom_chip *chip) 1176 { 1177 tx_chipset_tag_t tc = chip->sc_tc; 1178 int slot = chip->sc_slot; 1179 txreg_t reg; 1180 1181 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 1182 #define ISSETPRINT(r, m) \ 1183 dbg_bitmask_print(r, TX39_UARTCTRL1_##m, #m) 1184 ISSETPRINT(reg, UARTON); 1185 ISSETPRINT(reg, EMPTY); 1186 ISSETPRINT(reg, PRXHOLDFULL); 1187 ISSETPRINT(reg, RXHOLDFULL); 1188 ISSETPRINT(reg, ENDMARX); 1189 ISSETPRINT(reg, ENDMATX); 1190 ISSETPRINT(reg, TESTMODE); 1191 ISSETPRINT(reg, ENBREAHALT); 1192 ISSETPRINT(reg, ENDMATEST); 1193 ISSETPRINT(reg, ENDMALOOP); 1194 ISSETPRINT(reg, PULSEOPT2); 1195 ISSETPRINT(reg, PULSEOPT1); 1196 ISSETPRINT(reg, DTINVERT); 1197 ISSETPRINT(reg, DISTXD); 1198 ISSETPRINT(reg, TWOSTOP); 1199 ISSETPRINT(reg, LOOPBACK); 1200 ISSETPRINT(reg, BIT7); 1201 ISSETPRINT(reg, EVENPARITY); 1202 ISSETPRINT(reg, ENPARITY); 1203 ISSETPRINT(reg, ENUART); 1204 } 1205 #endif /* TX39UARTDEBUG */ 1206