1 /* $NetBSD: txcom.c,v 1.20 2002/10/23 09:11:18 jdolecek Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include "opt_tx39uart_debug.h" 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/kernel.h> 44 #include <sys/device.h> 45 #include <sys/malloc.h> 46 47 #include <sys/proc.h> /* tsleep/wakeup */ 48 49 #include <sys/ioctl.h> 50 #include <sys/select.h> 51 #include <sys/file.h> 52 53 #include <sys/tty.h> 54 #include <sys/conf.h> 55 #include <dev/cons.h> /* consdev */ 56 57 #include <machine/bus.h> 58 #include <machine/config_hook.h> 59 60 #include <hpcmips/tx/tx39var.h> 61 #include <hpcmips/tx/tx39icureg.h> 62 #include <hpcmips/tx/tx39uartvar.h> 63 #include <hpcmips/tx/tx39uartreg.h> 64 65 #include <hpcmips/tx/tx39irvar.h> 66 67 #include <hpcmips/tx/tx39clockreg.h> /* XXX */ 68 69 #define SET(t, f) (t) |= (f) 70 #define CLR(t, f) (t) &= ~(f) 71 #define ISSET(t, f) ((t) & (f)) 72 /* 73 * UARTA channel has DTR, DSR, RTS, CTS lines. and they wired to MFIO/IO port. 74 */ 75 #define IS_COM0(s) ((s) == 0) 76 #define IS_COM1(s) ((s) == 1) 77 #define ON ((void *)1) 78 #define OFF ((void *)0) 79 80 #ifdef TX39UART_DEBUG 81 #define DPRINTF_ENABLE 82 #define DPRINTF_DEBUG tx39uart_debug 83 #endif 84 #include <machine/debug.h> 85 86 #define TXCOM_HW_CONSOLE 0x40 87 #define TXCOM_RING_SIZE 256 /* must be a power of two! */ 88 #define TXCOM_RING_MASK (TXCOM_RING_SIZE - 1) 89 90 struct txcom_chip { 91 tx_chipset_tag_t sc_tc; 92 int sc_slot; /* UARTA or UARTB */ 93 int sc_cflag; 94 int sc_speed; 95 int sc_swflags; 96 int sc_hwflags; 97 98 int sc_dcd; 99 int sc_msr_cts; 100 int sc_tx_stopped; 101 }; 102 103 struct txcom_softc { 104 struct device sc_dev; 105 struct tty *sc_tty; 106 struct txcom_chip *sc_chip; 107 108 struct callout sc_txsoft_ch; 109 struct callout sc_rxsoft_ch; 110 111 u_int8_t *sc_tba; /* transmit buffer address */ 112 int sc_tbc; /* transmit byte count */ 113 int sc_heldtbc; 114 u_int8_t *sc_rbuf; /* receive buffer address */ 115 int sc_rbput; /* receive byte count */ 116 int sc_rbget; 117 }; 118 119 extern struct cfdriver txcom_cd; 120 121 int txcom_match(struct device *, struct cfdata *, void *); 122 void txcom_attach(struct device *, struct device *, void *); 123 int txcom_print(void*, const char *); 124 125 int txcom_txintr(void *); 126 int txcom_rxintr(void *); 127 int txcom_frameerr_intr(void *); 128 int txcom_parityerr_intr(void *); 129 int txcom_break_intr(void *); 130 131 void txcom_rxsoft(void *); 132 void txcom_txsoft(void *); 133 134 int txcom_stsoft(void *); 135 int txcom_stsoft2(void *); 136 int txcom_stsoft3(void *); 137 int txcom_stsoft4(void *); 138 139 140 void txcom_shutdown(struct txcom_softc *); 141 void txcom_break(struct txcom_softc *, int); 142 void txcom_modem(struct txcom_softc *, int); 143 void txcomstart(struct tty *); 144 int txcomparam(struct tty *, struct termios *); 145 146 void txcom_reset (struct txcom_chip *); 147 int txcom_enable (struct txcom_chip *); 148 void txcom_disable (struct txcom_chip *); 149 void txcom_setmode (struct txcom_chip *); 150 void txcom_setbaudrate(struct txcom_chip *); 151 int txcom_cngetc (dev_t); 152 void txcom_cnputc (dev_t, int); 153 void txcom_cnpollc (dev_t, int); 154 155 int txcom_dcd_hook(void *, int, long, void *); 156 int txcom_cts_hook(void *, int, long, void *); 157 158 159 __inline__ int __txcom_txbufready(struct txcom_chip *, int); 160 const char *__txcom_slotname(int); 161 162 #ifdef TX39UARTDEBUG 163 void txcom_dump(struct txcom_chip *); 164 #endif 165 166 struct consdev txcomcons = { 167 NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc, 168 NULL, NODEV, CN_NORMAL 169 }; 170 171 /* Serial console */ 172 struct txcom_chip txcom_chip; 173 174 CFATTACH_DECL(txcom, sizeof(struct txcom_softc), 175 txcom_match, txcom_attach, NULL, NULL); 176 177 dev_type_open(txcomopen); 178 dev_type_close(txcomclose); 179 dev_type_read(txcomread); 180 dev_type_write(txcomwrite); 181 dev_type_ioctl(txcomioctl); 182 dev_type_stop(txcomstop); 183 dev_type_tty(txcomtty); 184 dev_type_poll(txcompoll); 185 186 const struct cdevsw txcom_cdevsw = { 187 txcomopen, txcomclose, txcomread, txcomwrite, txcomioctl, 188 txcomstop, txcomtty, txcompoll, nommap, ttykqfilter, D_TTY 189 }; 190 191 int 192 txcom_match(parent, cf, aux) 193 struct device *parent; 194 struct cfdata *cf; 195 void *aux; 196 { 197 /* if the autoconfiguration got this far, there's a slot here */ 198 return 1; 199 } 200 201 void 202 txcom_attach(struct device *parent, struct device *self, void *aux) 203 { 204 struct tx39uart_attach_args *ua = aux; 205 struct txcom_softc *sc = (void*)self; 206 tx_chipset_tag_t tc; 207 struct tty *tp; 208 struct txcom_chip *chip; 209 int slot, console; 210 211 /* Check this slot used as serial console */ 212 console = (ua->ua_slot == txcom_chip.sc_slot) && 213 (txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE); 214 215 if (console) { 216 sc->sc_chip = &txcom_chip; 217 } else { 218 if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip), 219 M_DEVBUF, M_WAITOK))) { 220 printf(": can't allocate chip\n"); 221 return; 222 } 223 memset(sc->sc_chip, 0, sizeof(struct txcom_chip)); 224 } 225 226 chip = sc->sc_chip; 227 tc = chip->sc_tc = ua->ua_tc; 228 slot = chip->sc_slot = ua->ua_slot; 229 230 #ifdef TX39UARTDEBUG 231 txcom_dump(chip); 232 #endif 233 if (!console) 234 txcom_reset(chip); 235 236 if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) { 237 printf(": can't allocate buffer.\n"); 238 return; 239 } 240 memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE); 241 242 tp = ttymalloc(); 243 tp->t_oproc = txcomstart; 244 tp->t_param = txcomparam; 245 tp->t_hwiflow = NULL; 246 sc->sc_tty = tp; 247 tty_attach(tp); 248 249 if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 250 int maj; 251 /* locate the major number */ 252 maj = cdevsw_lookup_major(&txcom_cdevsw); 253 254 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 255 256 printf(": console"); 257 } 258 259 printf("\n"); 260 261 /* 262 * Enable interrupt 263 */ 264 #define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s)) 265 266 tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY, 267 txcom_rxintr, sc); 268 tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY, 269 txcom_txintr, sc); 270 tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY, 271 txcom_rxintr, sc); 272 tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY, 273 txcom_txintr, sc); 274 tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY, 275 txcom_frameerr_intr, sc); 276 tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY, 277 txcom_parityerr_intr, sc); 278 tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY, 279 txcom_break_intr, sc); 280 281 /* 282 * UARTA has external signal line. (its wiring is platform dependent) 283 */ 284 if (IS_COM0(slot)) { 285 /* install DCD, CTS hooks. */ 286 config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_DCD, 287 CONFIG_HOOK_EXCLUSIVE, txcom_dcd_hook, sc); 288 config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_CTS, 289 CONFIG_HOOK_EXCLUSIVE, txcom_cts_hook, sc); 290 } 291 292 /* 293 * UARTB can connect IR module 294 */ 295 if (IS_COM1(slot)) { 296 struct txcom_attach_args tca; 297 tca.tca_tc = tc; 298 tca.tca_parent = self; 299 config_found(self, &tca, txcom_print); 300 } 301 } 302 303 int 304 txcom_print(void *aux, const char *pnp) 305 { 306 return pnp ? QUIET : UNCONF; 307 } 308 309 void 310 txcom_reset(struct txcom_chip *chip) 311 { 312 tx_chipset_tag_t tc; 313 int slot, ofs; 314 txreg_t reg; 315 316 tc = chip->sc_tc; 317 slot = chip->sc_slot; 318 ofs = TX39_UARTCTRL1_REG(slot); 319 320 /* Supply clock */ 321 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 322 reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 323 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 324 325 /* reset UART module */ 326 tx_conf_write(tc, ofs, 0); 327 } 328 329 int 330 txcom_enable(struct txcom_chip *chip) 331 { 332 tx_chipset_tag_t tc; 333 txreg_t reg; 334 int slot, ofs, timeout; 335 336 tc = chip->sc_tc; 337 slot = chip->sc_slot; 338 ofs = TX39_UARTCTRL1_REG(slot); 339 340 /* External power supply (if any) */ 341 config_hook_call(CONFIG_HOOK_POWERCONTROL, 342 CONFIG_HOOK_POWERCONTROL_COM0, PWCTL_ON); 343 delay(3); 344 345 /* Supply clock */ 346 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 347 reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 348 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 349 350 /* 351 * XXX Disable DMA (DMA not coded yet) 352 */ 353 reg = tx_conf_read(tc, ofs); 354 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 355 tx_conf_write(tc, ofs, reg); 356 357 /* enable */ 358 reg = tx_conf_read(tc, ofs); 359 reg |= TX39_UARTCTRL1_ENUART; 360 reg &= ~TX39_UARTCTRL1_ENBREAHALT; 361 tx_conf_write(tc, ofs, reg); 362 363 timeout = 100000; 364 365 while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) && 366 --timeout > 0) 367 ; 368 369 if (timeout == 0 && !cold) { 370 printf("%s never power up\n", __txcom_slotname(slot)); 371 return 1; 372 } 373 374 return 0; 375 } 376 377 void 378 txcom_disable(struct txcom_chip *chip) 379 { 380 tx_chipset_tag_t tc; 381 txreg_t reg; 382 int slot; 383 384 tc = chip->sc_tc; 385 slot = chip->sc_slot; 386 387 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 388 /* DMA */ 389 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 390 391 /* disable module */ 392 reg &= ~TX39_UARTCTRL1_ENUART; 393 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 394 395 /* Clock */ 396 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 397 reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 398 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 399 400 } 401 402 __inline__ int 403 __txcom_txbufready(struct txcom_chip *chip, int retry) 404 { 405 tx_chipset_tag_t tc = chip->sc_tc; 406 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 407 408 do { 409 if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY) 410 return 1; 411 } while(--retry != 0); 412 413 return 0; 414 } 415 416 void 417 txcom_pulse_mode(struct device *dev) 418 { 419 struct txcom_softc *sc = (void*)dev; 420 struct txcom_chip *chip = sc->sc_chip; 421 tx_chipset_tag_t tc = chip->sc_tc; 422 int ofs; 423 txreg_t reg; 424 425 ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 426 427 reg = tx_conf_read(tc, ofs); 428 /* WindowsCE use this setting */ 429 reg |= TX39_UARTCTRL1_PULSEOPT1; 430 reg &= ~TX39_UARTCTRL1_PULSEOPT2; 431 reg |= TX39_UARTCTRL1_DTINVERT; 432 433 tx_conf_write(tc, ofs, reg); 434 } 435 436 /* 437 * console 438 */ 439 int 440 txcom_cngetc(dev_t dev) 441 { 442 tx_chipset_tag_t tc; 443 int ofs, c, s; 444 445 s = spltty(); 446 447 tc = txcom_chip.sc_tc; 448 ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot); 449 450 while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs))) 451 ; 452 453 c = TX39_UARTRXHOLD_RXDATA( 454 tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot))); 455 456 if (c == '\r') 457 c = '\n'; 458 459 splx(s); 460 461 return c; 462 } 463 464 void 465 txcom_cnputc(dev_t dev, int c) 466 { 467 struct txcom_chip *chip = &txcom_chip; 468 tx_chipset_tag_t tc = chip->sc_tc; 469 int s; 470 471 s = spltty(); 472 473 /* Wait for transmitter to empty */ 474 __txcom_txbufready(chip, -1); 475 476 tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 477 (c & TX39_UARTTXHOLD_TXDATA_MASK)); 478 479 __txcom_txbufready(chip, -1); 480 481 splx(s); 482 } 483 484 void 485 txcom_cnpollc(dev_t dev, int on) 486 { 487 } 488 489 void 490 txcom_setmode(struct txcom_chip *chip) 491 { 492 tcflag_t cflag = chip->sc_cflag; 493 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 494 txreg_t reg; 495 496 reg = tx_conf_read(chip->sc_tc, ofs); 497 reg &= ~TX39_UARTCTRL1_ENUART; 498 tx_conf_write(chip->sc_tc, ofs, reg); 499 500 switch (ISSET(cflag, CSIZE)) { 501 default: 502 printf("txcom_setmode: CS7, CS8 only. use CS7"); 503 /* FALL THROUGH */ 504 case CS7: 505 reg |= TX39_UARTCTRL1_BIT7; 506 break; 507 case CS8: 508 reg &= ~TX39_UARTCTRL1_BIT7; 509 break; 510 } 511 512 if (ISSET(cflag, PARENB)) { 513 reg |= TX39_UARTCTRL1_ENPARITY; 514 if (ISSET(cflag, PARODD)) { 515 reg &= ~TX39_UARTCTRL1_EVENPARITY; 516 } else { 517 reg |= TX39_UARTCTRL1_EVENPARITY; 518 } 519 } else { 520 reg &= ~TX39_UARTCTRL1_ENPARITY; 521 } 522 523 if (ISSET(cflag, CSTOPB)) 524 reg |= TX39_UARTCTRL1_TWOSTOP; 525 else 526 reg &= ~TX39_UARTCTRL1_TWOSTOP; 527 528 reg |= TX39_UARTCTRL1_ENUART; 529 tx_conf_write(chip->sc_tc, ofs, reg); 530 } 531 532 void 533 txcom_setbaudrate(struct txcom_chip *chip) 534 { 535 int baudrate; 536 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 537 txreg_t reg, reg1; 538 539 if (chip->sc_speed == 0) 540 return; 541 542 if (!cold) 543 DPRINTF("%d\n", chip->sc_speed); 544 545 reg1 = tx_conf_read(chip->sc_tc, ofs); 546 reg1 &= ~TX39_UARTCTRL1_ENUART; 547 tx_conf_write(chip->sc_tc, ofs, reg1); 548 549 baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1; 550 reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate); 551 552 tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg); 553 554 reg1 |= TX39_UARTCTRL1_ENUART; 555 tx_conf_write(chip->sc_tc, ofs, reg1); 556 } 557 558 int 559 txcom_cnattach(int slot, int speed, int cflag) 560 { 561 cn_tab = &txcomcons; 562 563 txcom_chip.sc_tc = tx_conf_get_tag(); 564 txcom_chip.sc_slot = slot; 565 txcom_chip.sc_cflag = cflag; 566 txcom_chip.sc_speed = speed; 567 txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE; 568 #if notyet 569 txcom_reset(&txcom_chip); 570 #endif 571 txcom_setmode(&txcom_chip); 572 txcom_setbaudrate(&txcom_chip); 573 574 if (txcom_enable(&txcom_chip)) 575 return 1; 576 577 return 0; 578 } 579 580 /* 581 * tty 582 */ 583 void 584 txcom_break(struct txcom_softc *sc, int on) 585 { 586 struct txcom_chip *chip = sc->sc_chip; 587 588 tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 589 on ? TX39_UARTTXHOLD_BREAK : 0); 590 } 591 592 void 593 txcom_modem(struct txcom_softc *sc, int on) 594 { 595 struct txcom_chip *chip = sc->sc_chip; 596 tx_chipset_tag_t tc = chip->sc_tc; 597 int slot = chip->sc_slot; 598 txreg_t reg; 599 600 /* assert DTR */ 601 if (IS_COM0(slot)) { 602 config_hook_call(CONFIG_HOOK_SET, 603 CONFIG_HOOK_COM0_DTR, 604 (void *)on); 605 } 606 607 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 608 reg &= ~TX39_UARTCTRL1_ENUART; 609 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 610 611 if (on) { 612 reg &= ~TX39_UARTCTRL1_DISTXD; 613 } else { 614 reg |= TX39_UARTCTRL1_DISTXD; /* low UARTTXD */ 615 } 616 617 reg |= TX39_UARTCTRL1_ENUART; 618 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 619 } 620 621 void 622 txcom_shutdown(struct txcom_softc *sc) 623 { 624 struct tty *tp = sc->sc_tty; 625 int s = spltty(); 626 627 /* Clear any break condition set with TIOCSBRK. */ 628 txcom_break(sc, 0); 629 630 /* 631 * Hang up if necessary. Wait a bit, so the other side has time to 632 * notice even if we immediately open the port again. 633 */ 634 if (ISSET(tp->t_cflag, HUPCL)) { 635 txcom_modem(sc, 0); 636 (void) tsleep(sc, TTIPRI, ttclos, hz); 637 } 638 639 640 /* Turn off interrupts if not the console. */ 641 if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 642 txcom_disable(sc->sc_chip); 643 } 644 645 splx(s); 646 } 647 648 const char * 649 __txcom_slotname(int slot) 650 { 651 static const char *slotname[] = {"UARTA", "UARTB", "unknown"}; 652 653 if (slot != 0 && slot != 1) 654 return slotname[2]; 655 656 return slotname[slot]; 657 } 658 659 int 660 txcom_frameerr_intr(void *arg) 661 { 662 struct txcom_softc *sc = arg; 663 664 printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot)); 665 666 return 0; 667 } 668 669 int 670 txcom_parityerr_intr(void *arg) 671 { 672 struct txcom_softc *sc = arg; 673 674 printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot)); 675 676 return 0; 677 } 678 679 int 680 txcom_break_intr(void *arg) 681 { 682 struct txcom_softc *sc = arg; 683 684 printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot)); 685 686 return 0; 687 } 688 689 int 690 txcom_rxintr(void *arg) 691 { 692 struct txcom_softc *sc = arg; 693 struct txcom_chip *chip = sc->sc_chip; 694 u_int8_t c; 695 696 c = TX39_UARTRXHOLD_RXDATA( 697 tx_conf_read(chip->sc_tc, 698 TX39_UARTRXHOLD_REG(chip->sc_slot))); 699 700 sc->sc_rbuf[sc->sc_rbput] = c; 701 sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK; 702 703 callout_reset(&sc->sc_rxsoft_ch, 1, txcom_rxsoft, sc); 704 705 return 0; 706 } 707 708 void 709 txcom_rxsoft(void *arg) 710 { 711 struct txcom_softc *sc = arg; 712 struct tty *tp = sc->sc_tty; 713 int (*rint)(int, struct tty *); 714 int code; 715 int s, end, get; 716 717 rint = tp->t_linesw->l_rint; 718 719 s = spltty(); 720 end = sc->sc_rbput; 721 get = sc->sc_rbget; 722 723 while (get != end) { 724 code = sc->sc_rbuf[get]; 725 726 if ((*rint)(code, tp) == -1) { 727 /* 728 * The line discipline's buffer is out of space. 729 */ 730 } 731 get = (get + 1) % TXCOM_RING_MASK; 732 } 733 sc->sc_rbget = get; 734 735 splx(s); 736 } 737 738 int 739 txcom_txintr(void *arg) 740 { 741 struct txcom_softc *sc = arg; 742 struct txcom_chip *chip = sc->sc_chip; 743 tx_chipset_tag_t tc = chip->sc_tc; 744 745 if (sc->sc_tbc > 0) { 746 tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 747 (*sc->sc_tba & 748 TX39_UARTTXHOLD_TXDATA_MASK)); 749 sc->sc_tbc--; 750 sc->sc_tba++; 751 } else { 752 callout_reset(&sc->sc_rxsoft_ch, 1, txcom_txsoft, sc); 753 } 754 755 return 0; 756 } 757 758 void 759 txcom_txsoft(void *arg) 760 { 761 struct txcom_softc *sc = arg; 762 struct tty *tp = sc->sc_tty; 763 int s = spltty(); 764 765 CLR(tp->t_state, TS_BUSY); 766 if (ISSET(tp->t_state, TS_FLUSH)) { 767 CLR(tp->t_state, TS_FLUSH); 768 } else { 769 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 770 } 771 772 (*tp->t_linesw->l_start)(tp); 773 774 splx(s); 775 } 776 777 int 778 txcomopen(dev_t dev, int flag, int mode, struct proc *p) 779 { 780 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 781 struct txcom_chip *chip; 782 struct tty *tp; 783 int s, err; 784 785 if (!sc) 786 return ENXIO; 787 788 chip = sc->sc_chip; 789 tp = sc->sc_tty; 790 791 if (ISSET(tp->t_state, TS_ISOPEN) && 792 ISSET(tp->t_state, TS_XCLUDE) && 793 p->p_ucred->cr_uid != 0) 794 return (EBUSY); 795 796 s = spltty(); 797 798 if (txcom_enable(sc->sc_chip)) { 799 splx(s); 800 goto out; 801 } 802 /* 803 * Do the following iff this is a first open. 804 */ 805 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 806 struct termios t; 807 808 tp->t_dev = dev; 809 810 t.c_ispeed = 0; 811 if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 812 t.c_ospeed = chip->sc_speed; 813 t.c_cflag = chip->sc_cflag; 814 } else { 815 t.c_ospeed = TTYDEF_SPEED; 816 t.c_cflag = TTYDEF_CFLAG; 817 } 818 819 if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL)) 820 SET(t.c_cflag, CLOCAL); 821 if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS)) 822 SET(t.c_cflag, CRTSCTS); 823 if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF)) 824 SET(t.c_cflag, MDMBUF); 825 826 /* Make sure txcomparam() will do something. */ 827 tp->t_ospeed = 0; 828 txcomparam(tp, &t); 829 830 tp->t_iflag = TTYDEF_IFLAG; 831 tp->t_oflag = TTYDEF_OFLAG; 832 tp->t_lflag = TTYDEF_LFLAG; 833 834 ttychars(tp); 835 ttsetwater(tp); 836 837 /* 838 * Turn on DTR. We must always do this, even if carrier is not 839 * present, because otherwise we'd have to use TIOCSDTR 840 * immediately after setting CLOCAL, which applications do not 841 * expect. We always assert DTR while the device is open 842 * unless explicitly requested to deassert it. 843 */ 844 txcom_modem(sc, 1); 845 846 /* Clear the input ring, and unblock. */ 847 sc->sc_rbget = sc->sc_rbput = 0; 848 } 849 850 splx(s); 851 #define TXCOMDIALOUT(x) (minor(x) & 0x80000) 852 if ((err = ttyopen(tp, TXCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)))) { 853 DPRINTF("ttyopen failed\n"); 854 goto out; 855 } 856 if ((err = (*tp->t_linesw->l_open)(dev, tp))) { 857 DPRINTF("line dicipline open failed\n"); 858 goto out; 859 } 860 861 return err; 862 863 out: 864 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 865 /* 866 * We failed to open the device, and nobody else had it opened. 867 * Clean up the state as appropriate. 868 */ 869 txcom_shutdown(sc); 870 } 871 872 return err; 873 874 } 875 876 int 877 txcomclose(dev_t dev, int flag, int mode, struct proc *p) 878 { 879 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 880 struct tty *tp = sc->sc_tty; 881 882 /* XXX This is for cons.c. */ 883 if (!ISSET(tp->t_state, TS_ISOPEN)) 884 return 0; 885 886 (*tp->t_linesw->l_close)(tp, flag); 887 ttyclose(tp); 888 889 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 890 /* 891 * Although we got a last close, the device may still be in 892 * use; e.g. if this was the dialout node, and there are still 893 * processes waiting for carrier on the non-dialout node. 894 */ 895 txcom_shutdown(sc); 896 } 897 898 return 0; 899 } 900 901 int 902 txcomread(dev_t dev, struct uio *uio, int flag) 903 { 904 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 905 struct tty *tp = sc->sc_tty; 906 907 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 908 } 909 910 int 911 txcomwrite(dev_t dev, struct uio *uio, int flag) 912 { 913 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 914 struct tty *tp = sc->sc_tty; 915 916 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 917 } 918 919 int 920 txcompoll(dev_t dev, int events, struct proc *p) 921 { 922 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 923 struct tty *tp = sc->sc_tty; 924 925 return ((*tp->t_linesw->l_poll)(tp, events, p)); 926 } 927 928 struct tty * 929 txcomtty(dev_t dev) 930 { 931 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 932 933 return sc->sc_tty; 934 } 935 936 int 937 txcomioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p) 938 { 939 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 940 struct tty *tp = sc->sc_tty; 941 int s, err; 942 943 err = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 944 if (err != EPASSTHROUGH) { 945 return err; 946 } 947 948 err = ttioctl(tp, cmd, data, flag, p); 949 if (err != EPASSTHROUGH) { 950 return err; 951 } 952 953 err = 0; 954 955 s = spltty(); 956 957 switch (cmd) { 958 default: 959 err = EPASSTHROUGH; 960 break; 961 962 case TIOCSBRK: 963 txcom_break(sc, 1); 964 break; 965 966 case TIOCCBRK: 967 txcom_break(sc, 0); 968 break; 969 970 case TIOCSDTR: 971 txcom_modem(sc, 1); 972 break; 973 974 case TIOCCDTR: 975 txcom_modem(sc, 0); 976 break; 977 978 case TIOCGFLAGS: 979 *(int *)data = sc->sc_chip->sc_swflags; 980 break; 981 982 case TIOCSFLAGS: 983 err = suser(p->p_ucred, &p->p_acflag); 984 if (err) { 985 break; 986 } 987 sc->sc_chip->sc_swflags = *(int *)data; 988 break; 989 990 } 991 992 splx(s); 993 994 return err; 995 } 996 997 void 998 txcomstop(struct tty *tp, int flag) 999 { 1000 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 1001 int s; 1002 1003 s = spltty(); 1004 1005 if (ISSET(tp->t_state, TS_BUSY)) { 1006 /* Stop transmitting at the next chunk. */ 1007 sc->sc_tbc = 0; 1008 sc->sc_heldtbc = 0; 1009 if (!ISSET(tp->t_state, TS_TTSTOP)) 1010 SET(tp->t_state, TS_FLUSH); 1011 } 1012 1013 splx(s); 1014 } 1015 1016 void 1017 txcomstart(struct tty *tp) 1018 { 1019 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 1020 struct txcom_chip *chip = sc->sc_chip; 1021 tx_chipset_tag_t tc = chip->sc_tc; 1022 int slot = chip->sc_slot; 1023 int s; 1024 1025 s = spltty(); 1026 1027 if (!__txcom_txbufready(chip, 0) || 1028 ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1029 goto out; 1030 1031 if (tp->t_outq.c_cc <= tp->t_lowat) { 1032 if (ISSET(tp->t_state, TS_ASLEEP)) { 1033 CLR(tp->t_state, TS_ASLEEP); 1034 wakeup(&tp->t_outq); 1035 } 1036 selwakeup(&tp->t_wsel); 1037 if (tp->t_outq.c_cc == 0) 1038 goto out; 1039 } 1040 1041 sc->sc_tba = tp->t_outq.c_cf; 1042 sc->sc_tbc = ndqb(&tp->t_outq, 0); 1043 SET(tp->t_state, TS_BUSY); 1044 1045 /* Output the first character of the contiguous buffer. */ 1046 tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot), 1047 (*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK)); 1048 1049 sc->sc_tbc--; 1050 sc->sc_tba++; 1051 1052 out: 1053 splx(s); 1054 } 1055 1056 /* 1057 * Set TXcom tty parameters from termios. 1058 */ 1059 int 1060 txcomparam(struct tty *tp, struct termios *t) 1061 { 1062 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 1063 struct txcom_chip *chip; 1064 int ospeed; 1065 int s; 1066 1067 if (!sc) 1068 return ENXIO; 1069 1070 ospeed = t->c_ospeed; 1071 1072 /* Check requested parameters. */ 1073 if (ospeed < 0) { 1074 return EINVAL; 1075 } 1076 if (t->c_ispeed && t->c_ispeed != ospeed) { 1077 return EINVAL; 1078 } 1079 1080 s = spltty(); 1081 chip = sc->sc_chip; 1082 /* 1083 * For the console, always force CLOCAL and !HUPCL, so that the port 1084 * is always active. 1085 */ 1086 if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) || 1087 ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 1088 SET(t->c_cflag, CLOCAL); 1089 CLR(t->c_cflag, HUPCL); 1090 } 1091 splx(s); 1092 1093 /* 1094 * If we're not in a mode that assumes a connection is present, then 1095 * ignore carrier changes. 1096 */ 1097 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1098 chip->sc_dcd = 0; 1099 else 1100 chip->sc_dcd = 1; 1101 1102 /* 1103 * Only whack the UART when params change. 1104 * Some callers need to clear tp->t_ospeed 1105 * to make sure initialization gets done. 1106 */ 1107 if (tp->t_ospeed == ospeed && tp->t_cflag == t->c_cflag) { 1108 return 0; 1109 } 1110 1111 s = spltty(); 1112 chip = sc->sc_chip; 1113 chip->sc_speed = ospeed; 1114 chip->sc_cflag = t->c_cflag; 1115 1116 txcom_setmode(chip); 1117 txcom_setbaudrate(chip); 1118 1119 /* And copy to tty. */ 1120 tp->t_ispeed = 0; 1121 tp->t_ospeed = chip->sc_speed; 1122 tp->t_cflag = chip->sc_cflag; 1123 1124 /* 1125 * Update the tty layer's idea of the carrier bit, in case we changed 1126 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1127 * explicit request. 1128 */ 1129 (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd); 1130 1131 /* 1132 * If hardware flow control is disabled, unblock any hard flow 1133 * control state. 1134 */ 1135 if (!ISSET(chip->sc_cflag, CHWFLOW)) { 1136 txcomstart(tp); 1137 } 1138 1139 splx(s); 1140 1141 return 0; 1142 } 1143 1144 int 1145 txcom_dcd_hook(void *arg, int type, long id, void *msg) 1146 { 1147 struct txcom_softc *sc = arg; 1148 struct tty *tp = sc->sc_tty; 1149 struct txcom_chip *chip = sc->sc_chip; 1150 int modem = !(int)msg; /* p-edge 1, n-edge 0 */ 1151 1152 DPRINTF("DCD %s\n", modem ? "ON" : "OFF"); 1153 1154 if (modem && chip->sc_dcd) 1155 (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd); 1156 1157 return 0; 1158 } 1159 1160 int 1161 txcom_cts_hook(void *arg, int type, long id, void *msg) 1162 { 1163 struct txcom_softc *sc = arg; 1164 struct tty *tp = sc->sc_tty; 1165 struct txcom_chip *chip = sc->sc_chip; 1166 int clear = !(int)msg; /* p-edge 1, n-edge 0 */ 1167 1168 DPRINTF("CTS %s\n", clear ? "ON" : "OFF"); 1169 1170 if (chip->sc_msr_cts) { 1171 if (!clear) { 1172 chip->sc_tx_stopped = 1; 1173 } else { 1174 chip->sc_tx_stopped = 0; 1175 (*tp->t_linesw->l_start)(tp); 1176 } 1177 } 1178 1179 return 0; 1180 } 1181 1182 #ifdef TX39UARTDEBUG 1183 void 1184 txcom_dump(struct txcom_chip *chip) 1185 { 1186 tx_chipset_tag_t tc = chip->sc_tc; 1187 int slot = chip->sc_slot; 1188 txreg_t reg; 1189 1190 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 1191 #define ISSETPRINT(r, m) \ 1192 dbg_bitmask_print(r, TX39_UARTCTRL1_##m, #m) 1193 ISSETPRINT(reg, UARTON); 1194 ISSETPRINT(reg, EMPTY); 1195 ISSETPRINT(reg, PRXHOLDFULL); 1196 ISSETPRINT(reg, RXHOLDFULL); 1197 ISSETPRINT(reg, ENDMARX); 1198 ISSETPRINT(reg, ENDMATX); 1199 ISSETPRINT(reg, TESTMODE); 1200 ISSETPRINT(reg, ENBREAHALT); 1201 ISSETPRINT(reg, ENDMATEST); 1202 ISSETPRINT(reg, ENDMALOOP); 1203 ISSETPRINT(reg, PULSEOPT2); 1204 ISSETPRINT(reg, PULSEOPT1); 1205 ISSETPRINT(reg, DTINVERT); 1206 ISSETPRINT(reg, DISTXD); 1207 ISSETPRINT(reg, TWOSTOP); 1208 ISSETPRINT(reg, LOOPBACK); 1209 ISSETPRINT(reg, BIT7); 1210 ISSETPRINT(reg, EVENPARITY); 1211 ISSETPRINT(reg, ENPARITY); 1212 ISSETPRINT(reg, ENUART); 1213 } 1214 #endif /* TX39UARTDEBUG */ 1215