xref: /netbsd/sys/arch/hpcmips/vr/vrc4172pci.c (revision bf9ec67e)
1 /*	$NetBSD: vrc4172pci.c,v 1.5 2002/05/16 01:01:36 thorpej Exp $	*/
2 
3 /*-
4  * Copyright (c) 2002 TAKEMURA Shin
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. Neither the name of the project nor the names of its contributors
16  *    may be used to endorse or promote products derived from this software
17  *    without specific prior written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
23  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29  * SUCH DAMAGE.
30  */
31 
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/device.h>
35 
36 #include <machine/bus.h>
37 #include <machine/bus_space_hpcmips.h>
38 #include <machine/bus_dma_hpcmips.h>
39 #include <machine/config_hook.h>
40 #include <machine/platid.h>
41 #include <machine/platid_mask.h>
42 
43 #include <dev/pci/pcivar.h>
44 #include <dev/pci/pcidevs.h>
45 #include <dev/pci/pciidereg.h>
46 
47 #include <hpcmips/vr/icureg.h>
48 #include <hpcmips/vr/vripif.h>
49 #include <hpcmips/vr/vrc4172pcireg.h>
50 
51 #include "pci.h"
52 #include "opt_vrc4172pci.h"
53 
54 #ifdef DEBUG
55 #define	DPRINTF(args)	printf args
56 #else
57 #define	DPRINTF(args)	while (0) {}
58 #endif
59 
60 struct vrc4172pci_softc {
61 	struct device sc_dev;
62 
63 	bus_space_tag_t sc_iot;
64 	bus_space_handle_t sc_ioh;
65 
66 	struct hpcmips_pci_chipset sc_pc;
67 #ifdef VRC4172PCI_MCR700_SUPPORT
68 	pcireg_t sc_fake_baseaddr;
69 	hpcio_chip_t sc_iochip;
70 #if 0
71 	hpcio_intr_handle_t sc_ih;
72 #endif
73 #endif /* VRC4172PCI_MCR700_SUPPORT */
74 };
75 
76 static int	vrc4172pci_match(struct device *, struct cfdata *, void *);
77 static void	vrc4172pci_attach(struct device *, struct device *, void *);
78 #if NPCI > 0
79 static int	vrc4172pci_print(void *, const char *);
80 #endif
81 static void	vrc4172pci_attach_hook(struct device *, struct device *,
82 		    struct pcibus_attach_args *);
83 static int	vrc4172pci_bus_maxdevs(pci_chipset_tag_t, int);
84 static int	vrc4172pci_bus_devorder(pci_chipset_tag_t, int, char *);
85 static pcitag_t	vrc4172pci_make_tag(pci_chipset_tag_t, int, int, int);
86 static void	vrc4172pci_decompose_tag(pci_chipset_tag_t, pcitag_t, int *,
87 		    int *, int *);
88 static pcireg_t	vrc4172pci_conf_read(pci_chipset_tag_t, pcitag_t, int);
89 static void	vrc4172pci_conf_write(pci_chipset_tag_t, pcitag_t, int,
90 		    pcireg_t);
91 static int	vrc4172pci_intr_map(struct pci_attach_args *,
92 		    pci_intr_handle_t *);
93 static const char *vrc4172pci_intr_string(pci_chipset_tag_t,pci_intr_handle_t);
94 static const struct evcnt *vrc4172pci_intr_evcnt(pci_chipset_tag_t,
95 		    pci_intr_handle_t);
96 static void	*vrc4172pci_intr_establish(pci_chipset_tag_t,
97 		    pci_intr_handle_t, int, int (*)(void *), void *);
98 static void	vrc4172pci_intr_disestablish(pci_chipset_tag_t, void *);
99 #ifdef VRC4172PCI_MCR700_SUPPORT
100 #if 0
101 static int	vrc4172pci_mcr700_intr(void *arg);
102 #endif
103 #endif
104 
105 struct cfattach vrc4172pci_ca = {
106 	sizeof(struct vrc4172pci_softc), vrc4172pci_match, vrc4172pci_attach
107 };
108 
109 static inline void
110 vrc4172pci_write(struct vrc4172pci_softc *sc, int offset, u_int32_t val)
111 {
112 
113 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, offset, val);
114 }
115 
116 static inline u_int32_t
117 vrc4172pci_read(struct vrc4172pci_softc *sc, int offset)
118 {
119 	u_int32_t res;
120 
121 	if (bus_space_peek(sc->sc_iot, sc->sc_ioh, offset, 4, &res) < 0) {
122 		res = 0xffffffff;
123 	}
124 
125 	return (res);
126 }
127 
128 static int
129 vrc4172pci_match(struct device *parent, struct cfdata *match, void *aux)
130 {
131 
132 	return (1);
133 }
134 
135 static void
136 vrc4172pci_attach(struct device *parent, struct device *self, void *aux)
137 {
138 	struct vrc4172pci_softc *sc = (struct vrc4172pci_softc *)self;
139 	pci_chipset_tag_t pc = &sc->sc_pc;
140 	struct vrip_attach_args *va = aux;
141 #if NPCI > 0
142 	struct pcibus_attach_args pba;
143 #endif
144 
145 	sc->sc_iot = va->va_iot;
146 	if (bus_space_map(sc->sc_iot, va->va_addr, va->va_size, 0,
147 	    &sc->sc_ioh)) {
148 		printf(": couldn't map io space\n");
149 		return;
150 	}
151 	printf("\n");
152 
153 #ifdef VRC4172PCI_MCR700_SUPPORT
154 	if (platid_match(&platid, &platid_mask_MACH_NEC_MCR_700) ||
155 	    platid_match(&platid, &platid_mask_MACH_NEC_MCR_700A)) {
156 		/* power USB controller on MC-R700 */
157 		sc->sc_iochip = va->va_gpio_chips[VRIP_IOCHIP_VRGIU];
158 		hpcio_portwrite(sc->sc_iochip, 45, 1);
159 		sc->sc_fake_baseaddr = 0x0afe0000;
160 #if 0
161 		sc->sc_ih = hpcio_intr_establish(sc->sc_iochip, 1,
162 		    HPCIO_INTR_EDGE|HPCIO_INTR_HOLD,
163 		    vrc4172pci_mcr700_intr, sc);
164 #endif
165 	}
166 #endif /* VRC4172PCI_MCR700_SUPPORT */
167 
168 	pc->pc_dev = &sc->sc_dev;
169 	pc->pc_attach_hook = vrc4172pci_attach_hook;
170 	pc->pc_bus_maxdevs = vrc4172pci_bus_maxdevs;
171 	pc->pc_bus_devorder = vrc4172pci_bus_devorder;
172 	pc->pc_make_tag = vrc4172pci_make_tag;
173 	pc->pc_decompose_tag = vrc4172pci_decompose_tag;
174 	pc->pc_conf_read = vrc4172pci_conf_read;
175 	pc->pc_conf_write = vrc4172pci_conf_write;
176 	pc->pc_intr_map = vrc4172pci_intr_map;
177 	pc->pc_intr_string = vrc4172pci_intr_string;
178 	pc->pc_intr_evcnt = vrc4172pci_intr_evcnt;
179 	pc->pc_intr_establish = vrc4172pci_intr_establish;
180 	pc->pc_intr_disestablish = vrc4172pci_intr_disestablish;
181 
182 #if 0
183 	{
184 		int i;
185 
186 		for (i = 0; i < 2; i++)
187 			printf("%s: ID_REG(0, 0, %d) = 0x%08x\n",
188 			    sc->sc_dev.dv_xname, i,
189 			    pci_conf_read(pc, pci_make_tag(pc, 0, 0, i),
190 				PCI_ID_REG));
191 	}
192 #endif
193 
194 #if NPCI > 0
195 	memset(&pba, 0, sizeof(pba));
196 	pba.pba_busname = "pci";
197 	pba.pba_iot = sc->sc_iot;
198 	pba.pba_memt = sc->sc_iot;
199 	pba.pba_dmat = &hpcmips_default_bus_dma_tag.bdt;
200 	pba.pba_bus = 0;
201 	pba.pba_bridgetag = NULL;
202 	pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED |
203 	    PCI_FLAGS_MRL_OKAY;
204 	pba.pba_pc = pc;
205 
206 	config_found(self, &pba, vrc4172pci_print);
207 #endif
208 }
209 
210 #if NPCI > 0
211 static int
212 vrc4172pci_print(void *aux, const char *pnp)
213 {
214 	struct pcibus_attach_args *pba = aux;
215 
216 	if (pnp != NULL)
217 		printf("%s at %s", pba->pba_busname, pnp);
218 	else
219 		printf(" bus %d", pba->pba_bus);
220 
221 	return (UNCONF);
222 }
223 #endif
224 
225 void
226 vrc4172pci_attach_hook(struct device *parent, struct device *self,
227     struct pcibus_attach_args *pba)
228 {
229 
230 	return;
231 }
232 
233 int
234 vrc4172pci_bus_maxdevs(pci_chipset_tag_t pc, int busno)
235 {
236 
237 	return (1);	/* Vrc4172 has only one device */
238 }
239 
240 int
241 vrc4172pci_bus_devorder(pci_chipset_tag_t pc, int busno, char *devs)
242 {
243 	int i;
244 
245 	*devs++ = 0;
246 	for (i = 1; i < 32; i++)
247 		*devs++ = -1;
248 
249 	return (1);
250 }
251 
252 pcitag_t
253 vrc4172pci_make_tag(pci_chipset_tag_t pc, int bus, int device, int function)
254 {
255 
256 	return ((bus << 16) | (device << 11) | (function << 8));
257 }
258 
259 void
260 vrc4172pci_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp,
261     int *fp)
262 {
263 
264 	if (bp != NULL)
265 		*bp = (tag >> 16) & 0xff;
266 	if (dp != NULL)
267 		*dp = (tag >> 11) & 0x1f;
268 	if (fp != NULL)
269 		*fp = (tag >> 8) & 0x07;
270 }
271 
272 pcireg_t
273 vrc4172pci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
274 {
275 	struct vrc4172pci_softc *sc = (struct vrc4172pci_softc *)pc->pc_dev;
276 	u_int32_t val;
277 
278 #ifdef VRC4172PCI_MCR700_SUPPORT
279 	if (sc->sc_fake_baseaddr != 0 &&
280 	    tag == vrc4172pci_make_tag(pc, 0, 0, 1) &&
281 	    reg == PCI_MAPREG_START) {
282 		val = sc->sc_fake_baseaddr;
283 		goto out;
284 	}
285 #endif /*  VRC4172PCI_MCR700_SUPPORT */
286 
287 	tag |= VRC4172PCI_CONFADDR_CONFIGEN;
288 
289 	vrc4172pci_write(sc, VRC4172PCI_CONFAREG, tag | reg);
290 	val = vrc4172pci_read(sc, VRC4172PCI_CONFDREG);
291 
292 #ifdef VRC4172PCI_MCR700_SUPPORT
293  out:
294 #endif
295 	DPRINTF(("%s: conf_read: tag = 0x%08x, reg = 0x%x, val = 0x%08x\n",
296 	    sc->sc_dev.dv_xname, (u_int32_t)tag, reg, val));
297 
298 	return (val);
299 }
300 
301 void
302 vrc4172pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg,
303     pcireg_t data)
304 {
305 	struct vrc4172pci_softc *sc = (struct vrc4172pci_softc *)pc->pc_dev;
306 
307 	DPRINTF(("%s: conf_write: tag = 0x%08x, reg = 0x%x, val = 0x%08x\n",
308 	    sc->sc_dev.dv_xname, (u_int32_t)tag, reg, (u_int32_t)data));
309 
310 #ifdef VRC4172PCI_MCR700_SUPPORT
311 	if (sc->sc_fake_baseaddr != 0 &&
312 	    tag == vrc4172pci_make_tag(pc, 0, 0, 1) &&
313 	    reg == PCI_MAPREG_START) {
314 		sc->sc_fake_baseaddr = (data & 0xfffff000);
315 		return;
316 	}
317 #endif /*  VRC4172PCI_MCR700_SUPPORT */
318 
319 	tag |= VRC4172PCI_CONFADDR_CONFIGEN;
320 
321 	vrc4172pci_write(sc, VRC4172PCI_CONFAREG, tag | reg);
322 	vrc4172pci_write(sc, VRC4172PCI_CONFDREG, data);
323 }
324 
325 int
326 vrc4172pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
327 {
328 	pci_chipset_tag_t pc = pa->pa_pc;
329 	pcitag_t intrtag = pa->pa_intrtag;
330 	int bus, dev, func;
331 
332 	pci_decompose_tag(pc, intrtag, &bus, &dev, &func);
333 	DPRINTF(("%s(%d, %d, %d): line = %d, pin = %d\n", pc->pc_dev->dv_xname,
334 	    bus, dev, func, pa->pa_intrline, pa->pa_intrpin));
335 
336 	*ihp = CONFIG_HOOK_PCIINTR_ID(bus, dev, func);
337 
338 	return (0);
339 }
340 
341 const char *
342 vrc4172pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih)
343 {
344 	static char irqstr[sizeof("pciintr") + 16];
345 
346 	snprintf(irqstr, sizeof(irqstr), "pciintr %d:%d:%d",
347 	    CONFIG_HOOK_PCIINTR_BUS((int)ih),
348 	    CONFIG_HOOK_PCIINTR_DEVICE((int)ih),
349 	    CONFIG_HOOK_PCIINTR_FUNCTION((int)ih));
350 
351 	return (irqstr);
352 }
353 
354 const struct evcnt *
355 vrc4172pci_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih)
356 {
357 
358 	return (NULL);
359 }
360 
361 void *
362 vrc4172pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih,
363     int level, int (*func)(void *), void *arg)
364 {
365 
366 	if (ih == -1)
367 		return (NULL);
368 	DPRINTF(("vrc4172pci_intr_establish: %lx\n", ih));
369 
370 	return (config_hook(CONFIG_HOOK_PCIINTR, ih, CONFIG_HOOK_EXCLUSIVE,
371 	    (int (*)(void *, int, long, void *))func, arg));
372 }
373 
374 void
375 vrc4172pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie)
376 {
377 
378 	DPRINTF(("vrc4172pci_intr_disestablish: %p\n", cookie));
379 	config_unhook(cookie);
380 }
381 
382 #ifdef VRC4172PCI_MCR700_SUPPORT
383 #if 0
384 int
385 vrc4172pci_mcr700_intr(void *arg)
386 {
387 	struct vrc4172pci_softc *sc = arg;
388 
389 	hpcio_intr_clear(sc->sc_iochip, sc->sc_ih);
390 	printf("USB port %s\n", hpcio_portread(sc->sc_iochip, 1) ? "ON" : "OFF");
391 	hpcio_portwrite(sc->sc_iochip, 45, hpcio_portread(sc->sc_iochip, 1));
392 
393 	return (0);
394 }
395 #endif
396 #endif /* VRC4172PCI_MCR700_SUPPORT */
397