xref: /netbsd/sys/arch/hpcmips/vr/vrc4172pci.c (revision c4a72b64)
1 /*	$NetBSD: vrc4172pci.c,v 1.7 2002/10/02 05:26:54 thorpej Exp $	*/
2 
3 /*-
4  * Copyright (c) 2002 TAKEMURA Shin
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. Neither the name of the project nor the names of its contributors
16  *    may be used to endorse or promote products derived from this software
17  *    without specific prior written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
23  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29  * SUCH DAMAGE.
30  */
31 
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/device.h>
35 
36 #include <machine/bus.h>
37 #include <machine/bus_space_hpcmips.h>
38 #include <machine/bus_dma_hpcmips.h>
39 #include <machine/config_hook.h>
40 #include <machine/platid.h>
41 #include <machine/platid_mask.h>
42 
43 #include <dev/pci/pcivar.h>
44 #include <dev/pci/pcidevs.h>
45 #include <dev/pci/pciidereg.h>
46 
47 #include <hpcmips/vr/icureg.h>
48 #include <hpcmips/vr/vripif.h>
49 #include <hpcmips/vr/vrc4172pcireg.h>
50 
51 #include "pci.h"
52 #include "opt_vrc4172pci.h"
53 
54 #ifdef DEBUG
55 #define	DPRINTF(args)	printf args
56 #else
57 #define	DPRINTF(args)	while (0) {}
58 #endif
59 
60 struct vrc4172pci_softc {
61 	struct device sc_dev;
62 
63 	bus_space_tag_t sc_iot;
64 	bus_space_handle_t sc_ioh;
65 
66 	struct hpcmips_pci_chipset sc_pc;
67 #ifdef VRC4172PCI_MCR700_SUPPORT
68 	pcireg_t sc_fake_baseaddr;
69 	hpcio_chip_t sc_iochip;
70 #if 0
71 	hpcio_intr_handle_t sc_ih;
72 #endif
73 #endif /* VRC4172PCI_MCR700_SUPPORT */
74 };
75 
76 static int	vrc4172pci_match(struct device *, struct cfdata *, void *);
77 static void	vrc4172pci_attach(struct device *, struct device *, void *);
78 #if NPCI > 0
79 static int	vrc4172pci_print(void *, const char *);
80 #endif
81 static void	vrc4172pci_attach_hook(struct device *, struct device *,
82 		    struct pcibus_attach_args *);
83 static int	vrc4172pci_bus_maxdevs(pci_chipset_tag_t, int);
84 static int	vrc4172pci_bus_devorder(pci_chipset_tag_t, int, char *);
85 static pcitag_t	vrc4172pci_make_tag(pci_chipset_tag_t, int, int, int);
86 static void	vrc4172pci_decompose_tag(pci_chipset_tag_t, pcitag_t, int *,
87 		    int *, int *);
88 static pcireg_t	vrc4172pci_conf_read(pci_chipset_tag_t, pcitag_t, int);
89 static void	vrc4172pci_conf_write(pci_chipset_tag_t, pcitag_t, int,
90 		    pcireg_t);
91 static int	vrc4172pci_intr_map(struct pci_attach_args *,
92 		    pci_intr_handle_t *);
93 static const char *vrc4172pci_intr_string(pci_chipset_tag_t,pci_intr_handle_t);
94 static const struct evcnt *vrc4172pci_intr_evcnt(pci_chipset_tag_t,
95 		    pci_intr_handle_t);
96 static void	*vrc4172pci_intr_establish(pci_chipset_tag_t,
97 		    pci_intr_handle_t, int, int (*)(void *), void *);
98 static void	vrc4172pci_intr_disestablish(pci_chipset_tag_t, void *);
99 #ifdef VRC4172PCI_MCR700_SUPPORT
100 #if 0
101 static int	vrc4172pci_mcr700_intr(void *arg);
102 #endif
103 #endif
104 
105 CFATTACH_DECL(vrc4172pci, sizeof(struct vrc4172pci_softc),
106     vrc4172pci_match, vrc4172pci_attach, NULL, NULL);
107 
108 static inline void
109 vrc4172pci_write(struct vrc4172pci_softc *sc, int offset, u_int32_t val)
110 {
111 
112 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, offset, val);
113 }
114 
115 static inline u_int32_t
116 vrc4172pci_read(struct vrc4172pci_softc *sc, int offset)
117 {
118 	u_int32_t res;
119 
120 	if (bus_space_peek(sc->sc_iot, sc->sc_ioh, offset, 4, &res) < 0) {
121 		res = 0xffffffff;
122 	}
123 
124 	return (res);
125 }
126 
127 static int
128 vrc4172pci_match(struct device *parent, struct cfdata *match, void *aux)
129 {
130 
131 	return (1);
132 }
133 
134 static void
135 vrc4172pci_attach(struct device *parent, struct device *self, void *aux)
136 {
137 	struct vrc4172pci_softc *sc = (struct vrc4172pci_softc *)self;
138 	pci_chipset_tag_t pc = &sc->sc_pc;
139 	struct vrip_attach_args *va = aux;
140 #if NPCI > 0
141 	struct pcibus_attach_args pba;
142 #endif
143 
144 	sc->sc_iot = va->va_iot;
145 	if (bus_space_map(sc->sc_iot, va->va_addr, va->va_size, 0,
146 	    &sc->sc_ioh)) {
147 		printf(": couldn't map io space\n");
148 		return;
149 	}
150 	printf("\n");
151 
152 #ifdef VRC4172PCI_MCR700_SUPPORT
153 	if (platid_match(&platid, &platid_mask_MACH_NEC_MCR_700) ||
154 	    platid_match(&platid, &platid_mask_MACH_NEC_MCR_700A)) {
155 		/* power USB controller on MC-R700 */
156 		sc->sc_iochip = va->va_gpio_chips[VRIP_IOCHIP_VRGIU];
157 		hpcio_portwrite(sc->sc_iochip, 45, 1);
158 		sc->sc_fake_baseaddr = 0x0afe0000;
159 #if 0
160 		sc->sc_ih = hpcio_intr_establish(sc->sc_iochip, 1,
161 		    HPCIO_INTR_EDGE|HPCIO_INTR_HOLD,
162 		    vrc4172pci_mcr700_intr, sc);
163 #endif
164 	}
165 #endif /* VRC4172PCI_MCR700_SUPPORT */
166 
167 	pc->pc_dev = &sc->sc_dev;
168 	pc->pc_attach_hook = vrc4172pci_attach_hook;
169 	pc->pc_bus_maxdevs = vrc4172pci_bus_maxdevs;
170 	pc->pc_bus_devorder = vrc4172pci_bus_devorder;
171 	pc->pc_make_tag = vrc4172pci_make_tag;
172 	pc->pc_decompose_tag = vrc4172pci_decompose_tag;
173 	pc->pc_conf_read = vrc4172pci_conf_read;
174 	pc->pc_conf_write = vrc4172pci_conf_write;
175 	pc->pc_intr_map = vrc4172pci_intr_map;
176 	pc->pc_intr_string = vrc4172pci_intr_string;
177 	pc->pc_intr_evcnt = vrc4172pci_intr_evcnt;
178 	pc->pc_intr_establish = vrc4172pci_intr_establish;
179 	pc->pc_intr_disestablish = vrc4172pci_intr_disestablish;
180 
181 #if 0
182 	{
183 		int i;
184 
185 		for (i = 0; i < 2; i++)
186 			printf("%s: ID_REG(0, 0, %d) = 0x%08x\n",
187 			    sc->sc_dev.dv_xname, i,
188 			    pci_conf_read(pc, pci_make_tag(pc, 0, 0, i),
189 				PCI_ID_REG));
190 	}
191 #endif
192 
193 #if NPCI > 0
194 	memset(&pba, 0, sizeof(pba));
195 	pba.pba_busname = "pci";
196 	pba.pba_iot = sc->sc_iot;
197 	pba.pba_memt = sc->sc_iot;
198 	pba.pba_dmat = &hpcmips_default_bus_dma_tag.bdt;
199 	pba.pba_bus = 0;
200 	pba.pba_bridgetag = NULL;
201 	pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED |
202 	    PCI_FLAGS_MRL_OKAY;
203 	pba.pba_pc = pc;
204 
205 	config_found(self, &pba, vrc4172pci_print);
206 #endif
207 }
208 
209 #if NPCI > 0
210 static int
211 vrc4172pci_print(void *aux, const char *pnp)
212 {
213 	struct pcibus_attach_args *pba = aux;
214 
215 	if (pnp != NULL)
216 		printf("%s at %s", pba->pba_busname, pnp);
217 	else
218 		printf(" bus %d", pba->pba_bus);
219 
220 	return (UNCONF);
221 }
222 #endif
223 
224 void
225 vrc4172pci_attach_hook(struct device *parent, struct device *self,
226     struct pcibus_attach_args *pba)
227 {
228 
229 	return;
230 }
231 
232 int
233 vrc4172pci_bus_maxdevs(pci_chipset_tag_t pc, int busno)
234 {
235 
236 	return (1);	/* Vrc4172 has only one device */
237 }
238 
239 int
240 vrc4172pci_bus_devorder(pci_chipset_tag_t pc, int busno, char *devs)
241 {
242 	int i;
243 
244 	*devs++ = 0;
245 	for (i = 1; i < 32; i++)
246 		*devs++ = -1;
247 
248 	return (1);
249 }
250 
251 pcitag_t
252 vrc4172pci_make_tag(pci_chipset_tag_t pc, int bus, int device, int function)
253 {
254 
255 	return ((bus << 16) | (device << 11) | (function << 8));
256 }
257 
258 void
259 vrc4172pci_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp,
260     int *fp)
261 {
262 
263 	if (bp != NULL)
264 		*bp = (tag >> 16) & 0xff;
265 	if (dp != NULL)
266 		*dp = (tag >> 11) & 0x1f;
267 	if (fp != NULL)
268 		*fp = (tag >> 8) & 0x07;
269 }
270 
271 pcireg_t
272 vrc4172pci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
273 {
274 	struct vrc4172pci_softc *sc = (struct vrc4172pci_softc *)pc->pc_dev;
275 	u_int32_t val;
276 
277 #ifdef VRC4172PCI_MCR700_SUPPORT
278 	if (sc->sc_fake_baseaddr != 0 &&
279 	    tag == vrc4172pci_make_tag(pc, 0, 0, 1) &&
280 	    reg == PCI_MAPREG_START) {
281 		val = sc->sc_fake_baseaddr;
282 		goto out;
283 	}
284 #endif /*  VRC4172PCI_MCR700_SUPPORT */
285 
286 	tag |= VRC4172PCI_CONFADDR_CONFIGEN;
287 
288 	vrc4172pci_write(sc, VRC4172PCI_CONFAREG, tag | reg);
289 	val = vrc4172pci_read(sc, VRC4172PCI_CONFDREG);
290 
291 #ifdef VRC4172PCI_MCR700_SUPPORT
292  out:
293 #endif
294 	DPRINTF(("%s: conf_read: tag = 0x%08x, reg = 0x%x, val = 0x%08x\n",
295 	    sc->sc_dev.dv_xname, (u_int32_t)tag, reg, val));
296 
297 	return (val);
298 }
299 
300 void
301 vrc4172pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg,
302     pcireg_t data)
303 {
304 	struct vrc4172pci_softc *sc = (struct vrc4172pci_softc *)pc->pc_dev;
305 
306 	DPRINTF(("%s: conf_write: tag = 0x%08x, reg = 0x%x, val = 0x%08x\n",
307 	    sc->sc_dev.dv_xname, (u_int32_t)tag, reg, (u_int32_t)data));
308 
309 #ifdef VRC4172PCI_MCR700_SUPPORT
310 	if (sc->sc_fake_baseaddr != 0 &&
311 	    tag == vrc4172pci_make_tag(pc, 0, 0, 1) &&
312 	    reg == PCI_MAPREG_START) {
313 		sc->sc_fake_baseaddr = (data & 0xfffff000);
314 		return;
315 	}
316 #endif /*  VRC4172PCI_MCR700_SUPPORT */
317 
318 	tag |= VRC4172PCI_CONFADDR_CONFIGEN;
319 
320 	vrc4172pci_write(sc, VRC4172PCI_CONFAREG, tag | reg);
321 	vrc4172pci_write(sc, VRC4172PCI_CONFDREG, data);
322 }
323 
324 int
325 vrc4172pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
326 {
327 	pci_chipset_tag_t pc = pa->pa_pc;
328 	pcitag_t intrtag = pa->pa_intrtag;
329 	int bus, dev, func;
330 
331 	pci_decompose_tag(pc, intrtag, &bus, &dev, &func);
332 	DPRINTF(("%s(%d, %d, %d): line = %d, pin = %d\n", pc->pc_dev->dv_xname,
333 	    bus, dev, func, pa->pa_intrline, pa->pa_intrpin));
334 
335 	*ihp = CONFIG_HOOK_PCIINTR_ID(bus, dev, func);
336 
337 	return (0);
338 }
339 
340 const char *
341 vrc4172pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih)
342 {
343 	static char irqstr[sizeof("pciintr") + 16];
344 
345 	snprintf(irqstr, sizeof(irqstr), "pciintr %d:%d:%d",
346 	    CONFIG_HOOK_PCIINTR_BUS((int)ih),
347 	    CONFIG_HOOK_PCIINTR_DEVICE((int)ih),
348 	    CONFIG_HOOK_PCIINTR_FUNCTION((int)ih));
349 
350 	return (irqstr);
351 }
352 
353 const struct evcnt *
354 vrc4172pci_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih)
355 {
356 
357 	return (NULL);
358 }
359 
360 void *
361 vrc4172pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih,
362     int level, int (*func)(void *), void *arg)
363 {
364 
365 	if (ih == -1)
366 		return (NULL);
367 	DPRINTF(("vrc4172pci_intr_establish: %lx\n", ih));
368 
369 	return (config_hook(CONFIG_HOOK_PCIINTR, ih, CONFIG_HOOK_EXCLUSIVE,
370 	    (int (*)(void *, int, long, void *))func, arg));
371 }
372 
373 void
374 vrc4172pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie)
375 {
376 
377 	DPRINTF(("vrc4172pci_intr_disestablish: %p\n", cookie));
378 	config_unhook(cookie);
379 }
380 
381 #ifdef VRC4172PCI_MCR700_SUPPORT
382 #if 0
383 int
384 vrc4172pci_mcr700_intr(void *arg)
385 {
386 	struct vrc4172pci_softc *sc = arg;
387 
388 	hpcio_intr_clear(sc->sc_iochip, sc->sc_ih);
389 	printf("USB port %s\n", hpcio_portread(sc->sc_iochip, 1) ? "ON" : "OFF");
390 	hpcio_portwrite(sc->sc_iochip, 45, hpcio_portread(sc->sc_iochip, 1));
391 
392 	return (0);
393 }
394 #endif
395 #endif /* VRC4172PCI_MCR700_SUPPORT */
396