xref: /netbsd/sys/arch/hpcmips/vr/vrdmaau.c (revision bf9ec67e)
1 /*
2  * Copyright (c) 2001 HAMAJIMA Katsuomi. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions
6  * are met:
7  * 1. Redistributions of source code must retain the above copyright
8  *    notice, this list of conditions and the following disclaimer.
9  * 2. Redistributions in binary form must reproduce the above copyright
10  *    notice, this list of conditions and the following disclaimer in the
11  *    documentation and/or other materials provided with the distribution.
12  *
13  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23  * SUCH DAMAGE.
24  */
25 
26 #include <sys/param.h>
27 #include <sys/systm.h>
28 #include <sys/device.h>
29 
30 #include <machine/bus.h>
31 
32 #include <hpcmips/vr/vripif.h>
33 #include <hpcmips/vr/dmaaureg.h>
34 
35 #ifdef VRDMAAU_DEBUG
36 int vrdmaau_debug = VRDMAAU_DEBUG;
37 #define DPRINTFN(n,x) if (vrdmaau_debug>(n)) printf x;
38 #else
39 #define DPRINTFN(n,x)
40 #endif
41 
42 struct vrdmaau_softc {
43 	struct device		sc_dev;
44 	bus_space_tag_t		sc_iot;
45 	bus_space_handle_t	sc_ioh;
46 	struct vrdmaau_chipset_tag	sc_chipset;
47 };
48 
49 int vrdmaau_match(struct device *, struct cfdata *, void *);
50 void vrdmaau_attach(struct device *, struct device *, void *);
51 
52 struct cfattach vrdmaau_ca = {
53 	sizeof(struct vrdmaau_softc), vrdmaau_match, vrdmaau_attach
54 };
55 
56 int vrdmaau_set_aiuin(vrdmaau_chipset_tag_t, void *);
57 int vrdmaau_set_aiuout(vrdmaau_chipset_tag_t, void *);
58 int vrdmaau_set_fir(vrdmaau_chipset_tag_t, void *);
59 static int vrdmaau_phy_addr(struct vrdmaau_softc *, void *, u_int32_t *);
60 
61 int
62 vrdmaau_match(struct device *parent, struct cfdata *cf, void *aux)
63 {
64 	return 2; /* 1st attach group of vrip */
65 }
66 
67 void
68 vrdmaau_attach(struct device *parent, struct device *self, void *aux)
69 {
70 	struct vrip_attach_args *va = aux;
71 	struct vrdmaau_softc *sc = (void*)self;
72 
73 	sc->sc_iot = va->va_iot;
74 	sc->sc_chipset.ac_sc = sc;
75 	sc->sc_chipset.ac_set_aiuin = vrdmaau_set_aiuin;
76 	sc->sc_chipset.ac_set_aiuout = vrdmaau_set_aiuout;
77 	sc->sc_chipset.ac_set_fir = vrdmaau_set_fir;
78 
79 	if (bus_space_map(sc->sc_iot, va->va_addr, va->va_size,
80 			  0 /* no flags */, &sc->sc_ioh)) {
81 		printf(": can't map i/o space\n");
82 		return;
83 	}
84 	printf("\n");
85 	vrip_register_dmaau(va->va_vc, &sc->sc_chipset);
86 }
87 
88 int
89 vrdmaau_set_aiuin(vrdmaau_chipset_tag_t ac, void *addr)
90 {
91 	struct vrdmaau_softc *sc = ac->ac_sc;
92 	u_int32_t phy;
93 	int err;
94 
95 	DPRINTFN(1, ("vrdmaau_set_aiuin: address %p\n", addr));
96 
97 	if ((err = vrdmaau_phy_addr(sc, addr, &phy)))
98 		return err;
99 
100 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, AIUIBAH_REG_W, phy >> 16);
101 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, AIUIBAL_REG_W, phy & 0xffff);
102 	return 0;
103 }
104 
105 int
106 vrdmaau_set_aiuout(vrdmaau_chipset_tag_t ac, void *addr)
107 {
108 	struct vrdmaau_softc *sc = ac->ac_sc;
109 	u_int32_t phy;
110 	int err;
111 
112 	DPRINTFN(1, ("vrdmaau_set_aiuout: address %p\n", addr));
113 
114 	if ((err = vrdmaau_phy_addr(sc, addr, &phy)))
115 		return err;
116 
117 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, AIUOBAH_REG_W, phy >> 16);
118 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, AIUOBAL_REG_W, phy & 0xffff);
119 	return 0;
120 }
121 
122 int
123 vrdmaau_set_fir(vrdmaau_chipset_tag_t ac, void *addr)
124 {
125 	struct vrdmaau_softc *sc = ac->ac_sc;
126 	u_int32_t phy;
127 	int err;
128 
129 	DPRINTFN(1, ("vrdmaau_set_fir: address %p\n", addr));
130 
131 	if ((err = vrdmaau_phy_addr(sc, addr, &phy)))
132 		return err;
133 
134 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, FIRBAH_REG_W, phy >> 16);
135 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, FIRBAL_REG_W, phy & 0xffff);
136 	return 0;
137 }
138 
139 static int
140 vrdmaau_phy_addr(struct vrdmaau_softc *sc, void *addr, u_int32_t *phy)
141 {
142 	DPRINTFN(1, ("vrdmaau_phy_addr\n"));
143 
144 	if (addr >= (void *)MIPS_KSEG0_START &&
145 	    addr < (void *)MIPS_KSEG1_START)
146 		*phy = MIPS_KSEG0_TO_PHYS(addr);
147 	else if (addr >= (void *)MIPS_KSEG1_START &&
148 		 addr < (void *)MIPS_KSEG2_START)
149 		*phy = MIPS_KSEG1_TO_PHYS(addr);
150 	else {
151 		DPRINTFN(0, ("vrdmaau_map_addr: invalid address %p\n", addr));
152 		return EFAULT;
153 	}
154 
155 #ifdef DIAGNOSTIC
156 	if ((*phy & (VRDMAAU_ALIGNMENT - 1)) ||
157 	    *phy >= VRDMAAU_BOUNCE_THRESHOLD ) {
158 		printf("%s: vrdmaau_phy_addr: invalid address %p\n",
159 		       sc->sc_dev.dv_xname, addr);
160 		return EINVAL;
161 	}
162 #endif
163 	return 0;
164 }
165